19-0197; Rev 1; 1/95 CCFL Backlight and LCD Contrast Controllers ________________________Applications Notebook Computers Palmtop Computers Pen-Based Data Systems Personal Digital Assistants Portable Data-Collection Terminals ____________________________Features ♦ Drives Backplane and Backlight ♦ 4V to 30V Battery Voltage Range ♦ Low 500µA Supply Current ♦ Digital or Potentiometer Control of CCFL Brightness and LCD Bias Voltage ♦ Negative LCD Contrast (MAX753) ♦ Positive LCD Contrast (MAX754) ♦ Independent Shutdown of Backlight and Backplane Sections ♦ 25µA Shutdown Supply Current ______________Ordering Information PART PIN-PACKAGE TEMP. RANGE MAX753CPE 0°C to +70°C 16 Plastic DIP MAX753CSE MAX753C/D MAX753EPE MAX753ESE MAX754CPE 0°C to +70°C 0°C to +70°C -40°C to +85°C -40°C to +85°C 0°C to +70°C 16 Narrow SO Dice* 16 Plastic DIP 16 Narrow SO 16 Plastic DIP MAX754CSE MAX754C/D MAX754EPE MAX754ESE 0°C to +70°C 0°C to +70°C -40°C to +85°C -40°C to +85°C 16 Narrow SO Dice* 16 Plastic DIP 16 Narrow SO * Contact factory for dice specifications. __________________Pin Configuration TOP VIEW VDD 1 16 LFB LADJ 2 15 BATT LON 3 CON 4 CADJ 5 14 LX MAX753 MAX754 13 LDRV 12 PGND GND 6 11 CDRV REF 7 10 CS CFB 8 9 CC DIP/SO Block Diagram located at end of data sheet. ________________________________________________________________ Maxim Integrated Products Call toll free 1-800-998-8800 for free samples or literature. 1 MAX753/MAX754 _______________General Description The MAX753/MAX754 drive cold-cathode fluorescent lamps (CCFLs) and provide the LCD backplane bias (contrast) power for color or monochrome LCD panels. These ICs are designed specifically for backlit notebook-computer applications. Both the backplane bias and the CCFL supply can be shut down independently. When both sections are shut down, supply current drops to 25µA. The LCD contrast and CCFL brightness can be adjusted by clocking separate digital inputs or using external potentiometers. LCD contrast and backlight brightness settings are preserved in their respective counters while in shutdown. On power-up, the LCD contrast counter and CCFL brightness counter are set to one-half scale. The ICs are powered from a regulated 5V supply. The magnetics are connected directly to the battery, for maximum power efficiency. The CCFL driver uses a Royer-type resonant architecture. It can provide from 100mW to 6W of power to one or two tubes. The MAX753 provides a negative LCD bias voltage; the MAX754 provides a positive LCD bias voltage. MAX753/MAX754 CCFL Backlight and LCD Contrast Controllers ABSOLUTE MAXIMUM RATINGS VDD to GND .................................................................-0.3V, +7V PGND to GND.....................................................................±0.3V BATT to GND.............................................................-0.3V, +36V LX to GND............................................................................±50V CS to GND.....................................................-0.6V, (VDD + 0.3V) Inputs/Outputs to GND (LADJ, CADJ, LON, CON, REF, CFB, CC, CDRV, LDRV, LFB) .....-0.3V, (VDD + 0.3V) Continuous Power Dissipation (TA = +70°C) Plastic DIP (derate 10.53mW/°C above +70°C) ...........842mW Narrow SO (derate 8.70mW/°C above +70°C) .............696mW Operating Temperature Ranges MAX75_C_ _ ........................................................0°C to +70°C MAX75_E_ _......................................................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10sec) .............................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V DD = 5V, BATT = 15V, CON = LON = 5V, LX = GND = PGND = 0V, I REF = 0mA, all digital input levels are 0V or 5V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS SUPPLY AND REFERENCE BATT Input Range 4 30 V VDD Supply Range 4.5 5.5 V REF Output Voltage No external load 1.21 REF Line Regulation 4V < VDD < 6V REF Load Regulation 0µA < IL < 100µA VDD Quiescent Current LON = CON = CS = LFB = CFB = LADJ = CADJ = 5V VDD Shutdown Current LON = CON = CS = LFB = CFB = LADJ = CADJ = LX = BATT = 0V (Note 1) 1.25 1.29 V 0.1 %/V 5 15 mV 0.5 2 mA 25 40 µA 0.8 V ±1 µA DIGITAL INPUTS AND DRIVER OUTPUTS Input Low Voltage LON, CON, CADJ, LADJ; VDD = 4.5V Input High Voltage LON, CON, CADJ, LADJ; VDD = 5.5V Input Leakage Current LON, CON, CADJ, LADJ; VIN = 0V or 5V Driver Sink/Source Current LDRV = CDRV = 2V Driver On-Resistance LDRV, CDRV; VDD = 4.5V 2.4 V 0.5 A Output high 10 Output low 7 Ω CCFT CONTROLLER Zero-Crossing-Comparator Threshold Voltage (CS) -10 20 Overcurrent-Comparator Threshold Voltage (CS) 1.2 1.3 V -5 µA CS Input Bias Current VCO Frequency DAC Resolution 2 VCS = 0V Minimum, CFB = 5V 32 47 Maximum, CFB = 0V 85 115 Guaranteed monotonic 5 _______________________________________________________________________________________ mV kHz Bits CCFL Backlight and LCD Contrast Controllers (V DD = 5V, BATT = 15V, CON = LON = 5V, LX = GND = PGND = 0V, I REF = 0mA, all digital input levels are 0V or 5V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Feedback Voltage (CFB) MIN TYP MAX At full scale (DAC code = 31) CONDITIONS 1210 1250 1290 At preset DAC, CON = 0V, CADJ = 5V (code = 15) 745 782 820 At zero scale (code = 0) 320 343 Feedback-Amplifier Input Bias Current Feedback-Amplifier Slew Rate Feedback-Amplifier Output Current Source current, CFB = 0V, CC = 2.5V 50 Sink current, CFB = 5V, CC = 2.5V 200 mV 365 ±100 Feedback-Amplifier Unity-Gain Bandwidth UNITS nA 1 MHz 0.4 V/µs µA LCD CONTROLLER BATT = 4V 2 5 BATT = 16V 0.5 1.5 Switching Period BATT = 4V, LX = 0V 35 70 DAC Resolution Guaranteed monotonic 6 Switch On-Time MAX753 Feedback Voltage (REF-LFB) MAX754 Feedback Voltage (LFB) µs µs Bits At full scale (DAC code = 63) 1200 1240 1280 At preset DAC, LON = 0V, LADJ = 5V (code = 31) 893 928 963 At zero scale (code = 0) 595 625 655 At full scale (DAC code = 63) 1210 1250 1290 At preset DAC, LON = 0V, LADJ = 5V (code = 31) 905 938 971 At zero scale (code = 0) 610 635 LFB Input Leakage Current mV mV 660 ±150 nA BATT Input Current LON = CON = CS = LFB = CFB = LADJ = CADJ = LX = 0V 12 20 µA LX Input Current LON = CON = CS = LFB = CFB = LADJ = CADJ = 0V, LX = BATT = 15V 12 20 µA TIMING (Note 2) Reset Pulse Width (tR) 110 ns Reset Setup Time (tRS) 0 ns Reset Hold Time (tRH) 0 ns CADJ, LADJ High Width (tSH) 100 ns CADJ, LADJ Low Width (tSL) 100 ns CADJ Low to CON Low or LADJ Low to LON Low (tSD) 50 ns Note 1: Maximum shutdown current occurs at BATT = LX = 0V. Note 2: Timing specifications are guaranteed by design and not production tested. _______________________________________________________________________________________ 3 MAX753/MAX754 ELECTRICAL CHARACTERISTICS (continued) MAX753/MAX754 CCFL Backlight and LCD Contrast Controllers ______________________________________________________________Pin Description PIN NAME 1 VDD FUNCTION 2 LADJ Digital Input for LCD Backplane Bias Adjustment. See Table 1. 3 LON Digital Input to Control LCD Bias Section. See Table 1. 4 CON Digital Input to Control CCFT Section. See Table 1. 5 CADJ Digital Input for CCFT Brightness Adjustment. See Table 1. 6 GND Analog Ground 7 REF Reference Voltage Output, 1.25V 8 CFB Inverting Input for the CCFT Error Amplifier 9 CC Output of the CCFT Error Amplifier 10 CS Connect to VDD 11 CDRV Leave unconnected 12 PGND Power Ground Connection for LDRV 13 LDRV Gate-Driver Output. Drives LCD backplane N-channel MOSFET. 14 LX 15 BATT 16 LFB 5V Power-Supply Input LCD Backplane Inductor Voltage-Sense Pin. Used to sense inductor voltage for on time determination. Battery Connection. Used to sense battery voltage for on time determination. Voltage Feedback for the LCD Backplane Section _______________Theory of Operation CCFL Inverter The MAX753/MAX754’s CCFL inverter is designed to drive one or two cold-cathode fluorescent lamps (CCFLs) with power levels from 100mW to 6W. These lamps commonly provide backlighting for LCD panels in portable computers. Drive Requirements for CCFL Tubes CCFL backlights require a high-voltage, adjustable AC power source. The MAX753/MAX754 generate this AC waveform with a self-oscillating, current-fed, parallel resonant circuit, also known as a Royer-type oscillator. Figure 1 shows one such circuit. The Royer oscillator is comprised of T1, C9, the load at the secondary, Q4, and Q5. The circuit self-oscillates at a frequency determined by the effective primary inductance and capacitance. Q4 and Q5 are self-driven by the extra winding. The current source feeding the Royer oscillator is comprised of L1, D5, and the MAX758A. When current from the current source increases, so does the lamp current. The lamp current is half-wave rectified by D7A and 4 D7B, and forms a voltage across resistor R8. The MAX753’s error amplifier compares the average of this voltage to the output of its internal DAC. Adjusting the DAC output from zero scale to full scale (digital control) causes the error amplifier to vary the tube current from a minimum to a maximum. The DAC’s transfer function is shown in Figure 2. On power-up or after a reset, the counter sets the DAC output to mid scale. Each rising edge of CADJ (with CON high) decrements the DAC output. When decremented beyond full scale, the counter rolls over and sets the DAC to the maximum value. In this way, a single pulse applied to CADJ decreases the DAC setpoint by one step, and 31 pulses increase the set-point by one step. The error amplifier’s output voltage controls the peak current output of the MAX758A. The peak switch current is therefore controlled by the output of the error amplifier. The lower the error amplifier’s output, the lower the peak current. Since the current through the current source is related to the current through the tube, the lower the error amplifier’s output, the lower the tube current. _______________________________________________________________________________________ CCFL Backlight and LCD Contrast Controllers 10 1 C1 CS BATT UNREGULATED INPUT VOLTAGE 1, 15, 16 15 2 VDD D1A MAX754CSE V+ SHDN R16 D1B 3 CON CADJ LON LADJ MAX753/MAX754 +5V, ±5% 4 C2 5 C3 +5V CMOS LOGIC CONTROL SIGNALS 3 10, 11 GND REF D5 MAX758ACWE 2 R17 7 D2A 8 12, 13, 14 LX SS D2B CC R2 R1 Q2 Q1 CDRV L1 POSITIVE CONTRAST VOLTAGE L2 7 LX 14 D3 REF D4 8 C4 LDRV 13 R5 5 Q3 PGND LFB CFB CC 2 6 1 C10 R3 R10 16 R6 C9 Q5 C6 C8 6 D6A 8 3,4 12 R4 GND 12 T1 9 Q4 D7B D7A D6B C7 C5 CCFL 11 R7 R18 R8 Figure 1. CCFL and Positive LCD Power Supply _______________________________________________________________________________________ 5 MAX753/MAX754 CCFL Backlight and LCD Contrast Controllers In Figure 1, the MAX758A, L1, and D5 form a voltagecontrolled switch-mode current source. The current out of L1 is proportional to the voltage applied to the SS pin. The MAX758A contains a current-mode pulsewidth-modulating buck regulator that switches at 170kHz. The voltage on the SS pin sets the switch current limit and thus sets the current out of L1. DAC OUTPUT VOLTAGE (mV) 1250 1221 1191 811 782 753 CCFL Current-Regulation Loop Figure 3 shows a block diagram of the regulation loop, which maintains a fixed CCFL average lamp current despite changes in input voltage and lamp impedance. This loop regulates the average value of the half-wave rectified lamp current. The root mean square lamp current is related to, but not equal to, the average lamp current. Assuming a sinusoidal lamp current, select R8 as follows: πVREF R8 = 2 ILAMP,RMS 402 372 343 0 1 2 3 14 15 16 29 30 31 DAC CODE ZERO SCALE MID SCALE where VREF = 1.25V and ILAMP,RMS is the desired fullscale root mean square lamp current. FULL SCALE Figure 2. CCFT DAC Transfer Function CON CADJ LOGIC AND 5-BIT COUNTER MAX754 FULL-SCALE = 1.250V HALF-SCALE = 0.782V ZERO-SCALE = 0.343V MAX758A SS SWITCH-MODE VOLTAGE CONTROLLED CURRENT SOURCE 5-BIT VOLTAGE OUTPUT DAC IBUCK ERROR AMPLIFIER CC CENTER-TAP ROYER OSCILLATOR C10 TRANSISTOR EMITTERS CCFL CFB C5 R18 R8 Figure 3. CCFL Tube Current-Regulation Loop 6 _______________________________________________________________________________________ CCFL Backlight and LCD Contrast Controllers MAX753/MAX754 VTAP(t) C10 VTAP, PK VSEC (t) ILAMP(t) VLAMP(t) t T Figure 4. Simple Model of the CCFL Figure 5. Voltage at the Center Tap of T1 The minimum operating input voltage is determined by the transformer turns ratio (n), the lamp operating voltage (VLAMP), and the ballast capactor (C10). Using a simple model of the CCFL (see Figure 4) we can calculate what the T1 center-tap voltage will be at maximum lamp current. The voltage on the CCFL is in phase with the current through it. Let us define I LAMP (t) = √2I LAMP,RMS cos(ωt) and V LAMP (t) = √2V LAMP,RMS cos(ωt); then the peak voltage at the center tap will be as follows: 2 ILAMP,RMS VTAP,PK = − nωC10 sin(φ) pulse-frequency-modulation (PFM) switching regulator. The MAX753 adds a simple diode-capacitor voltage inverter to the switching regulator. where, −ILAMP,RMS φ = tan −1 ωC10VLAMP,RMS , n is the secondary-to-primary turns ratio of T1, and ω is the frequency of Royer oscillation in radians per second. The voltage on the center tap of T1 is a full-wave rectified sine wave (see Figure 5). The average voltage at VTAP must equal the average voltage at the LX node of the MAX758A, since there cannot be any DC voltage on inductor L1; thus the minimum operating voltage must be greater than the average voltage at VTAP. LCD Bias Generators The MAX753/MAX754’s LCD bias generators provide adjustable output voltages for powering LCD displays. The MAX753’s LCD converter generates a negative output, while the MAX754’s generates a positive output. The MAX753/MAX754 employ a constant-peak-current Constant-Current PFM Control Scheme The LCD bias generators in these devices use a constant-peak-current PFM control scheme. Figure 6, which shows the MAX754’s boost switching regulator, illustrates this control method. When Q3 closes (Q3 “on”) a voltage equal to BATT is applied to the inductor, causing current to flow from the battery, through the inductor and switch, and to ground. This current ramps up linearly, storing energy in the inductor’s magnetic field. When Q3 opens, the inductor voltage reverses, and current flows from the battery, through the inductor and diode, and into the output capacitor. The devices regulate the output voltage by varying how frequently the switch is opened and closed. The MAX753/MAX754 not only regulate the output voltage, but also maintain a constant peak inductor current, regardless of the battery voltage. The ICs vary the switch on-time to produce the constant peak current, and vary its off-time to ensure that the inductor current reaches zero at the end of each cycle. The internal circuitry senses both the output voltage and the voltage at the LX node, and turns on the MOSFET only if: 1) The output voltage is out of regulation, and 2) the voltage at LX is less than the battery voltage. The first condition keeps the output in regulation, and the second ensures that the inductor current always resets to zero (i.e., the part always operates in discontinuous-conduction mode). _______________________________________________________________________________________ 7 MAX753/MAX754 CCFL Backlight and LCD Contrast Controllers BATTERY INPUT C2 10µF +5V INPUT L2 33µH C1 0.22µF 2 3 LADJ LON 1 15 BATT VDD ON-TIME LOGIC D3 1N5819 14 LX LDRV 13 OFF-TIME LOGIC Q3 R3 CONTROL ON/OFF PULSE-SKIP COMPARATOR PRESET 6-BIT COUNTER CLK POSITIVE LCD-BIAS OUTPUT C6 10µF 35V LFB 16 R4 VDAC MAX754 6-BIT DAC PGND GND 12 6 FULL-SCALE OUTPUT = 1.250V HALF-SCALE OUTPUT = 0.938V ZERO-SCALE OUTPUT = 0.635V Figure 6. MAX754 Positive LCD-Bias Generator Table 1. CCFL Circuit Component Descriptions 8 ITEM DESCRIPTION C5 Integrating Capacitor. 1 / (C5 x R18) sets the dominant pole for the feedback loop, which regulates the lamp current. Set the dominant pole at least two decades below the Royer frequency to eliminate the AC component of the voltage on R8. For example, if your Royer is oscillating at 50kHz = 314159rad/s, you should set 1 / (C5 x R18) ≤ 3142rad/s. R18 Integrating Resistor. The output source-current capability of the CC pin (50µA) limits how small R18 can be. Do not make R18 smaller than 70kΩ, otherwise CC will not be able to servo CFB to the DAC voltage (i.e., the integrator will not be able to integrate) and the loop will not be able to regulate. R8 R8 converts the half-wave rectified lamp current into a voltage. The average voltage on R8 is not equal to the root mean square voltage on R8. The accuracy of R8 is important since it, along with the MAX754 reference, sets the full-scale lamp current. Use a ±1%-accurate resistor. D7A, D7B D7A and D7B half-wave rectify the CCFL lamp current. Half-wave rectification of the lamp current and then averaging is a simple way to perform AC-to-DC conversion. D7A and D7B’s forward voltage drop and speed are unimportant; they do not need to pass currents larger than about 10mA, and their reverse breakdown voltage can be as low as 10V. CCFL The circuit of Figure 1, with the components shown in the bill of materials (Table 4), will drive a 500VRMS operating cold-cathode fluorescent lamp at 6W of power with a +12V input voltage. The lower the input voltage, the less power the circuit can deliver. _______________________________________________________________________________________ CCFL Backlight and LCD Contrast Controllers ITEM DESCRIPTION C10 The ballast capacitor linearizes the CCFL impedance and guarantees no DC current through the lamp. 15pF will work with just about any lamp. Depending on the lamp, you can try higher values, but this may cause the regulation loop to become unstable. Larger values of C10 allow the circuit to operate with lower input voltages. Don’t forget that C10 must be a high-voltage capacitor and cannot be polarized. A lamp with a 1500VRMS maximum strike voltage will require C10 to withstand 1500 x √2 = 2121V. T1 T1 must have high primary inductance (greater than 30µH), otherwise an inflated value of C9 will be required in order to keep the Royer frequency below 60kHz (the maximum allowed by most lamps). A higher T1 secondary-to-primary turns ratio allows lower-voltage operation, but increases the size of the transformer. You must select a value for C9 high enough to keep the lamp current reasonably sinusoidal and yet low enough that T1’s core does not saturate. For the Sumida EPS207 with a 171:1 turns ratio, choose a 0.22µF LMAG C9 C9 , where LMAG is the magvalue for C9. The characteristic impedance of the resonant tank equals netizing inductance of T1. The characteristic impedance is defined as the ratio of the voltage across the parallel LC circuit divided by the current flowing between the inductor and capacitor. This circulating current is not delivered to the load. If C9 has too large a value, it will cause excessive circulating currents, which will in turn saturate the core of T1. It’s easy to tell when you have excess circulating current in the resonant tank, because when you touch T1 you burn your finger. However, reducing the value of C9 decreases tank Q, which increases the harmonic content of the lamp-current waveform. If the lamp-current waveform does not look sinusoidal, then the circuit may not regulate to the right root mean square current. R10 R10 sets the base current for Q4 and Q5. If you choose too large a value for R10, Q4 and Q5 will overheat. Too small a value will waste base current and slightly degrade efficiency. The optimal value will depend on how much power you are trying to deliver to the lamp. 510Ω is a good “always works but may not be the most efficient” value for use with the FMMT619 transistors from ZETEX. R5, R6 This resistive divider senses the voltage at the center tap of T1. When the CC pin on the MAX758A rises above 1.25V, the internal switch turns off, interrupting power to the Royer oscillator and limiting the open-lamp transformer center-tap voltage. D6B, C7, R7 D6A, R17 D6B, C7, and R7 form a soft-start clamp, which limits the rate-of-rise of the peak current in the MAX758A. Make sure R7 is at least 100kΩ so it does not excessively load the CC pin. D6A and R17 are also part of the soft-start clamp. The voltage on the SS pin controls the peak current in the MAX758A’s switch. Make sure R17 is at least 100kΩ so it does not excessively load the CC pin. L1 Inductor for the Switching-Current Source. Use a 47µH to 150µH inductor with a 1A to 1.5A saturation current. D5 Schottky Catch Diode. Use a 1A to 1.5A Schottky diode with low forward-voltage power. C2 Supply Bypass Capacitor. Use low-ESR capacitor. _______________________________________________________________________________________ 9 MAX753/MAX754 Table 1. CCFL Circuit Component Descriptions (continued) MAX753/MAX754 CCFL Backlight and LCD Contrast Controllers Table 2. CCFL Circuit Design Example (Note 1) PARAMETER SYMBOL MIN TYP MAX UNITS CCFL Specifications Strike Voltage (VS) VS,RMS 1100 1500 VRMS Discharging Tube Current (IL) ILAMP,RMS 0.001376 0.005 ARMS Discharging Tube Voltage (VL) VLAMP,RMS 435 VRMS LCD Contrast Voltage Specifications Bias Voltage VLCD 16.3 Output Current ILCD 0.0245 32.6 V A Royer Specifications T1 Turns Ratio (Sec/Pri) (Note 2) n 171 T1 Resonating Inductance (Note 2) LMAG 0.000045 H C9 Value (Note 3) CRES 2.2E-07 F C10 Value CBAL 1.5E-11 F w 317820.86 rad/s Royer Frequency MAX754 Specifications Reference Voltage Second Volts Constant VREF sV 1.25 0.000008 V 2.4E-05 sV CCFL Circuit Calculations R8 Current-Sensing Resistor R8 555.36037 Ω Secondary Voltage Phase vs. Tube Voltage phi -1.1776341 Radian VTAP,PK 9.3903817 VPEAK VLIM 1350 VRMS 11.164844 VPEAK 0.1341944 Ω/Ω T1 Center-Tap Peak Voltage Secondary Limit Voltage T1 Center-Tap Limit Peak Voltage R5/R6 ROTP,RATIO LCD Circuit Calculations VIN(min) Full-Load Switching Period TFL L2 Inductance L2 1.639E-06 1.96E-05 L2 Peak Currrent R4/R3 s 2.4E-05 1.22704 RLCD,RATIO H A Ω/Ω 0.0398724 Application Circuit Operating Range Input Voltage Note 1: Note 2: Note 3: 10 VIN 5.978103 18 V To perform your own calculations for the parameters given in Table 2 (Design Example), use the equations given in Table 3 (Design Equations). T1 = Sumida’s EPS207 C9 = Wima’s SMD 7.3 __/63 ______________________________________________________________________________________ CCFL Backlight and LCD Contrast Controllers MAX753/MAX754 Table 3. Spreadsheet Design Equations PARAMETER SYMBOL MIN TYP MAX VS,RMS 1100 1500 Discharging Tube Current (IL) ILAMP,RMS = 0.28 * ILAMP,RMS(max) 0.005 Discharging Tube Voltage (VL) VLAMP,RMS CCFL Specifications Strike Voltage (VS) 435 LCD Contrast Voltage Specifications Bias Voltage VLCD = VLCD(max) / 2 Output Current ILCD 0.0245 32.6 Royer Specifications T1 Turns Ratio (Sec/Pri) n 171 T1 Resonating Inductance LMAG 0.000045 C9 Value CRES 2.2E-07 C10 Value CBAL 1.5E-11 w = SQRT [1 / (LMAG * CRES)] Royer Frequency MAX754 Specifications Reference Voltage VREF Second Volts Constant sV 1.25 0.000008 2.4E-05 CCFL Circuit Calculations R8 Current-Sensing Resistor R8 = PI() * VREF * SQRT(2) / (2 * ILAMP,RMS(max)) Secondary Voltage Phase vs. Tube Voltage phi = ATAN (-ILAMP,RMS(max) / (CBAL * w * + VLAMP,RMS) VTAP,PK = -SQRT(2) * ILAMP,RMS(max) / (CBAL * w * SIN(phi)) / n T1 Center-Tap Peak Voltage Secondary Limit Voltage VLIM = VS,RMS(max) * 0.9 T1 Center-Tap Limit Peak Voltage R5/R6 = SQRT(2) * VLIM / n ROTP,RATIO = VREF / (D25 - 0.6 - VREF) VIN(min) Full-Load Switching Period TFL = sV(min) / VIN(min) + sV(min) / (VLCD(max) - VIN(min)) L2 Inductance L2 LCD Circuit Calculations = sV(min) ^ 2 / (2 * TFL * VLCD(max) * ILCD(min)) = L2(max) * 0.8 L2 Peak Currrent = sV(max) / L2(min) R4/R3 RLCD,RATIO = VREF / (VLCD(max) - VREF) Application Circuit Operating Range Input Voltage VIN = (2 / PI()) * VTAP,PK 18 ______________________________________________________________________________________ 11 MAX753/MAX754 CCFL Backlight and LCD Contrast Controllers Table 4. Bill of Materials RESISTOR R1 R2 R3 R4 R5 R6 R7 R8 R10 R16 R17 R18 VALUE (Ω) 100,000 100,000 1,000,000 40,200 100,000 13,300 100,000 549 680 100,000 100,000 100,000 CAPACITOR VALUE (µF) C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 0.1 22 0.1 0.1 0.01 10 1 1 22 1.5E-5 TOLERANCE (%) ±10 ±10 ±1 ±1 ±1 ±1 ±10 ±1 ±5 ±10 ±10 ±5 WORKING VOLTAGE (V) 6 20 20 6 6 50 6 30 63 3000 CHARACTERISTICS Low ESR Non-polarized High voltage OTHER COMPONENTS SURFACEMOUNT PART NUMBER PACKAGE BREAKDOWN VOLTAGE (V) GENERIC PART NO. Q1 Q2 Q3 Q4 Q5 D1A D1B D2A D2B D3 D4 D5 D6A D6B D7A D7B CMPTA06 CMPT2907A MMFT3055ELT1 FMMT619 FMMT619 CMPD4150 CMPD4150 CMPD4150 CMPD4150 EC10QS05 CMPD4150 EC10QS02L CMPD4150 CMPD4150 CMPD4150 CMPD4150 SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 SOT-23 D-64 SOT-23 D-64 SOT-23 SOT-23 SOT-23 SOT-23 80 60 60 50 50 75 75 75 75 50 75 20 75 75 75 75 MPSA06 2N2907 3055EL 1N4150 1N4150 1N4150 1N4150 1N5819 1N4150 1N5817 1N4150 1N4150 1N4150 1N4150 Note: For T1, Use Sumida EPS207. Request No. USC-145, Special No. 6358-JP5-010. 12 ______________________________________________________________________________________ MANUFACTURER Central Semi. Central Semi. Motorola Zetex Zetex Central Semi. Central Semi. Central Semi. Central Semi. Nihon Central Semi. Nihon Central Semi. Central Semi. Central Semi. Central Semi. CCFL Backlight and LCD Contrast Controllers R3 VOUT = VDAC 1 + R4 Table 5 is the logic table for the LADJ and LON inputs, which control the internal DAC and counter. As long as the timing specifications for LADJ and LON are observed, any sequence of operations can be implemented. Negative LCD Bias: MAX753 The LCD bias generator of the MAX753 (Figure 8) generates its negative output by combining the switching regulator of the MAX754 with a simple diode-capacitor voltage inverter. To best understand the circuit, look at the part in a steady-state condition. Assume, for instance, that the output is being regulated to -30V, and that the battery voltage is +10V. When Q3 turns on, two things occur: current ramps up in the inductor, just like with the boost converter; and the charge on C15 (transferred from the inductor on the previous cycle) is transferred to C6, boosting the negative output. At the end of the cycle, the voltage on C15 is 30V + Vd, where Vd is the forward voltage drop of Schottky diode D3, and 30V is the magnitude of the output. When the MOSFET turns off, the inductor’s energy is transferred to capacitor C15, charging the capacitor to a positive voltage (VHIGH) that is higher than |VOUT|. In this instance, diode D8 allows current to flow from the right-hand side of the flying capacitor (C15) to ground. When the MOSFET turns on, the left-hand side of capacitor C15 is clamped to ground, forcing the right- MAX753/MAX754 1250 1240 1230 DAC OUTPUT VOLTAGE (mV) Positive LCD Bias: MAX754 The voltage-regulation loop is comprised of resistors R3 and R4, the pulse-skip comparator, the internal DAC, the on-time and off-time logic, and the external power components. The comparator compares a fraction of the output voltage to the voltage generated by an onchip 6-bit DAC. The part regulates by keeping the voltage at LFB equal to the DAC’s output voltage. Thus, you can set the output to different voltages by varying the DAC’s output. Varying the DAC output voltage (digital control) adjusts the external voltage from 50% to 100% of full scale. On power-up or after a reset, the counter sets the DAC output to mid scale. Each rising edge of LADJ (with LON high) decrements the DAC output. When decremented beyond zero scale, the counter rolls over and sets the DAC to the maximum value. In this way, a single pulse applied to LADJ decreases the DAC set point by one step, and 63 pulses increase the set point by one step. The MAX754’s DAC transfer function is shown in Figure 7. The following equation relates the switching regulator’s regulated output voltage to the DAC’s voltage: 947 938 928 655 645 635 0 1 2 30 31 32 61 62 63 DAC CODE ZERO SCALE MID SCALE FULL SCALE Figure 7. MAX754 LCD DAC Transfer Function hand side to -VHIGH. This voltage is more negative than the output, forcing D3 to conduct, and transferring charge from the flying capacitor C15 to the output capacitor C6. This charge transfer happens quickly, resulting in a voltage spike at the output due to the product of the output capacitor’s equivalent series resistance (ESR) and the current that flows from C15 to C6. To limit this drop, resistor R19 has been placed in series with D3. R19 limits the rate of current flow. At the end of this cycle, the flying capacitor has been discharged to 30V + Vd. If BATT(MAX) (i.e., either the fully charged battery voltage, or the wall-cube voltage) is greater than |VOUT(MIN)|, tie the cathode of D8 to BATT instead of GND, as shown by the dashed lines in Figure 8. Efficiency is lower with this method, so tie the cathode of D8 to GND whenever possible. The MAX753’s regulation loop is similar to that of the MAX754. The MAX753, however, uses different power components, and its feedback resistors are returned to the reference (1.25V) rather than ground. The MAX753’s PFM comparator compares a fraction of the output voltage to the voltage generated by the onchip 6-bit DAC. The part regulates by keeping the voltage at LFB equal to the DAC’s output voltage. Thus, you can set the LCD bias voltage to different voltages by varying the DAC’s output. ______________________________________________________________________________________ 13 MAX753/MAX754 CCFL Backlight and LCD Contrast Controllers Table 5. Logic-Signal Truth Table CCF CONTROL LON LADJ CON CADJ CCFT STATUS X X 0 0 Off CCFT DAC Hold X X 0 1 On Reset X X 1 0 On Hold X X 1 0→1 On Dec LON LADJ CON CADJ LCD STATUS LCD DAC 0 0 X X Off Hold 0 1 X X On Reset 1 0 X X On Hold 1 0→1 X X On Dec LCD BIAS CONTROL Hold = maintain last DAC value in counter Reset = set DAC counter to half scale Dec = decrement DAC counter one step Off = section turned off, sleep state On = section turned on X = don’t care Table 6. Component Suppliers MANUFACTURER ADDRESS PHONE FAX Central Semiconductor 145 Adams Ave. Hauppauge, NY 11788 (516) 435-1110 (516) 435-1824 Coiltronics 6000 Park of Commerce Blvd. Boca Raton, FL 33287 (407) 241-7876 (407) 241-9339 Maxim 120 San Gabriel Dr. Sunnyvale, CA 94025 (408) 737-7600 (408) 737-7194 Nihon (NIEC)* c/o Quantum Marketing 12900 Rolling Oaks Rd. Twin Oaks, CA 93518 (805) 867-2555 (805) 867-2698 Sumida 5999 New Wilke Rd., Suite 110 Rolling Meadows, IL 60008 (708) 956-0666 (708) 956-0702 Wima 2269 Saw Mill River Rd., Suite 400 P.O. Box 217 Elmsford, NY 10523 (914) 347-2474 (914) 347-7230 Zetex 87 Modular Ave. Commack, NY 11725 (516) 543-7100 (516) 864-7630 * Contact John D. Deith, ask for “Maxim Discount” on orders less than 5k units. 14 ______________________________________________________________________________________ CCFL Backlight and LCD Contrast Controllers C2 10µF +5V INPUT 3 LADJ LON ALTERNATE D8 CONNECTION (SEE TEXT) L2 33µH C1 0.22µF 2 MAX753/MAX754 BATTERY INPUT 1 15 BATT VDD C15 1µF 14 LX ON-TIME LOGIC OFF-TIME LOGIC LDRV 13 Q3 R19 2.2Ω NEGATIVE LCD-BIAS OUTPUT D3 1N5819 D8 1N5819 C6 10µF 35V R3 CONTROL ON/OFF PULSE-SKIP COMPARATOR LFB 16 PRESET 6-BIT COUNTER CLK VDD R4 VDAC MAX753 6-BIT DAC PGND GND 12 6 REF 7 C4 0.22µF Figure 8. MAX753 Negative LCD-Bias Generator The MAX753’s DAC transfer function is shown in Figure 9. The following equation relates the switching regulator’s regulated output voltage to the DAC’s voltage (REF - LFB): DAC OUTPUT VOLTAGE (mV)* 1240 1230 1220 R3 VOUT = REF − 1 + REF − LFB R4 ( 937 928 918 ) The value REF - LFB (and not LFB) is specified in the Electrical Characteristics . The most negative output voltage occurs for the largest value of REF - LFB. The MAX753’s combination boost converter and charge-pump inverter was chosen over a conventional buck-boost inverter because it allows the use of lowcost N-channel MOSFETs instead of more expensive Pchannel ones. Additionally, its efficiency is 5% to 10% better than a standard buck-boost inverter. 645 635 625 0 1 30 31 32 2 61 62 63 DAC CODE MID SCALE ZERO SCALE FULL SCALE * DAC OUTPUT VOLTAGE = REF - LFB Figure 9. MAX753 LCD DAC Transfer Function ______________________________________________________________________________________ 15 MAX753/MAX754 CCFL Backlight and LCD Contrast Controllers _____________________Block Diagram ___________________Chip Topography V DD 2 LADJ 3 LON CONTROL 15 BATT 14 LX OFF-TIME LOGIC ON-TIME LOGIC LDRV 13 LFB BATT LX LADJ LON CON CLK PRESET 6-BIT COUNTER PULSE-SKIP COMPARATOR LFB 16 LDRV CADJ 0.112" PGND (2.845mm) CDRV 6-BIT D/A CONVERTER VDD MAX753/MAX754 5-BIT D/A CONVERTER ERROR AMPLIFIER REF CDRV 1 7 GND 11 CC REF 5-BIT COUNTER CLK CFB 8 CC 9 PRESET CONTROL REF CADJ 4 5 PGND 12 CS 0.076" (1.930mm) CS 10 LOGIC CON CFB TRANSISTOR COUNT: 321; SUBSTRATE CONNECTED TO VDD. GND 6 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 1995 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.