MOTOROLA Freescale Semiconductor, Inc. MC9S12C-FamilyPP Rev. 3, 12-May-04 SEMICONDUCTOR TECHNICAL DATA MC9S12C-Family Product Proposal Freescale Semiconductor, Inc... 16-Bit Microcontroller Based on Motorola’s market-leading flash technology, members of the MC9S12C-Family deliver the power and flexibility of our 16 Bit core (CPU12) family to a whole new range of cost and space sensitive, general purpose Industrial and Automotive network applications. MC9S12C-Family members are comprised of standard on-chip peripherals including a 16-bit central processing unit (CPU12), up to 128K bytes of Flash EEPROM or ROM, up to 4K bytes of RAM, an asynchronous serial communications interface (SCI), a serial peripheral interface (SPI), an 8-channel 16-bit timer module (TIM), a 6-channel 8-bit Pulse Width Modulator (PWM), an 8-channel, 10-bit analog-to-digital converter (ADC) and up to one CAN 2.0 A, B software compatible module (MSCAN12). The MC9S12C-Family has full 16-bit data paths throughout. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. In addition to the I/O ports available in each module, up to 10 dedicated I/O port bits are available with Wake-Up capability from STOP or WAIT mode. The MC9S12C-Family is available in 48, 52 and 80 pin QFP packages, with the 80 Pin version pin compatible to the HCS12 B and D- Family derivatives. The C-Family includes ROM versions MC3S12C128/96/64/32/16 of all devices which provide a further cost reduction path for applications with high volume and stable code. Features • 16-bit HCS12 CORE — HCS12 CPU — MMC (memory map and interface) — INT (interrupt control) — BDM (background debug mode) — DBG12 (enhanced debug12 module including breakpoints and change-of-flow trace buffer) — Multiplexed Expansion Bus (available only in 80 pin package version) • 16-bit HCS12 CPU — Upward compatible with M68HC11 instruction set — Interrupt stacking and programmer’s model identical to M68HC11 — Instruction queue — Enhanced indexed addressing • Wake-up interrupt inputs — Up to 10-port bits available for wake up interrupt function • Memory options — 16K, 32K, 64K, 96K and 128K Byte Flash EEPROM (erasable in 512-byte sectors) or — 16K, 32K, 64K, 96K and 128K Byte ROM — 2K and 4K Byte RAM • Analog-to-Digital Converters — One 8-channel module with 10-bit resolution. — External conversion trigger capability • Up to one 1M bit per second, CAN 2.0 A, B software compatible modules — Five receive and three transmit buffers This document contains information on a new product. Specifications and information herein are subject to change without notice. © MOTOROLA 2004 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. — Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit — Four separate interrupt channels for receive, transmit, error and wake-up — Low-pass filter wake-up function — Loop-back for self test operation Freescale Semiconductor, Inc... • Timer Module (TIM) — 16-bit Counter with 7-bit Prescaler — 8 programmable input capture or output compare channels — Simple PWM Mode — Modulo Reset of Timer Counter — 16-Bit Pulse Accumulator — External Event Counting — Gated Time Accumulation • 6 PWM channels — Programmable period and duty cycle — 8-bit 6-channel or 16-bit 3-channel — Separate control for each pulse width and duty cycle — Center-aligned or left-aligned outputs — Programmable clock select logic with a wide range of frequencies — Fast emergency shutdown input • Serial interfaces — One asynchronous serial communications interface (SCI) — One synchronous serial peripheral interface (SPI) • CRG (Clock Reset Generator Module) — Windowed COP watchdog, — Real time interrupt, — Clock monitor, — Clock generation — Reset Generation — Phase-locked loop clock frequency multiplier — Limp home mode in absence of external clock — Low power 0.5 to 16 MHz crystal oscillator reference clock • Operation frequency — 32MHz equivalent to 16MHz Bus Speed for single chip — 32MHz equivalent to 16MHz Bus Speed in expanded bus modes — Option: 50MHz equivalent to 25MHz Bus Speed • Internal 2.5V Regulator — Supports an input voltage range from 3.3V-10% to 5.5V — Low power mode capability — Includes low voltage reset (LVR) circuitry — Includes low voltage interrupt (LVI) circuitry • 48-Pin LQFP, 52-Pin LQFP or 80-Pin QFP package — Up to 58 I/O lines with 5V input and drive capability — Up to 2 dedicated 5V input only lines (IRQ, XIRQ) — 5V A/D converter inputs and 5V I/O • Development support — Single-wire background debug™ mode (BDM) — On-chip hardware breakpoints — Enhanced DBG12 debug features MOTOROLA 2 MC9S12C-Family For More Information On This Product, PRODUCT PROPOSAL, Rev. 3, 12-May-04 Go to: www.freescale.com Freescale Semiconductor, Inc. Table 1 List of MC9S12C-Family members Flash ROM RAM Package 48LQFP 128K 96K Freescale Semiconductor, Inc... 64K 32K 32K 16K 0 0 0 0 0 0 0 0 0 0 0 0 128K 96K 64K 32K 32K 16K 4K 4K 4K 2K 2K 2K 4K 4K 4K 2K 2K 2K Device CAN SCI SPI A/D MC9S12C128 1 1 1 8ch PWM Timer 6ch I/O 8ch 31 52LQFP MC9S12C128 1 1 1 8ch 6ch 8ch 35 80QFP MC9S12C128 1 1 1 8ch 6ch 8ch 60 48LQFP MC9S12C96 1 1 1 8ch 6ch 8ch 31 52LQFP MC9S12C96 1 1 1 8ch 6ch 8ch 35 80QFP MC9S12C96 1 1 1 8ch 6ch 8ch 60 48LQFP MC9S12C64 1 1 1 8ch 6ch 8ch 31 52LQFP MC9S12C64 1 1 1 8ch 6ch 8ch 35 80QFP MC9S12C64 1 1 1 8ch 6ch 8ch 60 48LQFP MC9S12C32 1 1 1 8ch 6ch 8ch 31 52LQFP MC9S12C32 1 1 1 8ch 6ch 8ch 35 80QFP MC9S12C32 1 1 1 8ch 6ch 8ch 60 48LQFP MC9S12GC32 0 1 1 8ch 6ch 8ch 31 52LQFP MC9S12GC32 0 1 1 8ch 6ch 8ch 35 48LQFP MC9S12GC16 0 1 1 8ch 6ch 8ch 31 52LQFP MC9S12GC16 0 1 1 8ch 6ch 8ch 35 48LQFP MC3S12C128 1 1 1 8ch 6ch 8ch 31 52LQFP MC3S12C128 1 1 1 8ch 6ch 8ch 35 80QFP MC3S12C128 1 1 1 8ch 6ch 8ch 60 48LQFP MC3S12C96 1 1 1 8ch 6ch 8ch 31 52LQFP MC3S12C96 1 1 1 8ch 6ch 8ch 35 80QFP MC3S12C96 1 1 1 8ch 6ch 8ch 60 48LQFP MC3S12C64 1 1 1 8ch 6ch 8ch 31 52LQFP MC3S12C64 1 1 1 8ch 6ch 8ch 35 80QFP MC3S12C64 1 1 1 8ch 6ch 8ch 60 48LQFP MC3S12C32 1 1 1 8ch 6ch 8ch 31 52LQFP MC3S12C32 1 1 1 8ch 6ch 8ch 35 80QFP MC3S12C32 1 1 1 8ch 6ch 8ch 60 48LQFP MC3S12GC32 0 1 1 8ch 6ch 8ch 31 52LQFP MC3S12GC32 0 1 1 8ch 6ch 8ch 35 48LQFP MC9S12GC16 0 1 1 8ch 6ch 8ch 31 52LQFP MC9S12GC16 0 1 1 8ch 6ch 8ch 35 • Pin out explanations: — I/O is the sum of ports capable to act as digital input or output. For 80 Pin Versions: Port A = 8, B = 8, E = 6 + 2 input only, J = 2, M = 6, P = 8, S = 4, T = 8, PAD = 8. 12 inputs provide Interrupt capability (P= 8, J = 2, IRQ, XIRQ) For 52 Pin Versions: Port A = 3, B = 1, E = 2 + 2 input only, M = 6, P = 3, S = 2, T = 8, PAD = 8. 5 inputs provide Interrupt capability (P= 3, IRQ, XIRQ) For 48 Pin Versions: Port A = 1, B = 1, E = 2 + 2 input only, M = 6, P = 1, S = 2, T = 8, PAD = 8. 3 inputs provide Interrupt capability (P= 1, IRQ, XIRQ) MC9S12C-Family More Information On This Product, PRODUCT PROPOSAL, Rev. For 3, 12-May-04 Go to: www.freescale.com MOTOROLA 3 Freescale Semiconductor, Inc. Multiplexed Address/Data Bus SCI DDRA DDRB PTA PTB ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 Multiplexed Wide Bus ADDR15 ADDR14 ADDR13 ADDR12 ADDR11 ADDR10 ADDR9 ADDR8 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 MSCAN Internal Logic 2.5V VDD1,2 VSS1,2 PLL 2.5V VDDPLL VSSPLL SPI RXD TXD RXCAN TXCAN MISO SS MOSI SCK PTAD PTT PTP DDRAD DDRT PP0 PP1 PP2 PP3 PP4 PP5 PP6 PP7 PTJ TEST/VPP PT0 PT1 PT2 PT3 PT4 PT5 PT6 PT7 PJ6 PJ7 PTS PWM Module PW0 PW1 PW2 PW3 PW4 PW5 PAD0 PAD1 PAD2 PAD3 PAD4 PAD5 PAD6 PAD7 PS0 PS1 PS2 PS3 PTM XIRQ IRQ System R/W Integration LSTRB/TAGLO Module ECLK (SIM) MODA/IPIPE0 MODB/IPIPE1 NOACC/XCLKS DDRP COP Watchdog Clock Monitor Periodic Interrupt MUX Keypad Interrupt Timer Module Clock and Reset Generation Module IOC0 IOC1 IOC2 IOC3 IOC4 IOC5 IOC6 IOC7 AN0 AN1 AN2 AN3 AN4 AN5 AN6 AN7 DDRJ PLL HCS12 CPU VDDA VSSA VRH VRL Key Int Single-wire Background Debug12 Module VDDA VSSA VRH VRL DDRS PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 2K, 4K Byte RAM DDRE XFC VDDPLL VSSPLL EXTAL XTAL RESET 32K, 64K, 96K, 128K Byte Flash/ROM DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 DATA9 DATA8 Freescale Semiconductor, Inc... BKGD Voltage Regulator PTE VDD2 VSS2 VDD1 VSS1 ATD DDRM VSSR VDDR VDDX VSSX PM0 PM1 PM2 PM3 PM4 PM5 Signals shown in Bold are not available on the 52 or 48 Pin Package Signals shown in Bold Italic are available in the 52, but not the 48 Pin Package I/O Driver 5V VDDX VSSX A/D Converter 5V VDDA VSSA VRL is bonded internally to VSSA for 52 and 48 Pin packages Voltage Regulator 5V & I/O VDDR VSSR Figure 1 Block Diagram MOTOROLA 4 MC9S12C-Family For More Information On This Product, PRODUCT PROPOSAL, Rev. 3, 12-May-04 Go to: www.freescale.com Freescale Semiconductor, Inc. $0000 $0400 $0000 1K Register Space $03FF Mappable to any 2K Boundary $0000 16K Fixed Flash EEPROM/ROM $3FFF $3000 $4000 $3000 4K Bytes RAM $3FFF Mappable to any 4K Boundary $4000 Freescale Semiconductor, Inc... 16K Fixed Flash EEPROM/ROM $7FFF $8000 $8000 16K Page Window 8 * 16K Flash EEPROM/ROM Pages EXT $BFFF $C000 $C000 $FFFF $FF00 $FF00 $FFFF VECTORS VECTORS VECTORS NORMAL SINGLE CHIP EXPANDED SPECIAL SINGLE CHIP $FFFF 16K Fixed Flash EEPROM/ROM BDM (If Active) The figure shows a useful map, which is not the map out of reset. After reset the map is: $0000 - $03FF: Register Space $0000 - $0FFF: 4K RAM (only 3K visible $0400 - $0FFF) Flash Erase Sector Size is 1024 Bytes Figure 2 MCxS12C128 User Configurable Memory Map MC9S12C-Family More Information On This Product, PRODUCT PROPOSAL, Rev. For 3, 12-May-04 Go to: www.freescale.com MOTOROLA 5 Freescale Semiconductor, Inc. $0000 $0400 $0000 1K Register Space $03FF Mappable to any 2K Boundary $0000 16K Fixed Flash EEPROM/ROM $3FFF $3000 $4000 $3000 4K Bytes RAM $3FFF Mappable to any 4K Boundary $4000 Freescale Semiconductor, Inc... 16K Fixed Flash EEPROM/ROM $7FFF $8000 $8000 16K Page Window 6 * 16K Flash EEPROM/ROM Pages EXT $BFFF $C000 $C000 $FFFF $FF00 $FF00 $FFFF VECTORS VECTORS VECTORS NORMAL SINGLE CHIP EXPANDED SPECIAL SINGLE CHIP $FFFF 16K Fixed Flash EEPROM/ROM BDM (If Active) The figure shows a useful map, which is not the map out of reset. After reset the map is: $0000 - $03FF: Register Space $0000 - $0FFF: 4K RAM (only 3K visible $0400 - $0FFF) Flash Erase Sector Size is 1024 Bytes Figure 3 MCxS12C96 User Configurable Memory Map MOTOROLA 6 MC9S12C-Family For More Information On This Product, PRODUCT PROPOSAL, Rev. 3, 12-May-04 Go to: www.freescale.com Freescale Semiconductor, Inc. $0000 $0400 $0000 1K Register Space $03FF Mappable to any 2K Boundary $0000 16K Fixed Flash EEPROM/ROM $3FFF $3000 $4000 $3000 4K Bytes RAM $3FFF Mappable to any 4K Boundary $4000 Freescale Semiconductor, Inc... 16K Fixed Flash EEPROM/ROM $7FFF $8000 $8000 16K Page Window 4 * 16K Flash EEPROM/ROM Pages EXT $BFFF $C000 $C000 $FFFF $FF00 $FF00 $FFFF VECTORS VECTORS VECTORS NORMAL SINGLE CHIP EXPANDED SPECIAL SINGLE CHIP $FFFF 16K Fixed Flash EEPROM/ROM BDM (If Active) The figure shows a useful map, which is not the map out of reset. After reset the map is: $0000 - $03FF: Register Space $0000 - $0FFF: 4K RAM (only 3K visible $0400 - $0FFF) Flash Erase Sector Size is 512 Bytes Figure 4 MCxS12C64 User Configurable Memory Map MC9S12C-Family More Information On This Product, PRODUCT PROPOSAL, Rev. For 3, 12-May-04 Go to: www.freescale.com MOTOROLA 7 Freescale Semiconductor, Inc. $0000 1K Register Space $0000 $0400 $03FF Mappable to any 2K Boundary $3800 $3800 2K Bytes RAM $3FFF Mappable to any 2K Boundary Freescale Semiconductor, Inc... $4000 $8000 $8000 16K Page Window 2 * 16K Flash EEPROM/ROM Pages EXT $BFFF $C000 $C000 $FFFF $FF00 $FF00 $FFFF VECTORS VECTORS VECTORS NORMAL SINGLE CHIP EXPANDED SPECIAL SINGLE CHIP $FFFF 16K Fixed Flash EEPROM/ROM BDM (If Active) The figure shows a useful map, which is not the map out of reset. After reset the map is: $0000 - $03FF: Register Space $0800 - $0FFF: 2K RAM Flash Erase Sector Size is 512 Bytes Figure 5 MCxS12C32 User Configurable Memory Map MOTOROLA 8 MC9S12C-Family For More Information On This Product, PRODUCT PROPOSAL, Rev. 3, 12-May-04 Go to: www.freescale.com Freescale Semiconductor, Inc. $0000 1K Register Space $0000 $0400 $03FF Mappable to any 2K Boundary $3800 $3800 2K Bytes RAM $3FFF Mappable to any 2K Boundary Freescale Semiconductor, Inc... $4000 $8000 $8000 16K Page Window 1 * 16K Flash EEPROM/ROM Page EXT $BFFF $C000 $C000 $FFFF $FF00 $FF00 $FFFF VECTORS VECTORS VECTORS NORMAL SINGLE CHIP EXPANDED SPECIAL SINGLE CHIP $FFFF 16K Fixed Flash EEPROM/ROM BDM (If Active) The figure shows a useful map, which is not the map out of reset. After reset the map is: $0000 - $03FF: Register Space $0800 - $0FFF: 2K RAM Flash Erase Sector Size is 512 Bytes Figure 6 MCxS12C16 User Configurable Memory Map MC9S12C-Family More Information On This Product, PRODUCT PROPOSAL, Rev. For 3, 12-May-04 Go to: www.freescale.com MOTOROLA 9 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 MC9S12C-Family 80 QFP 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 VRH VDDA PAD07/AN07 PAD06/AN06 PAD05/AN05 PAD04/AN04 PAD03/AN03 PAD02/AN02 PAD01/AN01 PAD00/AN00 VSS2 VDD2 PA7/ADDR15/DATA15 PA6/ADDR14/DATA14 PA5/ADDR13/DATA13 PA4/ADDR12/DATA12 PA3/ADDR11/DATA11 PA2/ADDR10/DATA10 PA1/ADDR9/DATA9 PA0/ADDR8/DATA8 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 PW3/KWP3/PP3 PW2/KWP2/PP2 PW1/KWP1/PP1 PW0/KWP0/PP0 PW0/IOC0/PT0 PW1/IOC1/PT1 PW2/IOC2/PT2 PW3/IOC3/PT3 VDD1 VSS1 PW4/IOC4/PT4 IOC5/PT5 IOC6/PT6 IOC7/PT7 MODC/TAGHI/BKGD ADDR0/DATA0/PB0 ADDR1/DATA1/PB1 ADDR2/DATA2/PB2 ADDR3/DATA3/PB3 ADDR4/DATA4/PB4 ADDR5/DATA5/PB5 ADDR6/DATA6/PB6 ADDR7/DATA7/PB7 XCLKS/NOACC/PE7 MODB/IPIPE1/PE6 MODA/IPIPE0/PE5 ECLK/PE4 VSSR VDDR RESET VDDPLL XFC VSSPLL EXTAL XTAL TEST/VPP LSTRB/TAGLO/PE3 R/W/PE2 IRQ/PE1 XIRQ/PE0 Freescale Semiconductor, Inc... PP4/KWP4/PW4 PP5/KWP5/PW5 PP7/KWP7 VDDX VSSX PM0/RXCAN PM1/TXCAN PM2/MISO PM3/SS PM4/MOSI PM5/SCK PJ6/KWJ6 PJ7/KWJ7 PP6/KWP6/ROMONE PS3 PS2 PS1/TXD PS0/RXD VSSA VRL Freescale Semiconductor, Inc. Signals shown in Bold are not available on the 52 or 48 Pin Package Signals shown in Bold Italic are available in the 52, but not the 48 Pin Package Figure 7 Pin Assignments in 80 QFP for MC9S12C-Family !!! Pin-out is Subject to Change!!! MOTOROLA 10 MC9S12C-Family For More Information On This Product, PRODUCT PROPOSAL, Rev. 3, 12-May-04 Go to: www.freescale.com PP4/KWP4/PW4 PP5/KWP5/PW5 VDDX VSSX PM0/RXCAN PM1/TXCAN PM2/MISO PM3/SS PM4/MOSI PM5/SCK PS1/TXD PS0/RXD VSSA 52 51 50 49 48 47 46 45 44 43 42 41 40 39 VRH 2 38 VDDA PW1/IOC1/PT1 3 37 PAD07/AN07 PW2/IOC2/PT2 4 36 PAD06/AN06 PW3/IOC3/PT3 5 35 PAD05/AN05 VDD1 6 34 PAD04/AN04 VSS1 7 33 PAD03/AN03 PW4/IOC4/PT4 8 32 PAD02/AN02 IOC5/PT5 9 31 PAD01/AN01 IOC6/PT6 10 30 PAD00/AN00 IOC7/PT7 11 29 PA2 MODC/BKGD 12 28 PA1 PB4 13 27 PA0 MC9S12C-Family 16 17 18 19 20 21 22 23 24 25 26 VSSR VDDR RESET VDDPLL XFC VSSPLL EXTAL XTAL TEST/VPP IRQ/PE1 XIRQ/PE0 52 QFP 15 PW0/IOC0/PT0 ECLK/PE4 1 14 PW3/KWP3/PP3 XCLKS/PE7 Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. * Signals shown in Bold are not available on the 48 Pin Package Figure 8 Pin assignments 52 QFP for MC9S12C-Family MC9S12C-Family More Information On This Product, PRODUCT PROPOSAL, Rev. For 3, 12-May-04 Go to: www.freescale.com MOTOROLA 11 PP5/KWP5 VDDX VSSX PM0/RXCAN PM1/TXCAN PM2/MISO PM3/SS PM4/MOSI PM5/SCK PS1/TXD PS0/RXD VSSA 47 46 45 44 43 42 41 40 39 38 37 1 PW1/IOC1/PT1 48 PW0/IOC0/PT0 36 VRH 2 35 VDDA PW2/IOC2/PT2 3 34 PAD07/AN07 PW3/IOC3/PT3 4 33 PAD06/AN06 VDD1 5 32 PAD05/AN05 VSS1 6 31 PAD04/AN04 30 PAD03/AN03 MC9S12C-Family 48 LQFP 25 XIRQ/PE0 IRQ/PE1 TEST/VPP XTAL 24 12 23 PB4 22 PA0 EXTAL 26 21 11 20 MODC/BKGD VSSPLL PAD00/AN00 19 27 XFC 10 18 IOC7/PT7 VDDPLL PAD01/AN01 17 28 RESET 9 16 IOC6/PT6 VDDR PAD02/AN02 15 29 VSSR 8 14 IOC5/PT5 ECLK/PE4 7 13 PW4/IOC4/PT4 XCLKS/PE7 Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. Figure 9 Pin Assignments in 48 LQFP for MC9S12C-Family MOTOROLA 12 MC9S12C-Family For More Information On This Product, PRODUCT PROPOSAL, Rev. 3, 12-May-04 Go to: www.freescale.com Freescale Semiconductor, Inc. Package mechanical information 4X 0.200 AB T-U Z DETAIL Y A P A1 48 37 1 36 T U V B AE B1 25 13 24 DIM A A1 B B1 C D E F G H J K L M N P R S S1 V V1 W AA Z S1 T, U, Z S DETAIL Y 4X 0.200 AC T-U Z 0.080 AC G AB AD AC MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.170 0.270 1.350 1.450 0.170 0.230 0.500 BSC 0.050 0.150 0.090 0.200 0.500 0.700 0 ° 7° 12 ° REF 0.090 0.160 0.250 BSC 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF M° BASE METAL TOP & BOTTOM N R J 0.250 Freescale Semiconductor, Inc... 12 AE V1 C E GAUGE PLANE 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 1. CONTROLLING DIMENSION: MILLIMETER. 2. DATUM PLANE AB IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 3. DATUMS T, U, AND Z TO BE DETERMINED AT DATUM PLANE AB. 4. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE AC. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE AB. 6. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED F D 0.080 M AC T-U Z SECTION AE-AE H W L° K DETAIL AD AA Figure 10 48-pin LQFP Mechanical Dimensions (case no.932-03 ISSUE F) MC9S12C-Family More Information On This Product, PRODUCT PROPOSAL, Rev. For 3, 12-May-04 Go to: www.freescale.com MOTOROLA 13 Freescale Semiconductor, Inc. 4X 4X 13 TIPS 0.20 (0.008) H L-M N 0.20 (0.008) T L-M N -XX=L, M, N 52 40 1 CL 39 AB 3X -L- -M- AB B B1 13 V VIEW Y BASE METAL F PLATING V1 27 14 Freescale Semiconductor, Inc... G VIEW Y J 26 U -N- A1 0.13 (0.005) M D T L-M S N S S1 SECTION AB-AB A S 4X C θ2 0.10 (0.004) T -H-TSEATING PLANE 4X θ3 VIEW AA 0.05 (0.002) S W 2X R θ1 R1 0.25 (0.010) C2 θ GAGE PLANE K C1 E VIEW AA Z ROTATED 90 ° CLOCKWISE NOTES: 2. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 3. CONTROLLING DIMENSION: MILLIMETER 4. DATUM PLANE -H- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 5. DATUMS -L-, -M- AND -N- TO BE DETERMINED AT DATUM PLANE -H-. 6. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -T-. 7. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H8. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED 0.46 (0.018). MINIMUM SPACE BETWEEN PROTRUSION AND DIM A A1 B B1 C C1 C2 D E F G J K R1 S S1 U V V1 W Z θ θ1 θ2 θ3 MILLIMETERS MIN MAX 10.00 BSC 5.00 BSC 10.00 BSC 5.00 BSC --1.70 0.05 0.20 1.30 1.50 0.20 0.40 0.75 0.45 0.22 0.35 0.65 BSC 0.07 0.20 0.50 REF 0.08 0.20 12.00 BSC 6.00 BSC 0.09 0.16 12.00 BSC 6.00 BSC 0.20 REF 1.00 REF 0° 7° --0° 12 ° REF 12 ° REF INCHES MIN MAX 0.394 BSC 0.197 BSC 0.394 BSC 0.197 BSC --0.067 0.002 0.008 0.051 0.059 0.008 0.016 0.018 0.030 0.009 0.014 0.026 BSC 0.003 0.008 0.020 REF 0.003 0.008 0.472 BSC 0.236 BSC 0.004 0.006 0.472 BSC 0.236 BSC 0.008 REF 0.039 REF 0° 7° --0° 12 ° REF 12 ° REF Figure 11 52-pin LQFP Mechanical Dimensions (case no. 848D-03) MOTOROLA 14 MC9S12C-Family For More Information On This Product, PRODUCT PROPOSAL, Rev. 3, 12-May-04 Go to: www.freescale.com Freescale Semiconductor, Inc. L 60 41 61 D S M V P B C A-B D 0.20 M B B -A-,-B-,-D- 0.20 L H A-B -B- 0.05 D -A- S S S 40 DETAIL A Freescale Semiconductor, Inc... DETAIL A 21 80 1 0.20 A H A-B M S F 20 -DD S 0.05 A-B J S 0.20 C A-B M S D S D M E DETAIL C C -H- -C- DATUM PLANE 0.20 M C A-B S D S SECTION B-B VIEW ROTATED 90 ° 0.10 H SEATING PLANE N M G U T DATUM PLANE -H- R K W X DETAIL C Q NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -H- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -A-, -B- AND -D- TO BE DETERMINED AT DATUM PLANE -H-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -C-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. DIM A B C D E F G H J K L M N P Q R S T U V W X MILLIMETERS MIN MAX 13.90 14.10 13.90 14.10 2.15 2.45 0.22 0.38 2.00 2.40 0.22 0.33 0.65 BSC --0.25 0.13 0.23 0.65 0.95 12.35 REF 5° 10 ° 0.13 0.17 0.325 BSC 0° 7° 0.13 0.30 16.95 17.45 0.13 --0° --16.95 17.45 0.35 0.45 1.6 REF Figure 12 80-pin QFP Mechanical Dimensions (case no. 841B) MC9S12C-Family More Information On This Product, PRODUCT PROPOSAL, Rev. For 3, 12-May-04 Go to: www.freescale.com MOTOROLA 15 Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. Motorola reserves the right to make changes without further notice to any products herein. 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