MCP1256/7/8/9 Regulated 3.3V, Low-Ripple Charge Pump with LowOperating Current SLEEP Mode or BYPASS Mode Features Description • Inductorless 1.5x, 2x Boost DC/DC Converter • Output Voltage: 3.3V • High Output Voltage Accuracy: - ±3.0% (VOUT Fixed) • Output Current Up To 100 mA • 20 mVPP Output Voltage Ripple • Thermal Shutdown and Short Circuit Protection • Uses Small Ceramic Capacitors • Switching Frequency: 650 kHz • Low-Power SLEEP Mode: MCP1256/7 • BYPASS Mode: MCP1258/9 • Low-Power Shutdown Mode: 0.1 μA (Typical) • Shutdown Input Compatible with 1.8V Logic • VIN Range: 1.8V to 3.6V • Soft-Start Circuitry to Minimize Inrush Current • Temperature Range: -40°C to +125°C • Packaging: - 10-Pin, 3 mm x 3 mm DFN - 10-Pin, MSOP The MCP1256, MCP1257, MCP1258 and MCP1259 are inductorless, positive regulated charge pump DC/DC converters. The devices generate a regulated 3.3V output voltage from a 1.8V to 3.6V input. The devices are specifically designed for applications operating from 2-cell alkaline, Ni-Cd, or Ni-MH batteries or by one primary lithium MnO2 (or similar) coin cell battery. Applications • • • • Pagers Portable Measurement Instruments Home Automation Products PICmicro® MCU Bias Typical Application MCP1256 INPUT 1.8V to 3.6V CIN 10 μF 7 V IN VOUT 10 SHDN 1 PGOOD C1 1 μF ON / OFF 4 C + 1 8 C 1 C2+ C2- OUTPUT 3.3V 5 6 3 R1 C2 1 μF COUT 10 μF Power-Good Indication The MCP1256, MCP1257, MCP1258 and MCP1259 provide high efficiency by automatically switching between 1.5x and 2x boost operation. In addition, at light output loads, the MCP1256 and MCP1257 can be placed in a SLEEP mode, lowering the quiescent current while maintaining the regulated output voltage. Alternatively, the MCP1258 and MCP1259 provide a BYPASS feature connecting the input voltage to the output. This allows for real-time clocks, microcontrollers or other system devices to remain biased with virtually no current being consumed by the MCP1258 or MPC1259. In normal operation, the output voltage ripple is below 20 mVPP at load currents up to 100 mA. Normal operation occurs at a fixed switching frequency of 650 kHz, avoiding interference with sensitive IF bands. The MCP1256 and MCP1258 feature a power-good output that can be used to detect out-of-regulation conditions. The MCP1257 and MCP1259 feature a lowbattery indication that issues a warning if the input voltage drops below a preset voltage threshold. Extremely low supply current and few external parts (4 capacitors) make these devices ideal for small, batterypowered applications. A Shutdown mode is also provided for further power reduction. The devices incorporate thermal and short-circuit protection. Two package offerings are provided: 10-pin MSOP and 10-lead 3 mm x 3 mm DFN. The devices are completely characterized over the junction temperature range of -40°C to +125°C. 2 SLEEP GND 9 Typical Application with Power-Good Indication © 2006 Microchip Technology Inc. DS21989A-page 1 MCP1256/7/8/9 Package Pinouts MCP1256 PGOOD 1 SLEEP 2 9 GND C2- 3 8 C1 + 4 VOUT 5 PGOOD 1 BYPASS 2 9 GND C2- 3 8 C1+ 4 VOUT 5 10 MCP1258 SHDN LBO 1 SLEEP C1 - 7 6 MCP1257 10 SHDN 2 9 GND C2 - 3 8 C1- VIN C1+ 4 7 VIN C2 + VOUT 5 6 C2+ LBO 1 10 SHDN BYPASS 2 9 GND C1 - C2 - 3 8 C1- 7 VIN C1+ 4 7 VIN 6 C2 + VOUT 5 6 C2+ 10 SHDN MCP1259 Functional Block Diagram C2 - C2 + C1 - C1 + VIN 1.5x, 2x Mode Comparator + DQ - 840 kΩ Gate Drives S5,S7 S6 S4 S1,S3,CE 650 kHz Osc. S1 S4 VOUT 840 kΩ Bandgap Ref. 720kΩ S6 S5 480 kΩ CE S2 S3 S7 + Feedback Amplifier GND TABLE 1: VOUT SWITCH LOGIC Mode Phase Oscillator Q S1 S2(CE) S3 S4 S5 1.5x Charging H L H H 1.5x Transfer L L L L 2x Charging H H H H 2x Transfer L H L L BYPASS — — — H L S6 S7 H L L H H L H L H L H L L L H L H L H L H H H L L Legend: L is Logic Low, H is Logic High DS21989A-page 2 © 2006 Microchip Technology Inc. MCP1256/7/8/9 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings† Power Supply Voltage, VIN ...............................................3.8V Voltage on Any Pin w.r.t. GND ................. -0.3V to (VIN+0.3V) Output Short Circuit Duration ................................continuous Storage Temperature Range .........................-65°C to +150°C Ambient Temperature with Power Applied ....-55°C to +125°C Maximum Junction Temperature ................................. +150°C ESD protection on all pins Human Body Model (1.5 kΩ in Series with 100 pF).......≥ 2 kV Machine Model (200 pF, No Series Resistance) .............200V DC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, all limits apply for VIN = 1.8V to 3.6V, SHDN = VIN, CIN = COUT = 10 μF, C1 = C2 = 1 μF, IOUT = 10 mA, TJ = -40°C to +125°C. Typical values are at TJ = +25°C. Sym Min Typ Max Unit s Supply Voltage VIN 1.8 — 3.6 V Output Voltage VOUT — 3.3 — V Output Voltage Accuracy VOUT -3.0 ±0.5 +3.0 % IOUT(MAX) 30 — — mA 70 — — mA 1.8V < VIN < 2.0V 2.0V < VIN < 2.2V 2.2V < VIN < 3.6V Parameters Conditions ALL DEVICES Output Current Short Circuit Current Power Efficiency IOUT = 10 mA to IOUT(MAX) 100 — — mA ISC — 150 — mA η — 84.5 — % VIN = 1.8V, IOUT = 10 mA — 84.5 — % VIN = 1.8V, IOUT = 50 mA — 76.4 — % VIN = 2.0V, IOUT = 10 mA — 80.1 — % VIN = 2.0V, IOUT = 50 mA — 64.0 — % VIN = 2.4V, IOUT = 10 mA — 67.1 — % VIN = 2.4V, IOUT = 50 mA — 67.5 — % VIN = 2.4V, IOUT = 100 mA — 69.7 — % VIN = 2.8V, IOUT = 10 mA — 76.0 — % VIN = 2.8V, IOUT = 50 mA — 76.7 — % VIN = 2.8V, IOUT = 100 mA — 65.0 — % VIN = 3.0V, IOUT = 10 mA — 71.0 — % VIN = 3.0V, IOUT = 50 mA — 71.6 — % VIN = 3.0V, IOUT = 100 mA VOUT = 0V, VIN = 1.8V to 3.6V Shutdown Input - SHDN SHDN Input Voltage Low VIL(SHDN) — — 0.4 V SHDN Input Voltage High VIH(SHDN) 1.4 — — V SHDN Input Leakage Current ILK(SHDN) — 0.001 0.1 μA IQ — 0.25 2 μA Thermal Shutdown Threshold TJ — 160 — °C Thermal Shutdown Hysteresis TJ(HYS) — 15 — °C SHDN Quiescent Current VSHDN = 0V, TJ = +25°C Thermal Shutdown © 2006 Microchip Technology Inc. DS21989A-page 3 MCP1256/7/8/9 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all limits apply for VIN = 1.8V to 3.6V, SHDN = VIN, CIN = COUT = 10 μF, C1 = C2 = 1 μF, IOUT = 10 mA, TJ = -40°C to +125°C. Typical values are at TJ = +25°C. Parameters Sym Min Typ Max Unit s Conditions MCP1256 and MCP1257 Devices SLEEP Mode Input - SLEEP SLEEP Input Voltage Low VIL(SLEEP) — — 0.4 V SLEEP Input Voltage High VIH(SLEEP) 1.4 — — V SLEEP Input Leakage Current ILK(SLEEP) — 0.001 0.1 μA IQ — 10 20 μA PGOOD Threshold VTH — 93 — % PGOOD Hysteresis VHYS — 110 — mV VOUT Rising PGOOD Output Low Voltage VOL — 25 100 mV ISINK = 0.5 mA, VIN = 1.8V ILK(PGOOD) — 0.02 1 μA VPGOOD = VIN LBO Threshold VTH — 1.95 — V VIN Falling LBO Hysteresis VHYS — 240 — mV VIN Rising VOL — 25 100 mV ISINK = 0.5 mA, VIN = 1.8V ILK(LBO) — 0.02 1 μA VLBO = VIN SLEEP Quiescent Current VSLEEP = 0V, IOUT = 0 mA MCP1256 and MCP1258 Devices Power-Good Output - PGOOD PGOOD Input Leakage Current Percent of VOUT Falling MCP1257 and MCP1259 Low-Battery Output - LBO LBO Output Low Voltage LBO Input Leakage Current MCP1258 and MCP1259 BYPASS Mode Input - BYPASS BYPASS Input Voltage Low VIL(BYPASS) — — 0.4 V BYPASS Input Voltage High VIH(BYPASS) 1.4 — — V BYPASS Input Leakage Current ILK(BYPASS) — 0.001 0.1 μA IQ — 0.25 2 μA VBYPASS = 0V, IOUT = 0 mA, TJ = +25°C RBYPASS — 1.5 — Ω VIN = 2.4V BYPASS Quiescent Current BYPASS Input-to-Output Impedance DS21989A-page 4 © 2006 Microchip Technology Inc. MCP1256/7/8/9 AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, all limits apply for VIN = 1.8V to 3.6V, SHDN = VIN, CIN = COUT = 10 μF, C1 = C2 = 1 μF, IOUT = 10 mA, TJ = -40°C to +125°C. Typical values are at TJ = +25°C. Parameters Sym Min Typ Max Units Conditions Internal Oscillator Frequency FOSC — 650 — kHz Output Voltage Ripple, VRIP — 5 — mVp-p COUT = 10 μF, IOUT = 10 mA — 20 — mVp-p COUT = 10 μF, IOUT = 100 mA — 12 — mVp-p COUT = 2.2 μF, IOUT = 10 mA — 55 — mVp-p COUT = 2.2 μF, IOUT = 100 mA TWKUP — 175 — μs VRIP — 40 — mVp-p COUT = 10 μF, IOUT = 0.1 mA — 60 — mVp-p COUT = 10 μF, IOUT = 4 mA — 40 — mVp-p COUT = 2.2 μF, IOUT = 0.1 mA — 60 — mVp-p COUT = 2.2 μF, IOUT = 4 mA — 150 — μs ALL DEVICES Normal Operation VOUT Wake-up Time From Shutdown VIN = 3.0V, IOUT = 10 mA, SHDN = VIH(MIN), VOUT from 0 to 90% Nominal Regulated Output Voltage MCP1256 and MCP1257 Output Voltage Ripple, SLEEP Mode MCP1258 and MCP1259 VOUT Wake-up Time From BYPASS TWKUP VIN = 3.0V, IOUT = 10 mA, SHDN = VIH(MIN), VOUT from 0 to 90% Nominal Regulated Output Voltage TEMPERATURE SPECIFICATIONS Electrical Specifications: Unless otherwise indicated, all limits apply for VIN = 1.8V to 3.6V, SHDN = VIN, CIN = COUT = 10 μF, C1 = C2 = 1 μF, IOUT = 10 mA, TJ = -40°C to +125°C. Typical values are at TJ = +25°C. Parameters Sym Min Typ Max Units Conditions Specified Temperature Range TJ -40 — +125 °C Operating Temperature Range TJ -40 — +125 °C Storage Temperature Range TA -65 — +150 °C Thermal Resistance, 10-Lead, MSOP θJA — 200 — °C/W 4-Layer JC51-7 Standard Board, Natural Convection Thermal Resistance, 10-Lead, DFN 3 mm x 3 mm θJA — 57 — °C/W 4-Layer JC51-7 Standard Board, Natural Convection Temperature Ranges Thermal Package Resistances © 2006 Microchip Technology Inc. DS21989A-page 5 MCP1256/7/8/9 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 100 90 80 70 60 50 40 30 20 10 0 VIN = 1.8V VIN = 2.1V Efficiency (%) Efficiency (%) NOTE: Unless otherwise indicated, CIN = COUT = 10 μF, C1 = C2 = 1 μF, IOUT = 10 mA, and TA= +25°C. VIN = 2.4V VIN = 2.7V 10 30 50 70 90 110 100 90 80 70 60 50 40 30 20 10 0 130 IOUT = 25 mA Mode Transition 1.8 2.1 Output Current (mA) Efficiency (η) vs. Output 90 80 70 60 50 40 30 20 10 0 VIN = 2.7V VIN = 3.0V VIN = 3.3V 10 30 50 70 90 110 100 90 80 70 60 50 40 30 20 10 0 130 Mode Transition 1.8 2.1 2.4 2.7 3.0 3.3 Efficiency (%) Efficiency (%) Mode Transition 2.1 100 90 80 70 60 50 40 30 20 10 0 DS21989A-page 6 2.7 3.0 3.3 IOUT = 100 mA Mode Transition 1.8 Input Voltage (V) FIGURE 2-3: Voltage (VIN). 2.4 Efficiency (η) vs. Supply FIGURE 2-5: Voltage (VIN). IOUT = 10 mA 1.8 3.3 Input Voltage (V) Efficiency (η) vs. Output 100 90 80 70 60 50 40 30 20 10 0 3.0 IOUT = 50 mA Output Current (mA) FIGURE 2-2: Current (IOUT). 2.7 Efficiency (η) vs. Supply FIGURE 2-4: Voltage (VIN). Efficiency (%) Efficiency (%) FIGURE 2-1: Current (IOUT). 2.4 Input Voltage (V) Efficiency (η) vs. Supply 2.1 2.4 2.7 3.0 3.3 Input Voltage (V) FIGURE 2-6: Voltage (VIN). Efficiency (η) vs. Supply © 2006 Microchip Technology Inc. MCP1256/7/8/9 TYPICAL PERFORMANCE CURVES (CONTINUED) NOTE: Unless otherwise indicated, CIN = COUT = 10 μF, C1 = C2 = 1 μF, IOUT = 10 mA, and TA= +25°C. 2.4 Quiescent Supply Current (mA) Output Voltage (V) 3.5 3.4 VIN = 3.6V 3.3 VIN = 2.1V 3.2 VIN = 1.8V 3.1 3.0 2.9 10 30 50 70 90 110 2.2 VIN = 2.4V 2.0 1.8 1.6 1.4 1.2 0 130 10 20 FIGURE 2-7: Output Voltage (VOUT) vs. Output Current (IOUT). 50 60 70 140 3.4 Quiescent Supply Current (μA) Output Voltage (V) 40 IOUT = 10 mA 3.3 3.2 IOUT = 50 mA 3.1 IOUT = 100 mA 3.0 2.9 1.8 2.1 2.4 2.7 3.0 3.3 100 80 VIN = 3.0V 60 40 20 0 3.6 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 FIGURE 2-11: Quiescent Supply Current (IQ) vs. Output Current (IOUT) - SLEEP Mode. 1.8 Quiescent Supply Current (mA) 0.8 1.7 1.6 VIN = 2.4V 1.5 1.4 1.3 1.2 2 3 4 5 6 7 8 9 10 Output Current (mA) FIGURE 2-9: Quiescent Supply Current (IQ) vs. Output Current (IOUT) - Normal Mode. © 2006 Microchip Technology Inc. 2 Output Current (mA) FIGURE 2-8: Output Voltage (VOUT) vs. Input Voltage (VIN). 1 90 100 VIN = 2.4V 120 Input Voltage (V) 0 80 FIGURE 2-10: Quiescent Supply Current (IQ) vs. Output Current (IOUT) - Normal Mode. 3.5 Quiescent Supply Current (mA) 30 Output Current (mA) Output Current (mA) VIN = 2.4V 0.7 0.6 0.5 VIN = 3.0V 0.4 0.3 0.2 0.1 0 0 2 4 6 8 10 12 14 16 18 20 Output Current (mA) FIGURE 2-12: Quiescent Supply Current (IQ) vs. Output Current (IOUT) - SLEEP Mode. DS21989A-page 7 MCP1256/7/8/9 TYPICAL PERFORMANCE CURVES (CONTINUED) NOTE: Unless otherwise indicated, CIN = COUT = 10 μF, C1 = C2 = 1 μF, IOUT = 10 mA, and TA= +25°C. 0.04 Output Voltage Ripple (V) BYPASS Impedance (Ω) 2.0 1.8 1.6 1.4 1.2 1.0 1.8 2.1 2.4 2.7 3.0 3.3 VIN = 2.4V IOUT = 100 mA 0.03 0.02 0.01 0.00 -0.01 -0.02 -0.03 -0.04 3.6 0 1 2 3 Input Voltage (V) 0.02 0.01 0.00 -0.01 -0.02 -0.03 -0.04 3 4 5 6 7 8 9 0.01 0.00 -0.01 -0.02 -0.03 -0.04 0 1 2 3 0.02 0.01 0.00 -0.01 -0.02 -0.03 -0.04 4 5 6 7 8 9 10 Time (μs) FIGURE 2-15: Output Voltage Ripple vs. Time - Normal 2x Mode. DS21989A-page 8 4 5 6 7 8 9 10 FIGURE 2-17: Output Voltage Ripple vs. Time - Normal 1.5x Mode. 0.04 Output Voltage Ripple (V) Output Voltage Ripple (V) VIN = 2.4V IOUT = 50 mA 0.03 3 10 Time (μs) 0.04 2 9 0.02 10 FIGURE 2-14: Output Voltage Ripple vs. Time - Normal 2x Mode. 1 8 VIN = 3.0V IOUT = 10 mA 0.03 Time (μs) 0 7 0.04 VIN = 2.4V IOUT = 10 mA 0.03 2 6 FIGURE 2-16: Output Voltage Ripple vs. Time - Normal 2x Mode. Output Voltage Ripple (V) Output Voltage Ripple (V) 0.04 1 5 Time (μs) FIGURE 2-13: BYPASS Impedance (RBYPASS) vs. Supply Voltage (VIN). 0 4 VIN = 3.0V IOUT = 50 mA 0.03 0.02 0.01 0.00 -0.01 -0.02 -0.03 -0.04 0 1 2 3 4 5 6 7 8 9 10 Time (μs) FIGURE 2-18: Output Voltage Ripple vs. Time - Normal 1.5x Mode. © 2006 Microchip Technology Inc. MCP1256/7/8/9 TYPICAL PERFORMANCE CURVES (CONTINUED) 8 9 10 Time (μs) -0.15 Time (μs) Time (μs) 1000 900 800 700 600 500 400 300 200 100 0 -0.20 Time (μs) FIGURE 2-21: Output Voltage Ripple vs. Time - SLEEP Mode. -0.20 3 -0.30 2 -0.40 1 -0.50 0 -0.60 Output Voltage Ripple (V) -0.15 -0.10 500 -0.10 VIN = 2.4V IOUT = 10 mA 4 250 -0.05 0.00 5 200 0.00 0.10 6 150 0.05 0.20 7 100 0.10 8 50 VIN = 2.4V IOUT = 10 mA 0.15 0 0.20 FIGURE 2-23: Output Voltage Ripple vs. Time - SLEEP Mode. SLEEP Input Voltage (V) FIGURE 2-20: Output Voltage Ripple vs. Time - SLEEP Mode. Output Voltage Ripple (V) 1000 -0.20 1000 900 800 700 600 500 400 300 200 100 -0.20 -0.10 900 -0.15 800 -0.10 0.00 -0.05 400 -0.05 0.05 300 0.00 0.10 200 0.05 VIN = 3.0V IOUT = 10 mA 0.15 100 0.10 0.20 0 VIN = 2.4V IOUT = 1 mA 0.15 FIGURE 2-22: Output Voltage Ripple vs. Time - SLEEP Mode. Output Voltage Ripple (V) 0.20 0 Output Voltage Ripple (V) FIGURE 2-19: Output Voltage Ripple vs. Time - Normal 1.5x Mode. © 2006 Microchip Technology Inc. 1000 7 700 6 450 5 Time (μs) 600 4 400 3 500 2 350 1 300 0 900 -0.20 800 -0.04 -0.15 700 -0.03 -0.10 600 -0.02 0.00 -0.05 500 -0.01 0.05 400 0.00 0.10 300 0.01 VIN = 3.0V IOUT = 1 mA 0.15 200 0.02 0.20 100 VIN = 3.0V IOUT = 100 mA 0.03 0 Output Voltage Ripple (V) 0.04 Output Voltage Ripple (V) NOTE: Unless otherwise indicated, CIN = COUT = 10 μF, C1 = C2 = 1 μF, IOUT = 10 mA, and TA= +25°C. Time (μs) FIGURE 2-24: Output Voltage Ripple vs. Time - Mode Transition: SLEEP Mode-to-Normal 2x Mode-to-SLEEP Mode. DS21989A-page 9 MCP1256/7/8/9 TYPICAL PERFORMANCE CURVES (CONTINUED) NOTE: Unless otherwise indicated, CIN = COUT = 10 μF, C1 = C2 = 1 μF, IOUT = 10 mA, and TA= +25°C. 8 0.10 7 -0.40 -0.50 IOUT -0.30 -0.40 1 -0.50 0 -0.60 0 500 450 400 350 Time (μs) FIGURE 2-27: 8 0.10 7 0.10 -0.40 0.05 -0.50 IOUT 500 450 400 350 300 250 200 150 100 0 -0.60 50 0.00 VIN 3 DS21989A-page 10 -0.20 -0.30 2 -0.40 1 -0.50 0 -0.60 Time (μs) Time (μs) FIGURE 2-26: Load Transient Response Normal 1.5x Mode. -0.10 500 -0.30 450 0.15 IOUT = 100 mA 4 400 -0.20 350 VIN = 3.0V 0.20 0.00 5 300 -0.10 150 0.25 0.10 VOUT 6 50 0.00 0.20 0 VOUT 0.30 Line Transient Response. Output Voltage Ripple (V) 0.20 0.35 Input Voltage (V) 0.40 100 Load Transient Response - Output Voltage Ripple (V) Output Current (A) FIGURE 2-25: Normal 2x Mode. Time (μs) 250 300 250 200 150 100 0 -0.60 50 0.00 -0.20 2 200 0.05 -0.10 500 0.10 VIN 3 450 -0.30 400 0.15 IOUT = 10 mA 4 350 -0.20 300 VIN = 2.4V 0.20 0.00 5 250 -0.10 200 0.25 0.10 VOUT 6 150 0.00 50 0.30 0.20 Output Voltage Ripple (V) 0.20 100 VOUT Input Voltage (V) 0.35 Output Voltage Ripple (V) Output Current (A) 0.40 FIGURE 2-28: Line Transient Response. © 2006 Microchip Technology Inc. MCP1256/7/8/9 3.0 PIN DESCRIPTION The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin No. DFN MSOP 1 1 Symbol Function PGOOD Power-Good Indication Open-Drain Output Pin: MCP1256 and MCP1258 LBO Low-Battery Indication Open-Drain Output Pin: MCP1257 and MCP1259 SLEEP Active Low SLEEP Mode Input Pin: MCP1256 and MCP1257 2 2 3 3 4 4 C1+ Flying Capacitor Positive Pin 5 5 VOUT Regulated 3.3V Output Voltage 6 6 C2+ Flying Capacitor Positive Pin 7 7 VIN Power Supply Input Voltage 8 8 C1- Flying Capacitor Negative Pin 9 9 GND 10 10 SHDN BYPASS 3.1 3.1.1 C2- Active Low BYPASS Mode Input Pin: MCP1258 and MCP1259 Flying Capacitor Negative Pin 0V Reference Active Low SHUTDOWN Mode Input Pin Status Indication (PGOOD, LBO) POWER-GOOD OUTPUT PIN (PGOOD) MCP1256/8: PGOOD is high impedance when the output voltage is in regulation. A logic low is asserted when the output falls 7% (typical) below the nominal value. The PGOOD output remains low until VOUT is within 3% (typical) of its nominal value. On start-up, this pin indicates when the output voltage reaches its final value. PGOOD is high impedance when SHDN is low or when BYPASS is low (MCP1258). 3.1.2 LOW-BATTERY OUTPUT PIN (LBO) MCP1257/9: LBO is high impedance when the input voltage is above the low-battery threshold voltage. A logic low is asserted when the input falls below the lowbattery threshold voltage. The LBO output remains low until VIN is above the low-battery threshold voltage plus the low-battery hysteresis voltage. LBO is high impedance when SHDN is low or when BYPASS is low (MCP1259). 3.2 3.2.1 Mode Selection (SLEEP, BYPASS) ACTIVE LOW SLEEP MODE (SLEEP) MCP1256/7: A logic low signal applied to this pin places the device into a SLEEP mode of operation. In this mode, the device maintains regulation. SLEEP mode performs pulse skip operation reducing the current draw of the device at the expense of increased output voltage ripple. 3.2.2 ACTIVE LOW BYPASS MODE (BYPASS) MCP1258/9: A logic low signal applied to this pin places the device into a BYPASS mode of operation. In this mode, the input supply voltage is connected directly to the output. 3.3 Flying Capacitor Negative (C2-) A 1 μF ceramic flying capacitor is recommended. 3.4 Flying Capacitor Positive (C1+) A 1 μF ceramic flying capacitor is recommended. 3.5 Regulated Output Voltage (VOUT) Regulated 3.3V output. Bypass to GND with a minimum of 2.2 μF. 3.6 Flying Capacitor Positive (C2+) A 1 μF ceramic flying capacitor is recommended. 3.7 Power Supply Input Voltage (VIN) A supply voltage of 1.8V to 3.6V is recommended. Bypass to GND with a minimum of 1 μF. 3.8 Flying Capacitor Negative (C1-) A 1 μF ceramic flying capacitor is recommended. 3.9 0V Reference (GND) Connect to negative terminal of and input supply. 3.10 Device Shut Down (SHDN) A logic low signal applied to this pin disables the device. A logic high signal applied to this pin allows normal operation. © 2006 Microchip Technology Inc. DS21989A-page 11 MCP1256/7/8/9 4.0 DEVICE OVERVIEW The MCP1256/7/8/9 devices are positive regulated charge pumps that accept an input voltage from +1.8V to +3.6V and convert it to a regulated 3.3V output voltage. The MCP1256/7/8/9 provide a low-cost, compact and simple solution for step-up DC/DC conversions, primarily in battery applications, that do not want to use switching regulator solutions because of EMI noise and inductor size. The MCP1256/7/8/9 are designed to offer the highest possible efficiency under common operating conditions, i.e. VIN = 2.4V or 2.8V, VOUT = 3.3V, IOUT = 100 mA. A fixed switching frequency, 650 kHz typically, allows for easy external filtering. The MCP1256/7 provide a unique SLEEP mode feature which reduces the current drawn from the input supply while maintaining a regulated bias on external peripherals. SLEEP mode can substantially increase battery run-time in portable applications. The MCP1258/9 provide a unique BYPASS mode feature which virtually eliminates the current drawn from the input supply by the device while maintaining an unregulated bias on external peripherals. BYPASS connects the input supply voltage to the output. All remaining functions of the device are shutdown. BYPASS mode can substantially increase battery runtime in portable applications. (2x mode), when the energy is transferred to the output. The transfer mode determines which switches are closed for the transfer. Both phases occur in one clock period of the internal oscillator. When the second phase (transfer) has been completed, the cycle repeats. 4.2 Power Efficiency The power efficiency, η, is determined by the mode of operation, 1.5x mode or 2x mode. Equation 4-1 and Equation 4-2 are used to approximate the power efficiency with any significant amount of output current. At light loads, the device quiescent current must be taken into consideration. EQUATION 4-1: VOUT × I OUT V OUT P OUT η 1.5x = ------------= ----------------------------------------- = ---------------------PIN VIN × 1.5 × I OUT VIN × 1.5 EQUATION 4-2: POUT VOUT × I OUT V OUT η 2x = ------------= ------------------------------------ = -----------------P IN V IN × 2 × I OUT VIN × 2 4.3 Shutdown Mode (SHDN) The devices supply up to 100 mA of output current for input voltages, VIN, greater than or equal to 2.2V. The devices are available in small 10-Pin MSOP or DFN packages with an operating junction temperature range of -40°C to +125°C. Driving SHDN low places the MCP1256/7/8/9 in a lowpower Shutdown mode. This disables the charge-pump switches, oscillator and control logic, reducing the quiescent current to 0.25 μA (typical). The PGOOD output and LBO are in a high impedance state during shutdown. 4.1 4.4 Theory of Operation The MCP1256/7/8/9 devices employ a switched capacitor charge pump to boost an input supply, VIN, to a regulated 3.3V output voltage. Refering to the Functional Block Diagram, the devices perform conversion and regulation in two phases: charge and transfer. When the devices are not in shutdown, SLEEP or BYPASS, the two phases are continuously cycled through. Charge transfers charge from the input supply to the flying capacitors, C1 and C2, connected to pins C1+, C1-, C2+ and C2-, respectively. During this phase, switches S4 and S6 are closed. Switch S2 controls the amount of charge transferred to the flying capacitors. The amount of charge is determined by a sample and hold error amplifier with feedback from the output voltage at the beginning of the phase. Once the first phase (charge) is complete, transfer is initiated. The second phase transfers the energy from the flying capacitors to the output. The MCP1256/7/8/9 devices autonomously switch between 1.5x mode and 2x mode. This determines whether the flying capacitors are placed in parallel (1.5x mode), or remain in series DS21989A-page 12 SLEEP Mode (SLEEP) The MCP1256/7 provide a unique SLEEP mode feature. SLEEP mode reduces the current drawn from the input supply while maintaining a regulated bias on external peripherals. SLEEP mode can substantially increase battery run-time in portable applications. The regulation control is referred to as a bang-bang control due to the output being regulated around a fixed reference with some hysteresis. As a result, some amount of peak-to-peak ripple will be observed at the output independent of load current. The frequency of the output ripple, however, will be influenced heavily by the load current and output capacitance. 4.5 BYPASS Mode (BYPASS) The MCP1258/9 provide a unique BYPASS mode feature which virtually eliminates the current drawn from the input supply by the device, while maintaining an unregulated bias on external peripherals. BYPASS connects the input supply voltage to the output. All remaining functions of the device are shutdown. BYPASS mode can substantially increase battery runtime in portable applications. © 2006 Microchip Technology Inc. MCP1256/7/8/9 4.6 Power-Good Output (PGOOD) For the MCP1256/8 devices, the PGOOD output is an open-drain output that sinks current when the regulator output voltage falls below 0.93VOUT (typical). If the regulator output voltage falls below 0.93VOUT (typical) for less than 200 μs and then recovers, glitch immunity circuits prevent the PGOOD signal from transitioning low. A 10 kΩ to 1 MΩ pull-up resistor from PGOOD to VOUT may be used to provide a logic output. If not used, connect PGOOD to GND or leave unconnected. PGOOD is high impedance when the output voltage is in regulation. A logic low is asserted when the output falls 7% (typical) below the nominal value. The PGOOD output remains low until VOUT is within 3% (typical) of its nominal value. On start-up, this pin indicates when the output voltage reaches its final value. PGOOD is high impedance when SHDN is low or when BYPASS is low (MCP1258). 4.7 Low-Battery Output (LBO) For the MCP1257/9 devices, the LBO output is an open-drain output that sinks current when the input voltage falls below a preset threshold. If the input voltage falls below the preset threshold for less than 200 μs and then recovers, glitch immunity circuits prevent the LBO signal from transitioning low. A 10 kΩ to 1 MΩ pull-up resistor from LBO to VOUT may be used to provide a logic output. If not used, connect LBO to GND or leave unconnected. LBO is high impedance when the input voltage is above the low-battery threshold voltage. A logic low is asserted when the input falls below the low-battery threshold voltage. The LBO output remains low until VIN is above the low-battery threshold voltage plus the low-battery hysteresis voltage. LBO is high impedance when SHDN is low or when BYPASS is low (MCP1259). 4.8 Soft-Start and Short-Circuit Protection The MCP1256/7/8/9 devices feature fold back shortcircuit protection. This circuitry provides an internal soft-start function by limiting inrush current during startup and also limits the output current to 150 mA (typical), if the output is short-circuited to GND. The internal soft-start circuitry requires approximately 175 μs, typical, from either initial power-up, release from Shutdown, or release from BYPASS (MCP1258/9) for the output voltage to be in regulation. © 2006 Microchip Technology Inc. 4.9 Thermal Shutdown The MCP1256/7/8/9 devices feature thermal shutdown with temperature hysteresis. When the die temperature exceeds 160°C, the device shuts down. When the die cools by 15°C, the MCP1256/7/8/9 automatically turns back on again. If high die temperature is caused by output overload and the load is not removed, the device will turn on and off resulting in a pulsed output. 5.0 APPLICATIONS 5.1 Capacitor Selection The style and value of capacitors used with the MCP1256/7/8/9 family determine several important parameters, such as output voltage ripple and charge pump strength. To minimize noise and ripple, it is recommended that low ESR (0.1Ω) capacitors be used for both CIN and COUT. These capacitors should be ceramic and should be 10 μF or higher for optimum performance. If the source impedance to VIN is very low, up to several megahertz, CIN may not be required. Alternatively, a somewhat smaller value of CIN may be substituted for the recommended 10 μF, but will not be as effective in preventing ripple on the VIN pin. The value of COUT controls the amount of output voltage ripple present on VOUT. Increasing the size of COUT will reduce output ripple at the expense of a slower turn-on time from shutdown and a higher inrush current. The flying capacitors (C1 and C2) control the strength of the charge pump and in order to achieve the maximum rated output current (100 mA), it is necessary to have at least 1 μF of capacitance for the flying capacitor. A smaller flying capacitor delivers less charge per clock cycle to the output capacitor resulting in lower available output current. 5.2 PCB Layout Issues The MCP1256/7/8/9 devices transfer charge at high switching frequencies producing fast, high peak, transient currents. As a result, any stray inductance in the component layout will produce unwanted noise in the system. Proper board layout techniques are required to ensure optimum performance. DS21989A-page 13 MCP1256/7/8/9 6.0 TYPICAL APPLICATION CIRCUITS The MCP1256/7/8/9 devices are inductorless, positive regulated, switched capacitor DC/DC converters. Typical application circuits are depicted in Figure 6-1. MCP1256 INPUT 1.8V to 3.6V 7 CIN VIN VOUT OUTPUT 3.3V 5 R1 10 μF 10 4 C1 1 μF 8 2 SHDN PGOOD C1 + C2 + C1 - C2- COUT 10 μF 1 Power-Good Indication 6 3 C2 1 μF SLEEP GND ON / OFF 9 Typical Application with Power-Good Indication MCP1259 INPUT 1.8V to 3.6V 7 CIN VIN VOUT OUTPUT 3.3V 5 COUT R1 10 μF 10 4 C1 1 μF 8 2 SHDN LBO C1 + C2 + C1 - C2 - 10 μF 1 Low-Battery Indication 6 3 C2 1 μF BYPASS ON / OFF GND 9 Typical Application with Low-Battery Indication FIGURE 6-1: DS21989A-page 14 Typical Application Circuits. © 2006 Microchip Technology Inc. MCP1256/7/8/9 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 10-Lead DFN 1 2 3 4 XXXX XYWW NNN 5 10 1 9 2 8 3 7 4 6 5 10-Lead MSOP XXXXX YWWNNN Legend: XX...X Y YY WW NNN e3 * Note: Example: 10 1256 E607 256 9 8 7 6 Example: 1259E 607256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2006 Microchip Technology Inc. DS21989A-page 15 MCP1256/7/8/9 10-Lead Plastic Dual-Flat No-Lead Package (MF) 3x3x0.9 mm Body (DFN) – Saw Singulated b E p n L K D PIN 1 ID INDEX AREA (NOTE 1) D2 EXPOSED METAL PAD (NOTE 2) 2 1 E2 TOP VIEW BOTTOM VIEW A EXPOSED TIE BAR (NOTE 3) A3 A1 INCHES Units Dimension Limits MIN Number of Pins n MILLIMETERS* NOM MIN MAX NOM MAX 10 10 Pitch e Overall Height A .031 .035 .039 0.80 0.90 1.00 Standoff A1 .000 .001 .002 0.00 0.02 0.05 Lead Thickness A3 Overall Length .020 BSC 0.50 BSC .008 REF. 0.20 REF. E .112 .118 .124 2.85 3.00 3.15 E2 .082 .094 .096 2.08 2.39 2.45 D .112 .118 .124 2.85 3.00 3.15 D2 .051 .065 .067 1.30 1.65 1.70 Lead Width b .008 .010 .015 0.18 0.25 0.30 Contact Length § L .012 .016 .020 0.30 0.40 0.50 Contact-to-Exposed Pad § K .008 — — 0.20 — — Exposed Pad Length (Note 3) Overall Width Exposed Pad Width (Note 3) * Controlling Parameter § Significant Characteristic Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Exposed pad varies according to die attach paddle size. 3. Package may have one or more exposed tie bars at ends. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M JEDEC equivalent: Not Registered Drawing No. C04-063 DS21989A-page 16 Revised 09-12-05 © 2006 Microchip Technology Inc. MCP1256/7/8/9 10-Lead Plastic Micro Small Outline Package (UN) (MSOP) E E1 p D 2 B 1 n α c φ A1 L β Number of Pins Pitch A2 A (F) Units Dimension Limits n p Overall Height INCHES NOM MIN MAX MIN MILLIMETERS* NOM 10 MAX 10 0.50 BSC .020 BSC A .043 – – 1.10 .037 0.75 0.85 0.95 .006 0.00 Molded Package Thickness A2 .030 Standoff A1 .000 Overall Width E Molded Package Width E1 .193 BSC .118 BSC Overall Length D .118 BSC Foot Length L F φ .016 0° – 8° 0° – 8° c .003 – .009 0.08 – 0.23 B α .006 .009 .012 0.15 0.23 0.30 5° 5° – – 15° 15° 5° 5° – – 15° 15° Footprint Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bott om β .033 0.15 4.90 BSC 3.00 BSC 3.00 BSC .024 .037 REF .031 0.40 0.60 0.80 0.95 REF * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254 mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dime nsion, usually witho ut tolerance, for information purposes only. See ASME Y14.5M JEDEC Equivalent: MO-187 BA Revised 09-16-05 Drawing No. C04-021 © 2006 Microchip Technology Inc. DS21989A-page 17 MCP1256/7/8/9 NOTES: DS21989A-page 18 © 2006 Microchip Technology Inc. MCP1256/7/8/9 APPENDIX A: REVISION HISTORY Revision A (March 2006) • Original Release of this Document. © 2006 Microchip Technology Inc. DS21989A-page 19 MCP1256/7/8/9 NOTES: DS21989A-page 20 © 2006 Microchip Technology Inc. MCP1256/7/8/9 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X /XX Device Temperature Range Package Device MCP1256: MCP1256T: MCP1257: MCP1257T: MCP1258: MCP1258T: MCP1259: MCP1259T: Temperature Range E Package MF UN Positive Regulated Charge Pump with SLEEP Mode and Power-Good Indication Positive Regulated Charge Pump with SLEEP Mode and Power-Good Indication, Tape and Reel Positive Regulated Charge Pump with SLEEP Mode and Low-Battery Indication Positive Regulated Charge Pump with SLEEP Mode and Low-Battery Indication, Tape and Reel Positive Regulated Charge Pump with BYPASS Mode and Power-Good Indication Positive Regulated Charge Pump with BYPASS Mode and Power-Good Indication, Tape and Reel Positive Regulated Charge Pump with BYPASS Mode and Low-Battery Indication Positive Regulated Charge Pump with BYPASS Mode and Low -Battery Indication, Tape and Reel = -40°C to +125°C = Dual Flat, No Lead (3x3 mm body), 10-Lead = Plastic Micro Small Outline (MSOP), 10-Lead © 2006 Microchip Technology Inc. Examples: a) b) MCP1256-EMF: MCP1256T-EMF: c) d) MCP1256-EUN: MCP1256T-EUN: a) b) MCP1257-EMF: MCP1257T-EMF: c) d) MCP1257-EUN: MCP1257T-EUN: a) b) MCP1258-EMF: MCP1258T-EMF: c) d) MCP1258-EUN: MCP1258T-EUN: a) b) MCP1259-EMF: MCP1259T-EMF: c) d) MCP1259-EUN: MCP1259T-EUN: E-Temp, DFN package Tape and Reel, E-Temp, DFN package E-Temp, MSOP package Tape and Reel, E-Temp, MSOP package E-Temp, DFN package Tape and Reel, E-Temp, DFN package E-Temp, MSOP package Tape and Reel, E-Temp, MSOP package E-Temp, DFN package Tape and Reel, E-Temp, DFN package E-Temp, MSOP package Tape and Reel, E-Temp, MSOP package E-Temp, DFN package Tape and Reel, E-Temp, DFN package E-Temp, MSOP package Tape and Reel, E-Temp, MSOP package DS21989A-page 21 MCP1256/7/8/9 NOTES: DS21989A-page 22 © 2006 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, Real ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and Zena are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2006 Microchip Technology Inc. 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