ICS MK2746G

MK2746
DVD/MPEG CLOCK SOURCE
Description
Features
The MK2746 is a low cost, low jitter, high performance
clock synthesizer for DVD and other MPEG2 based
applications. Using analog Phase Locked Loop (PLL)
techniques, the device accepts a 27 MHz fundamental
mode crystal or clock input to produce multiple output
clocks including the processor clock, audio clock, bus
driver clock, SDRAM clock and a Video clock. The
audio clocks are frequency locked to the 27 MHz input
using our patented zero ppm error techniques, allowing
audio and video to track exactly, thereby eliminating the
need for large buffer memory.
• Packaged in 16 pin TSSOP
• Operating voltage of 3.3 V
• Provides tight jitter controlled selectable processor
clock per table.
• Provides selectable audio clock per table.
• Provides fixed outputs of 27 MHz (Video), 50 MHz
(DSP/Bus clock) and 133.33 MHz (SDRAM).
• Advanced, low power, sub-micron CMOS process
ICS manufacturers the largest variety of DVD, set top
box, and multimedia clock synthesizers for all
applications.
Block Diagram
VDD
3
Audio
AS1:0
Processor
(Tight Jitter)
PLL / Clock
Circuit
50M Bus Clock
PS1:0
133.33 M SDRAM Clock
27 MHz crystal
or clock
X1
X2
Clock Buffer/
Crystal
Ocsillator
27M Video Clock
2
GND
1
MDS 2746 A
I n t e gra te d C i r c u i t S y s t e m s
●
525 Race Stre et, San Jo se, CA 9 5126
Revision 100802
●
te l (40 8) 2 95-98 00
●
w w w. i c st . c o m
MK2746
DVD/MPEG CLOCK SOURCE
Pin Assignment
Clock Output Select Table in MHz
X2
1
16
VDD
AS1
AS0
Audio CLK
X1/ICLK
2
15
27M
0
0
12.288
VDD
3
14
AS0
0
1
11.2896
GND
4
13
ACLK
1
0
18.432
PCLK
5
12
AS1
1
1
8.192
PS0
6
11
VDD
PS1
PS0
133.33M
7
10
GND
Processor
CLK
PS1
8
9
50M
0
0
66.66
0
1
41.66
1
0
50
1
1
58.33
16 pin (173 mil) TSSOP
0 = connect directly to GND
1 = connect directly to VDD
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X2
Input
Connect to a 27 MHz fundamental mode crystal. Leave open for clock input.
2
X1/ICLK
Input
Connect to a 27 MHz fundamental mode crystal or clock.
3
VDD
Power
Connect to +3.3 V.
4
GND
Power
Connect to ground
5
PCLK
Output
Processor clock output. Determined by the status of PS1, PS0 per table
above.
6
PS0
Input
7
133.33M
Output
Processor Clock select 0. Selects processor clock per table above.
SDRAM clock output.
8
PS1
Input
9
50M
Output
50 MHz clock output.
10
GND
Power
Connect to ground.
11
VDD
Power
Connect to +3.3 V.
12
AS1
Input
Audio clock select 1. Selects audio clock per table above.
13
ACLK
Output
Audio clock output determined by the status of PS1, PS0.
14
AS0
Input
Audio clock select 0. Selects audio clock per table above.
15
27M
Output
27 MHz clock output.
16
VDD
Power
Connect to +3.3 V.
2
MDS 2746 A
In te grated Circuit Systems
Processor Clock select 1. Selects processor clock per table above.
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525 Ra ce Street, San Jose, CA 9512 6
Revision 100802
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MK2746
DVD/MPEG CLOCK SOURCE
External Component Selection
PCB Layout Recommendations
The MK2746 requires a minimum number of external
components for proper operation.
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
Decoupling Capacitors
Decoupling capacitors of 0.01µF should be connected
between VDD and GND as close to the MK2746 as
possible. For optimum device performance, the
decoupling capacitors should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
Series Termination Resistor
When the PCB traces between the clock outputs and
the loads are over 1 inch, series termination should be
used. To series terminate a 50Ω trace (a commonly
used trace impedance) place a 33Ω resistor in series
with the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20Ω.
Crystal Tuning Load Capacitors
For a crystal input, a parallel resonant fundamental
mode crystal should be used. Crystal capacitors must
be connected between each of the pins X1 and X2 to
ground. The value (in pF) of these crystal caps should
equal (CL-6)*2. In this equation CL is equal to the
crystal load capacitance in pF. As an example, for a
crystal with an 18 pF load capacitance, each crystal
capacitor would be 24 pF [(18-6)*2=24].
1) The 0.01µF decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
decoupling capacitor and VDD pin. The PCB trace to
VDD pin should be kept as short as possible, as should
the PCB trace to the ground via. Distance of the ferrite
bead and bulk decoupling from the device is less
critical.
2) The external crystal should be mounted just next to
the device with short traces. The X1 and X2 traces
should not be routed next to each other with minimum
spaces, instead they should be separated and away
from other traces.
3) To minimize EMI the 33Ω series termination resistor,
if needed, should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers (the ferrite bead and bulk decoupling
capacitor can be mounted on the back). Other signal
traces should be routed away from the MK2746. This
includes signal traces just underneath the device, or on
layers adjacent to the ground plane layer used by the
device.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK2746. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
7V
All Inputs and Outputs
-0.5 V to VDD+0.5 V
Ambient Operating Temperature
0 to +70°C
Storage Temperature
-65 to +150°C
Soldering Temperature
260°C
3
MDS 2746 A
In te grated Circuit Systems
●
525 Ra ce Street, San Jose, CA 9512 6
Revision 100802
●
tel (4 08) 295-9 800
●
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MK2746
DVD/MPEG CLOCK SOURCE
Recommended Operation Conditions
Parameter
Min.
Max.
Units
0
+70
°C
+3.0
+3.6
V
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Typ.
DC Electrical Characteristics
VDD=3.3 V ±10% , Ambient temperature 0 to +70°C, unless stated otherwise
Parameter
Symbol
Conditions
Operating Voltage
VDD
Input High Voltage
Input Low Voltage
Input High Voltage
VIH
VIL
VIH
input selects
input selects
ICLK
Input Low Voltage
VIL
ICLK
Output High Voltage
VOH
IOH = -12 mA
Output Low Voltage
VOL
IOL = 12 mA
Output High Voltage (CMOS
Level)
VOH
IOH = -4 mA
Operating Supply Current
IDD
No load
Short Circuit Current
Input Capacitance
Min.
Typ.
Max.
Units
3.6
V
0.8
V
V
V
(VDD/2)+1
V
3.0
2.0
(VDD/2)-1
VDD/2
VDD/2
2.4
V
0.4
V
VDD-0.4
V
40
mA
IOS
±70
mA
CIN
5
pF
Nominal Output Impedance
ZOUT
20
Ω
On Chip Pull-up Resistor
RPU
AS1, AS0 pins
120
kΩ
PS1 pin
510
kΩ
AC Electrical Characteristics
VDD = 3.3 V ±10%, Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
Input Frequency
Typ.
Max. Units
27
MHz
Output Rise Time
tOR
20% to 80% of VDD, Note 1
1.0
1.8
ns
Output Fall Time
tOF
80% to 20% of VDD, Note 1
1.0
1.8
ns
Output Clock Duty Cycle
tD
at VDD/2, Note 1
50
60
%
Maximum Output Jitter,
short term, peak to peak
tJ
PCLK output, Note 1
+100
ps
Maximum Output Jitter,
short term, peak to peak
tJ
All clocks, except PCLK,
Note 1
+200
ps
Maximum Output Jitter,
long term, peak to peak
tJ
1000 cycles, except ACLK,
Note 1
750
ps
40
Note 1: Measured with 15 pF Load.
4
MDS 2746 A
In te grated Circuit Systems
●
525 Ra ce Street, San Jose, CA 9512 6
Revision 100802
●
tel (4 08) 295-9 800
●
w w w. i c s t . c o m
MK2746
DVD/MPEG CLOCK SOURCE
Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
16
Symbol
E1
E
IN D EX
AR EA
1
2
D
A
2
Min
A
A1
A2
b
C
D
E
E1
e
L
α
aaa
Inches*
Max
-1.20
0.05
0.15
0.80
1.05
0.19
0.30
0.09
0.20
4.90
5.1
6.40 BASIC
4.30
4.50
0.65 Basic
0.45
0.75
0°
8°
-0.10
Min
Max
-0.047
0.002
0.006
0.032
0.041
0.007
0.012
0.0035 0.008
0.193
0.201
0.252 BASIC
0.169
0.177
0.0256 Basic
0.018
0.030
0°
8°
-0.004
*For reference only. Controlling dimensions in mm.
A
A
1
c
-C e
S E A T IN G
P LA N E
b
L
aaa C
Ordering Information
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
MK2746G
MK2746GT
MK2746G
MK2746GT
Tubes
Tape and Reel
16-pin TSSOP
16-pin TSSOP
0 to +70° C
0 to +70° C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
5
MDS 2746 A
In te grated Circuit Systems
●
525 Ra ce Street, San Jose, CA 9512 6
Revision 100802
●
tel (4 08) 295-9 800
●
w w w. i c s t . c o m