MM58241 High Voltage Display Driver General Description Features The MM58241 is a monolithic MOS integrated circuit utilizing CMOS metal gate low threshold P- and N-channel devices. It is available both in 40-pin molded dual-in-line packages or as dice. The MM58241 is particularly suited for driving high voltage (60V max) vacuum fluorescent (VF) displays (e.g., a 32-digit alphanumeric or dot matrix display). Y Applications Y Y Y Y Y Y Y Y Y Y Y Y Y COPSTM or microprocessor-driven displays Instrumentation readouts Industrial control indicator Digital clock, thermostat, counter, voltmeter Word processor text displays Automotive dashboards Y Direct interface to high voltage display Serial data input No external resistors required Wide display power supply operation LSTTL compatible inputs Software compatible with NS display driver family Compatible with alphanumeric or dot matrix displays Display blanking control input Simple to cascade Block Diagram TL/F/5600 – 1 FIGURE 1 COPSTM is a trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/5600 RRD-B30M105/Printed in U. S. A. MM58241 High Voltage Display Driver September 1992 Absolute Maximum Ratings Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VDD) VSS e 0V Voltage at Any Input Pin Display Voltage (VDIS) Temperature Range Min VDD a 0.3V to VSS b 0.3V VDD to VDD b 62.5V 62.5V b 65§ C to a 150§ C Voltage at Any Display Pin VDD a lVDISl Storage Temperature Power Dissipation at a 25§ C Molded DIP Package, Board Mount Molded DIP Package, Socket Mount Junction Temperature Max Units V V §C 4.5 5.5 b 55 b 25 b 40 a 85 2.28W* 2.05W** 130§ C Lead Temperature (Soldering, 10 sec.) 260§ C *Molded DIP Package, Board Mount, iJA e 46§ C/W, Derate 21.7 mW/§ C above a 25§ C. **Molded DIP Package, Socket Mount, iJA e 51§ C/W, Derate 19.6 mW/§ C above a 25§ C. DC Electrical Characteristics TA e b40§ C to a 85§ C, VDD e 5V g 0.5V, VSS e 0V unless otherwise specified Symbol Parameter Power Supply Currents IDD IDIS Conditions Min Typ VIN e VSS or VDD, VSS e 0V, VDIS Disconnected VDD e 5.5V, VSS e 0V, VDIS e b55V All Outputs Low Max Units 150 10 mA mA 0.8 V V 0.4 V V V 10 mA 15 pF 400 550 650 4.0 3.7 3.4 kX kX kX kX kX kX VDIS a 4 V Input Logic Levels DATA IN, CLOCK ENABLE, BLANK VIL VIH Logic ‘0’ Logic ‘1’ (Note 1) VOL VOH VOH Data Output Logic Levels Logic ‘0’ Logic ‘1’ Logic ‘1’ IOUT e 400 mA IOUT e b10 mA IOUT e b500 mA IIN CIN Input Currents DATA IN, CLOCK ENABLE, BLANK 2.4 VDD b 0.5 2.8 VIN e 0V or VDD b 10 Input Capacitance DATA IN, CLOCK ENABLE, BLANK Display Output Impedances VDD e 5.5V, VSS e 0V ROFF Output Off (Figure 3a) RON Output On (Figure 3b) VDIS VDIS VDIS VDIS VDIS VDIS VDOL Display Output Low Voltage Note 1: 74LSTTL VOH e 2.7V @ e e e e e e b 25V b 40V b 55V b 25V b 40V b 55V 60 70 80 3.0 2.6 2.3 VDD e 5.5V, IOUT e Open Circuit, b 55V s VDIS s b 25V IOUT e b 400 mA, TTL VOH e 2.4V @ IOUT e b 400 mA. 2 VDIS AC Electrical Characteristics TA e b40§ C to a 85§ C, VDD e 5V g 0.5V Symbol Parameter Conditions Min Typ Max Units 800 300 300 kHz ns ns fC tH tL Clock Input Frequency High Time Low Time (Notes 3 and 4) tDS tDH Data Input Set-Up Time Hold Time 100 100 ns ns tES tEH Enable Input Set-Up Time Hold Time 100 100 ns ns tCDO Data Output CLOCK Low to Data Out Time CL e 50 pF 500 ns Note 2: For timing purposes, the signals ENABLE and BLANK can be considered to be totally independent of each other. Note 3: AC input waveform specification for test purposes: tr, tf s 20 ns, f e 800 kHz, 50% g 10% duty cycle. Note 4: Clock input rise and fall times must not exceed 5 ms. Connection Diagrams Plastic Chip Carrier Dual-In-Line Package TL/F/5600 – 2 Top View TL/F/5600 – 8 FIGURE 2 Top View Order Number MM58241N or MM58241V See NS Package Number N40A or V44A Functional Description to be loaded into the shift register following ENABLE high. A logic ‘1’ at the input will turn on the corresponding display digit/segment/dot output. A significant reduction in discrete board components can be achieved by use of the MM58241, because external pulldown resistors are not required. Due to the nature of the output stage, both its on and off impedance values vary as a function of the display voltage applied. However, Figures 3a and 3b show that this output impedance will remain constant for a fixed value of display voltage. This product is specifically designed to drive multiplexed or non-multiplexed high voltage alphanumeric or dot matrix vacuum fluorescent (VF) displays. Character generation is done externally in the microprocessor, with a serial data path to the display driver. The MM58421 uses three signals, DATA IN, CLOCK and ENABLE, where ENABLE acts as an external load signal. Display blanking can be achieved by means of the BLANKING CONTROL input, and a logic ‘1’ will turn off all sections of the display. A block diagram of the MM58241 is shown in Figure 1. Figure 2 shows the pinout of the MM58241 device, where output 1 (pin 18) is equivalent to bit 1, i.e., the first bit of data 3 Functional Description (Continued) Figure 4 demonstrates the critical timing requirements between CLOCK and DATA IN for the MM58241. To clear (reset) the display driver at power on or any time, the following flushing routine may be used. With the enable signal high, clock in 32 zeroes. Drive the enable signal low and the display will be blank. It is recommended to clear the driver at power on. In Figure 5, the ENABLE signal acts as an envelope, and only while this signal is at a logic ‘1’ does the circuit accept CLOCK input signals. Data is transferred and shifted in the internal shift register on the rising clock edge, i.e., ‘0’–‘1’ transition. When the ENABLE signal goes low, the contents of the shift registers are latched, and the display will show new data. During data transfer, the display will show old data. DATA OUT is also provided on the MM58241, being output on the falling edge. At any time, the display may be blanked under processor control, using the BLANKING CONTROL input. Figure 6 shows a schematic diagram of a microprocessorbased system where the MM58241 is used to provide the grid drive for a 32-digit 5 x 7 dot matrix vaccum fluorescent (VF) display. The anode drive in this example is provided by another member of the high voltage display driver family, namely the MM58248, which does not require an externally generated load signal. TL/F/5600 – 3 FIGURE 3a. Output Impedance Off TL/F/5600 – 4 FIGURE 3b. Output Impedance On Timing Diagrams For the purposes of AC measurements, VIH e 2.4V, VIL e 0.8V. FIGURE 4. Clock and Data Timings 4 TL/F/5600 – 5 Timing Diagrams (Continued) TL/F/5600 – 6 FIGURE 5. MM58241 Timings (Data Format) Typical Application TL/F/5600 – 7 FIGURE 6. Microprocessor-Controlled Word Processor 5 6 Physical Dimensions inches (millimeters) Molded Dual-In-Line Package Order Number MM58241N NS Package Number N40A 7 MM58241 High Voltage Display Driver Physical Dimensions inches (millimeters) (Continued) Plastic Chip Carrier (V) Order Number MM58241V NS Package Number V44A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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