MN102H74D, MN102H74G MN102H74D Type Minimum Instruction Execution Time FLASH 64K 128K 4K RAM (byte) Package (Lead-free) MN102HF74G Mask ROM Internal ROM type ROM (byte) MN102H74G LQFP100-P-1414 [With main clock operated] 83.3 ns (at 3.0 V to 3.6 V, 12 MHz) Interrupts /RST pin, Watchdog, /NMI pin, Timer counter 0 to 9 underflow, Timer counter 10 to 13 under/o Verflow, Timer counter 10 to 13 compare capture A, Timer counter 10 to 13 compare capture B, ATC ch.0 to ch.3 tra nsfer finish, External 0 to 5, Serial ch.0 to ch.3 tra nsmission, Serial ch.0 to ch.3 reception, A/D conversion finish, USB general-purpose, USBSOF, USB end points 1 to 8 Timer Counter Timer counter 0 : 8-bit × 1 (timer output, event count, timer interrupt) Clock source................ SYSCLK; XI; prescaler 0; TM0IO pin Interrupt source ........... Timer counter 0 underflow Timer counter 1 : 8-bit × 1 (timer output, event count, timer interrupt) Clock source................ SYSCLK; prescaler 0; TM1IO pin Interrupt source ........... Timer counter 1 underflow Connectable Timer counters 0 to 1 Timer counter 2 : 8-bit × 1 (timer output, event count, timer interrupt, A/D conversion start) Clock source................ SYSCLK; 1/8 of SYSCLK; 1/32 of SYSCLK; timer counter 3 underflow; timer counter 4 underflow; TM2IO pin Interrupt source ........... Timer counter 2 underflow Timer counter 3 : 8-bit × 1 (timer output, event count, timer interrupt) Clock source................ SYSCLK; 1/8 of SYSCLK; 1/32 of SYSCLK; timer counter 2 underflow; timer counter 4 underflow; TM3IO pin Interrupt source ........... Timer counter 3 underflow Timer counter 4 : 8-bit × 1 (timer output, event count, timer interrupt) Clock source................ SYSCLK; 1/8 of SYSCLK; 1/32 of SYSCLK; timer counter 2 underflow; timer counter 3 underflow; TM4IO pin Interrupt source ........... Timer counter 4 underflow Timer counter 5 : 8-bit × 1 (timer output, event count, timer interrupt) Clock source................ SYSCLK; 1/8 of SYSCLK; 1/32 of SYSCLK; timer counter 2 underflow; timer counter 3 underflow; timer counter 4 underflow; TM5IO pin Interrupt source ........... Timer counter 5 underflow Connectable Timer counters 2 to 5 Timer counter 6 : 8-bit × 1 (timer output, event count, timer interrupt, serial clock generation) Clock source................ SYSCLK; 1/8 of SYSCLK; 1/32 of SYSCLK; timer counter 7 underflow; timer counter 8 underflow; TM6IO pin Interrupt source ........... Timer counter 6 underflow Timer counter 7 : 8-bit × 1 (timer output, event count, timer interrupt, serial clock generation) Clock source................ SYSCLK; 1/8 of SYSCLK; 1/32 of SYSCLK; timer counter 6 underflow; timer counter 8 underflow; TM7IO pin Interrupt source ........... Timer counter 7 underflow MAE00011GEM MN102H74D, MN102H74G Timer counter 8 : 8-bit × 1 (timer output, event count, timer interrupt, serial clock generation) Clock source................ SYSCLK; 1/8 of SYSCLK; 1/32 of SYSCLK; timer counter 6 underflow; timer counter 7 underflow; TM8IO pin Interrupt source ........... Timer counter 8 underflow Timer counter 9 : 8-bit × 1 (timer output, event count, timer interrupt) Clock source................ SYSCLK; 1/8 of SYSCLK; 1/32 of SYSCLK; timer counter 6 underflow; timer counter 7 underflow; timer counter 8 underflow; TM9IO pin Interrupt source ........... Timer counter 9 underflow Connectable Timer counters 6 to 9 Timer counter 10 : 16-bit × 1 (timer output, event count, input capture, PWM output, 2-phase encoder input) Clock source................ SYSCLK; 1/8 of SYSCLK; timer counter 2 or 3 underflow; 2-phase encoding of TM10IOA/TM10IOB pin (1×, 4×); TM10IOB pin Interrupt source ........... Timer counter 10 under/overflow; timer counter 10 compare capture A; timer counter 10 compare capture B Timer counter 11 : 16-bit × 1 (timer output, event count, input capture, PWM output, 2-phase encoder input) Clock source................ SYSCLK; 1/8 of SYSCLK; timer counter 8 or 9 underflow; 2-phase encoding of TM11IOA/TM11IOB pin (1×, 4×); TM11IOB pin Interrupt source ........... Timer counter 11 under/overflow; timer counter 11 compare capture A; timer counter 11 compare capture B Timer counter 12 : 16-bit × 1 (timer output, event count, input capture, PWM output, 2-phase encoder input) Clock source................ SYSCLK; 1/8 of SYSCLK; timer counter 4 or 5 underflow; 2-phase encoding of TM12IOA/TM12IOB pin (1×, 4×); TM12IOB pin Interrupt source ........... Timer counter 12 under/overflow; timer counter 12 compare capture A; timer counter 12 compare capture B Timer counter 13 : 16-bit × 1 (timer output, event count, input capture, PWM output, 2-phase encoder input) Clock source................ SYSCLK; 1/8 of SYSCLK; timer counter 6 or 7 underflow; 2-phase encoding of TM13IOA/TM13IOB pin (1×, 4×); TM13IOB pin Interrupt source ........... Timer counter 13 under/overflow; timer counter 13 compare capture A; timer counter 13 compare capture B Serial interface Serial 0 : 8-bit × 1 (transfer direction of MSB/LSB selectable; transmission / reception of 7, 8-bit length) Clock source................ 1/2 or 1/16 of timer counter 6 underflow; external pin Serial 1 : 8-bit × 1 (transfer direction of MSB/LSB selectable; transmission / reception of 7, 8-bit length) Clock source................ 1/2 or 1/16 of timer counter 7 underflow; external pin Serial 2 : 8-bit × 1 (transfer direction of MSB/LSB selectable; transmission / reception of 7, 8-bit length) Clock source................ 1/2 or 1/16 of timer counter 8 underflow; external pin Serial 3 : 8-bit × 1 (transfer direction of MSB/LSB selectable; transmission / reception of 7, 8-bit length) Clock source................ 1/2 or 1/16 of timer counter 9 underflow; external pin UART × 4 (common use with serial 0 to 3) I²C × 2 (common use with serial 0, 1; single master) MAE00011GEM DMA controller 4-ch. DMA transfer enabled between memory and memory or memory and peripheral register by set interrupt factor and software activation setting Transfer unit : bytes/word Transfer mode : 1 word/burst (max. 128 K bytes) Transfer addressing : source/destination pointer fix/increment High-speed transfer enabled between USB-FIFO and internal RAM in single address mode USB Functions Conforms to USB1.1. USB transceiver built-in Full-speed (12 Mbps) supported. 9 end points (FIFO built-in independently) FIFO size (EP0, 1, 2, 3, 4, 5, 6, 7, 8) : 64, 128, 128, 128, 128, 128, 128, 128, 128 bytes ・EP0 Control transfer IN/OUT (two ways) ・EP1 to EP8 Interrupt/Bulk/Isochronous transfer supported. Settable to IN or OUT. Double Buffering function supported. When the MAXP size is set to a half or less of the MAXFIFO size for each EP, the Double Buffering function is made valid automatically. I/O Pins 77 I/O Common use : 77 (pull-up resistance specifiable) A/D converter 10-bit × 8-ch. (with S/H) Special Ports USB ports (D+, D-) Notes 4 multiply PLL built-in, generation of internal 48 MHz at external oscillation 12 MHz Electrical Charactreistics (Supply current) Parameter Symbol Operating supply current IDDopr Supply current at STOP IDDS Supply current at HALT0 IDDH Condition Limit min typ max Unit VI = VDD or VSS, output open 65+10α* mA f = 12 MHz , VDD = 3.3 V Pin with pull-up resistor is open all other input pins and 70 µA Hi-Z state input/output pins are simultaneously applied VDD or VSS level 30+10α* mA f = 12 MHz , VDD = 3.3 V, output open (Ta = –20°C to +70°C , VDD = 3.3 V, VSS = 0 V) Note) * "α" depends on products. MN102H74D, MN102H74G α= 0 MN102HF74G α = 1 Development tools In-circuit Emulator PX-ICE102H74-LQFP100-P-1414 MAE00011GEM MN102H74D, MN102H74G PA5, SBT0, SCL0 PA4, SBO0, SDA0 PA3, SBI0, AN7 PA2, SBT1, AN6, SCL1 PA1, SBO1, AN5, SDA1 PA0, SBI1, AN4 VDD (VPP) P93, AN3, TM13IOB P92, AN2, TM13IOA P91, AN1, TM12IOB P90, AN0, TM12IOA VSS P84, SBT2, TM11IOB P83, SBO2, TM11IOA P82, SBI2 VSS D− D+ VDD USBMODE P81, TM10IOB, STOP P80, TM10IOA, WDOUT * * 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 /NMI Pin Assignment MN102H74D MN102H74G 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 WAIT, P50 /RE, P51 /WEL, P52 /WEH, P53 /CS0, P60 /CS1, P61 /CS2, P62 /CS3, P63 TM0IO, /BREQ, P64 TM1IO, /BRACK, P65 /WR, P66 /WORD, P67 A00, P20 A01, P21 A02, P22 A03, P23 VDD BOSC, SYSCLK, P54 VSS XI XO VDD OSCI OSCO MODE PB0, /IRQ0 PB1, /IRQ1 PB2, /IRQ2 PB3, /IRQ3 PB4, /IRQ4 PB5, /IRQ5 /RST VDD P00, D00 P01, D01 P02, D02 P03, D03 P04, D04 P05, D05 P06, D06 P07, D07 VSS P10, D08, (TM2IO) P11, D09, (TM3IO) P12, D10, (TM4IO) P13, D11, (TM5IO) P14, D12, (TM6IO) P15, D13, (TM7IO) P16, D14, (TM8IO) P17, D15, (TM9IO) LQFP100-P-1414 Note *: Use 4.7 kΩ to 10 kΩ MAE00011GEM /CS3S, (TM9IO), SBT3, P72 /CS2S, (TM8IO), SBO3, P71 /CS1S, (TM7IO), SBI3, P70 /CS0S, (TM6IO), A23, P47 (TM5IO), A22, P46 (TM4IO), A21, P45 (TM3IO), A20, P44 VSS (TM2IO), A19, P43 A18, P42 A17, P41 A16, P40 A15, P37 A14, P36 A13, P35 A12, P34 VDD A11, P33 A10, P32 A09, P31 A08, P30 A07, P27 A06, P26 A05, P25 A04, P24 Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. 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(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. 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