MPS MP6401DQT

MP6401
300mA LDO Linear Regulator with
Integrated Reset Circuit
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP6401 combines a low-dropout linear
regulator with an integrated reset circuit. It
operates from a 2.5V to 5.5V input voltage and
regulates the output voltage with 2% accuracy
at 1.8V, 2.5V, 3.3V or adjustable value. It
delivers up to 300mA of load current. By
combining an LDO linear regulator with a reset
circuit, these products can reduce cost and save
space in compact portable devices such as cell
phones, smart phones, PDAs, PMPs, and
portable GPS devices.
The MP6401 provides a push-pull, active-low
that asserts when the regulator output voltage
drops below the microprocessor supply
threshold (-7.5% or -12.5% of nominal output
voltage). Four reset delay time, 3.125ms, 25ms,
200ms and 1580ms can be selected. The
MP6401 is available in 3mmx3mm TQFN8,
2mmx2mm TQFN6 and TSOT packages and is
specified for operation from -40°C to 85°C.
•
•
•
•
•
•
•
•
•
•
Low Quiescent Current of 80μA for Battery
Powered Equipment
Low 114mV Dropout at 300mA Output
±2% Accurate Output Voltage
Fixed Output Voltage Options of 1.8V, 2.5V
or 3.3V
Adjustable Output Voltage from 1.229V to
5V Using an External Resistor Divider
15μVRMS Ultra Low Noise Output
PSRR: 57dB at 1kHz
Input Reverse Current, Thermal and
Short-Circuit Protection
Microprocessor Reset with Four Delay time
Options
Push-Pull RESET
APPLICATIONS
•
•
•
•
Smart Phone and Cell Phone
Portable GPS Devices
Wireless Devices
PDA and PMP
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. “MPS” and “The
Future of Analog IC Technology” are Registered Trademarks of Monolithic
Power Systems, Inc.
TYPICAL APPLICATION
2.5V to 5.5V
IN
MP6401
CIN
ADJ
EN
VI/O
OUT
R1
RESET
GND
uP
RESET
GND
COUT
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
1
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
ORDERING INFORMATION
Part Number*
MP6401DQT-18AD3
MP6401DQT-18BD3
MP6401DQT-25AD3
MP6401DQT-25BD3
MP6401DQT-33BD3
MP6401DGT-18AD3
MP6401DGT-18BD3
MP6401DGT-25AD3
MP6401DGT-25BD3
MP6401DGT-33BD3
MP6401DJ-18AD3
MP6401DJ-18BD3
MP6401DJ-25AD3
MP6401DJ-25BD3
MP6401DJ-33BD3
Package
Top Marking
Free Air Temperature
(TA)
7T
8T
5T
6T
4T
7T
8T
5T
6T
4T
7T
8T
5T
6T
4T
–40°C to +85°C
TQFN8 (3mmx3mm)
TQFN6 (2mmx2mm)
TSOT23-6
* For other versions, contact factory for availability.
Note:
}
MP6401DQT
DG _ _ _ D _ -LFZ
Reset Delay Time (Table 3)
DJ
Reset Threshold Accuracy (Table 2)
Output Voltage (Table 1)
Package
Temperature
Table 1—Output Voltage Suffix Guide
Suffix
18
25
33
Output Voltage
1.8
2.5
3.3
Table 2—Reset Threshold Accuracy
Suffix
A
B
Vout Reset Threshold (%)
-7.5%
-12.5%
Table 3—Reset Delay Time Guide
Suffix
D1
D2
D3
D4
MP6401 Rev. 1.0
9/7/2012
Typical Reset Delay Time (ms)
3.125
25
200
1580
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
2
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
TOP VIEW
IN
1
8
OUT
IN
2
7
OUT
GND
3
6
ADJ
EN
4
5
RESET
TQFN8 (3mm x 3mm)
IN
1
6
OUT
GND
2
5
ADJ
EN
3
4
RESET
EN
1
6
RESET
GND
2
5
ADJ
IN
3
4
OUT
TSOT23-6
TQFN6 (2mm x 2mm)
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
IN, EN, OUT.................................–0.3V to + 6 V
ADJ ..................................................–0.3V to 6V
RESET .............................................–0.3V to 6V
(2)
Continuous Power Dissipation. (TA = +25°C)
TQFN8 (3mm x 3mm) .............................. 2.6W
TQFN6 (2mm x 2mm) ............................ 1.56W
TSOT ....................................................... 0.57W
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature.............. –65°C to +150°C
TQFN8 (3mm x 3mm) ...........48 ...... 11 ... °C/W
Recommended Operating Conditions
(3)
Supply Voltage VIN ..........................2.5V to 5.5V
Operating Junct. Temp (TJ)..... –40°C to +125°C
MP6401 Rev. 1.0
9/7/2012
(4)
θJA
θJC
TQFN6 (2mm x 2mm) ...........80 ...... 16 ... °C/W
TSOT .....................................220 .... 110 .. °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
(MAX),
the
maximum
junction
temperature
TJ
junction-to-ambient thermal resistance θJA, and the ambient
temperature TA. The maximum allowable continuous power
dissipation at any ambient temperature is calculated by PD
(MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable
power dissipation will cause excessive die temperature, and
the regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
o
damage. Thermal shutdown engages at TJ=150 C(TYP) and
o
disengages at TJ=130 C(TYP)
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7 4-layer board.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
3
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
ELECTRICAL CHARACTERISTICS
VIN = (VOUT + 0.5V) or +2.5V, whichever is greater, COUT = 3.3µF. Typical Value at TA = +25°C unless
otherwise noted.
Parameter
Input Supply Range
Input Undervoltage Lockout
Hysteresis of UVLO
Symbol
VIN
VUVLO
VHYS
Supply
Current (Ground
Current)
IQ
Shutdown Supply Current
Regulation Circuit
Output Current
Output Voltage Accuracy
(Fixed Output Voltage)
Adjustable Output Voltage
Range
ADJ Reference Voltage
ADJ Threshold
ADJ Input Leakage Current
Dropout Voltage
Output Voltage) (5)
(Fixed
Short Current Limit
In Regulation Current Limit
Input Reverse Leakage
Current
(OUT
to
IN
Leakage Current)
EN Input Low Voltage
EN Input High Voltage
EN Input Current
Thermal-Shutdown
Temperature
Thermal-Shutdown
Hysteresis
ISHDN
Condition
VIN falling
Min
2.5
1.85
Typ
2.05
190
Max
5.5
2.2
Unit
V
V
mV
IOUT = 0
80
155
μA
TA=+25°C
0.1
1
μA
300
1mA ≤ IOUT ≤ 300mA
-2
+2
%
VADJ
5
V
1.229
250
±20
1.253
±100
V
mV
nA
VOUT = +3.3V, IOUT = 300mA
114
220
mV
VIN ≥2.5V
VIN ≥2.5V
375
500
VIN = 4V, VOUT = 5V, EN
deasserted, TA=+25°C
0.01
VADJ
IADJ
∆VDO
mA
1.205
VADJ = 0, +1.2V
VIL
VIH
EN= VIN or GND, TA=+25°C
0.7Vin
-1
0.1
mA
mA
1
μA
0.3VIN
V
V
μA
+1
TSHDN
150
°C
∆TSHDN
20
°C
0.02
%/V
0.1
%
15
µVRMS
VOUT=1.5V, 2.5V ≤ VIN ≤ 5.5V,
IOUT = 10mA
Line Regulation
VOUT = 1.5V, VIN = 2.5V,
1mA ≤ IOUT ≤ 150mA
10Hz to 100kHz, CIN = 0.1µF,
IOUT = 100mA,VOUT = 1.5V
Load Regulation
Output Voltage Noise
Reset Circuit
VOUT Reset Threshold
VTHOUT
MP6401_ _ - _ _ AD_
90
92.5
95
MP6401_ _ - _ _ BD_
85
87.5
90
D1
D2
2.2
17.5
30
3.125
25
4.0
32.5
D3
140
200
260
D4
1106
1580
2054
VOUT to Reset Delay
Reset Delay Time
MP6401 Rev. 1.0
9/7/2012
Td
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
%
VOUT
μs
ms
4
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
ELECTRICAL CHARACTERISTICS (continued)
VIN = (VOUT + 0.5V) or +2.5V, whichever is greater, COUT = 3.3µF. Typical Value at TA = +25°C unless
otherwise noted.
Parameter
RESET
Symbol
Output
Voltage
VOL
Push-Pull
VOH
Condition
VOUT ≥ 1.0V, ISINK = 50µA,
RESET asserted
VOUT ≥ 1.5V, ISINK = 3.2mA,
RESET asserted
VOUT ≥ 2.0V, ISOURCE = 500µA,
RESET deasserted
Min
Typ
Max
Unit
0.3
0.4
V
0.8VOUT
Notes:
5) Dropout Voltage is defined as the input to output differential when the output voltage drops 100mV below its nominal value.
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
5
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
PIN FUNCTIONS
TQFN8 TQFN6 TSOT
Pin #
Pin# Pin#
Name
1
2
3
4
1
3
IN
2
3
2
1
GND
EN
5
4
6
6
5
5
6
4
7
8
MP6401 Rev. 1.0
9/7/2012
Description
Supply input pin.
Ground.
Enable (Active High). Connect EN to IN generally. Don’t float EN pin.
Push-pull RESET . It asserts when the OUT voltage drops below its
RESET threshold. When OUT voltage recover, RESET deasserts after a fix delay
time (four options).
Mode selector input. When ADJ is connected to the tap of an external resistor
ADJ
divider from the OUT to GND, the OUT voltage is adjustable. When ADJ is
connected to GND, a preset output voltage is selected.
OUT
Regulator output pin.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
6
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
TYPICAL PERFORMANCE CHARACTERISTICS
VIN=5V, VOUT=3.3V, COUT=3.3µF, TA= -40°C to +85°C, Typical values are at TA=+25°C, unless
otherwise noted.
Supply Current vs.
Input Votage
Supply Current vs.
Input Votage
Supply Current vs.
Input Votage
ADJ=GND, IOUT=300mA
ADJ=GND, IOUT=0
460
100
430
85
430
400
70
400
370
55
370
4.2
4.6
5
INPUT VOLTAGE (V)
40
5.4
4.2
4.6
5
DROPOUT VOLTAGE (mV)
85
70
55
70
140
60
120
50
100
80
60
20
10
0
1
Stable Region
PLUSE DURATION (us)
1.5
RESET ASSERTS ABOVE
THIS LINE
90
0
50
100 150 200 250 300
60
30
LOAD CURRENT (mA)
MP6401 Rev. 1.0
9/7/2012
1
10
102 103 104
105
FREQUENCY (Hz)
106
Output Voltage Accuray
vs. Temperature
0
0
10
Transient Duration
vs. RESET Threshold
Overdrive
120
2
0
50 100 150 200 250 300
LOAD CURRENT (m A)
3
Unstable Region
30
20
Region of Stable Cout ESR
vs. Load Current
2.5
40
40
5.5
5.5
IOUT=300mA
OUTPUT VOLTAGE ACCURACY(%)
4.5
4.5
PSRR vs. Frequency
0
3.5
3.5
INPUT VOLTAGE (V)
160
INPUT VOLTAGE (V)
0.5
340
2.5
5.4
Dropout Voltage vs.
Load Current
VO=1.5V, IOUT=0
40
2.5
VO=1.5V, IOUT=300mA
INPUT VOLTAGE (V)
Supply Current vs.
Input Votage
100
3.8
PSRR (dB)
340
3.8
460
100
RESET THRESHOLD OVERDRIVE (mV)
0.5
0.3
0.1
-0.1
-0.3
-0.5
-40
-20
0
20
40
60
80
TEMPERATURE (OC)
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
7
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=5V, VOUT=3.3V, COUT=3.3μF, TA= -40°C to +85°C, Typical values are at TA=+25°C, unless
otherwise noted.
VOUT
2V/div.
VRESET
2V/div.
VIN
5V/div.
Reset Response To VIN Rising
ADJ=GND,IOUT = 0
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
8
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
BLOCK DIAGRAM
EN
IN
EN
Vref1
--
Driver
EA
+
Reverse
Current
Protection
Current Limit
ADJ
OUT
--
Vref2
Thermal
Protection
+
Mode
Selector
--
RESET
Comparator
RESET
Logic
Vref3
+
Figure 1—MP6401 Block Diagram
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
9
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
TIMING DIAGRAM
VIN
5V
0
t
Figure 2—RESET Timing Diagram
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
10
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
OPERATION
The MP6401 integrates a low noise, low dropout,
low quiescent current linear regulator and a
microprocessor reset circuit. It operates from a
2.5V to 5.5V input voltage and regulates the fixed
output voltage with 2% accuracy at 1.8V, 2.5V,
3.3V or adjustable value. The MP6401 can supply
to 300mA of load current. The internal reset
circuit is used to monitor the regulator output
voltage. The RESET asserts when the regulator
output voltage drops below the standard
microprocessor supply threshold.
Linear Regulator
The MP6401 can output a fixed voltage (1.8V,
2.5V, 3.3V options) or adjustable voltage which
ranges from 1.25V to 5V with 2.0% accuracy by
operating from a +2.5V to +5.5V input. The
MP6401 can supply up to 300mA of load current.
When ADJ is connected to GND, a fixed output
voltage is selected. Connecting ADJ pin to the tap
of external resistor divider from the OUT to GND,
adjustable output voltage is selected. The typical
ADJ connection is shown in Fig 3.
2.5V to 5.5V
IN
OUT
MP6401
R1
ADJ
EN
GND
R2
Figure 3—Output Voltage Adjusted with
Resistor Divider
Reset Function
The reset circuit monitors the OUT voltage.
RESET asserts while OUT voltage falls below its
threshold. Two OUT voltage thresholds (-7.5%
and -12.5%) are available. The power-up,
power-down, and brownout conditions will make
RESET asserted. So MP6401 monitor circuit
could right control the microprocessor. RESET
asserts when the input and output voltage below
their thresholds. RESET asserts when EN is a
low logic. When the assert trigger condition is
removed, RESET will deassert after a fixed delay
time. Four options of reset delay-time (see Table
3) can be selected.
MP6401 Rev. 1.0
9/7/2012
EN Shutdown
The MP6401 can be switched ON or OFF by a
logic input at the EN pin. A high voltage at this pin
will turn the device on. When the EN pin is low,
the regulator output is off and the supply current
is reduced. Generally, the EN pin should be tied
to IN to keep the regulator output always on. Do
not float the EN pin.
Reverse Leakage Protection
An internal circuit monitors VIN and VOUT to control
the reverse leakage current from OUT to IN.
While VIN decreases lower than VOUT and EN still
hold logic high, the monitor circuit turns off the
pass element and its parasitic diode. Typically the
reverse leakage current through pass element
decreases to 0.1uA. RESET deasserts until VIN
returns greater than VOUT and VOUT is higher than
its preset threshold.
MP6401 also can work with backup battery at
OUT after input power supply is removed as
shown in Fig 4. When input power supply is
removed, RESET asserts. The backup battery
will power the device through two external diodes
and typically the current from OUT to ground is
40uA. So, the power supply removing does not
erase RAM content if the voltage of backup
battery is greater than memory’s standby
specification. The backup battery can be replaced
by a super-cap, while the diode connected with
battery is changed to a current-limiting resistor.
Removable
IN
OUT
MP6401
EN
3.3uF
Backup
Battery
uP
MEMORY
Figure 4— Maintain Memory with Backup
Battery
Current Limit
The MP6401 includes a current limit structure
which monitors and controls pass element gate
voltage limiting the guaranteed maximum output
current to 500mA.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
11
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
Thermal Shutdown
Thermal protection turns off the pass element
when the junction temperature exceeds +150ºC,
allowing to cool the IC. When the IC’s junction
temperature drops by 20ºC, the pass element will
be turned on again. Thermal protection limits total
power dissipation on the MP6401. For reliable
operation, junction temperature should be limited
to 125 ºC maximum.
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
12
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
APPLICATION INFORMATION
Adjustable Regulator Output
The OUT voltage of MP6401 has two modes
available (fixed and adjustable output voltage).
When ADJ pin is connected to GND, the regulator
works in fixed voltage mode. The regulator output
voltage will equal to preset voltage (1.8V, 2.5V or
3.3V options). In fixed voltage mode, the
impedance between ADJ and ground should
always be less than 50kΩ. Generally, ADJ is
connected directly to ground.
When the ADJ pin is connected to the tap of an
external resistor divider, the regulator works in
adjustable voltage mode as shown in Fig 3. The
output voltage is selected by resistor divider, thus
R + R2
VOUT = 1.229 × 1
R2
In adjustable voltage mode, R2 equal to 13kΩ is
recommended as a good tradeoff among stability,
accuracy and high-frequency PSRR. R2 should
be not greater than 100kΩ.
Output Capacitor Selection
The MP6401 is designed specifically to work with
very low ESR ceramic output capacitor 3.3uF
(min). For performance consideration, a large
ceramic capacitor such as 10uF is better. X7R or
X5R capacitor dielectric is recommended.
OUT Voltage Transient Immunity
The MP6401 can be immune to OUT pin short
negative transient. Typically, the immune duration
is 60us with 10mV overdriving. A shorter negative
transient can not make the RESET output assert.
Power Dissipation
The power dissipation for any package depends
on the thermal resistance of the case and circuit
board, the temperature difference between the
junction and ambient air, and the rate of airflow.
The power dissipation across the device can be
represented by the equation:
P = (VIN - VOUT) ×IOUT
The allowable power dissipation can
calculated using the following equation:
be
PD (MAX) = (TJ (MAX)-TA)/θJA
Where (TJ(MAX)-TA) is the temperature difference
between the junction and the ambient
environment, θJA is the thermal resistance from
the junction to the ambient environment.
Connecting the GND pin of MP6401 to ground
using a large pad or ground plane helps to
channel heat away.
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
13
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
PACKAGE INFORMATION
TQFN8 (3mm x 3mm)
2.90
3.10
0.30
0.50
PIN 1 ID
MARKING
0.20
0.30
2.90
3.10
PIN 1 ID
INDEX AREA
1.45
1.75
PIN 1 ID
SEE DETAIL A
8
1
2.25
2.55
0.65
BSC
4
5
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
0.30x45º TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.70
0.80
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
2.90
0.70
1.70
0.25
2.50
0.65
RECOMMENDED LAND PATTERN
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
14
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
TQFN6 (2mm x 2mm)
PIN 1 ID
MARKING
1.90
2.10
0.30
0.40
0.20
0.30
1.90
2.10
PIN 1 ID
INDEX AREA
0.65
0.85
PIN 1 ID
SEE DETAIL A
1
6
1.25
1.45
0.65
BSC
3
4
TOP VIEW
BOTTOM VIEW
0.70
0.80
0.20 REF
PIN 1 ID OPTION A
0.30x45º TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.00
0.05
SIDE VIEW
DETAIL A
NOTE:
1.90
0.70
0.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) JEDEC REFERENCE IS MO-229, VARIATION WCCC.
5) DRAWING IS NOT TO SCALE.
0.25
1.40
0.65
RECOMMENDED LAND PATTERN
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
15
MP6401 – 300mA LDO LINEAR REGULATOR WITH INTEGRATED RESET IC
TSOT23-6
6
See Note 7
EXAMPLE
TOP MARK
4
AAAA
PIN 1
0.95
BSC
0.60
TYP
2.80
3.00
1
1.20
TYP
1.50
1.70
2.60
TYP
2.60
3.00
3
TOP VIEW
RECOMMENDED LAND PATTERN
0.84
0.90
1.00 MAX
0.09
0.20
SEATING PLANE
0.30
0.50
0.95 BSC
0.00
0.10
SEE DETAIL "A"
FRONT VIEW
SIDE VIEW
NOTE:
GAUGE PLANE
0.25 BSC
0.30
0.50
0o-8o
DETAIL
A
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.10 MILLIMETERS MAX.
5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AB.
6) DRAWING IS NOT TO SCALE.
7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM
LEFT TO RIGHT, (SEE EXAMPLE TOP MARK)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP6401 Rev. 1.0
9/7/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
16