MP6900 Fast Turn-off Intelligent Controller The Future of Analog IC Technology DESCRIPTION The MP6900 is a low-drop, fast turn-off intelligent controller that combined with an external switch replaces Schottky diodes in high-efficiency, Flyback converters. The chip regulates the forward drop of an external switch to about 70mV and switches it off as soon as the voltage becomes negative. Package choices are a space saving TSOT23-5, QFN6 (3x3mm) or SOIC-8. FEATURES • • • • • • • • • Works with both Standard and Logic Level FETS Compatible with Energy Star, 1W Standby Requirements VDD Range From 8V to 24V Fast Turn-off Total Delay of 20ns Max 400kHz Switching Frequency <3mA Low Quiescent Current Supports CCM, DCM and Quasi-Resonant Topologies Supports High-side and Low-side Rectification Power Savings of Up to 1.5W in a Typical Notebook Adapter APPLICATIONS • • • • Industrial Power Systems Distributed Power Systems Battery Powered Systems Flyback Converters All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 1 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER ORDERING INFORMATION Part Number Package Top Marking MP6900DJ* MP6900DS** MP6900DQ*** TSOT23-5 SOIC-8 QFN6 (3x3mm) 6D MP6900DS 5D * For Tape & Reel, add suffix –Z (e.g. MP6900DJ–Z). For RoHS Compliant Packaging, add suffix –LF (e.g. MP6900DJ–LF–Z) ** For Tape & Reel, add suffix –Z (e.g. MP6900DS–Z). For RoHS Compliant Packaging, add suffix –LF (e.g. MP6900DS–LF–Z) *** For Tape & Reel, add suffix –Z (e.g. MP6900DQ–Z). For RoHS Compliant Packaging, add suffix –LF (e.g. MP6900DQ–LF–Z) PACKAGE REFERENCE TOP VIEW 1 VSS 2 VDD 3 MARKING VG TOP VIEW 5 4 PGND VD PGND 1 8 VG EN 2 7 NC NC 3 6 VDD VD 4 5 VSS TSOT23-5 SOIC-8 QFN6 (3x3mm) ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VDD to Vss ......................................-0.3V to +27V PGND to VSs ................................-0.3V to +0.3V VG to VSS ......................................... -0.3V to VCC VD to VSS .....................................-0.7V to +180V EN to VSS .....................................-0.3V to +6.5V Maximum Operating Frequency............. 400kHz Continuous Power Dissipation (TA = +25°C) (2) SOIC8 ...................................................... 1.39W TSOT23-5 ................................................ 0.57W QFN6 (3x3mm) .......................................... 2.5W Junction Temperature ...............................150°C Lead Temperature (Solder).......................260°C Storage Temperature .............. -55°C to +150°C SOIC8..................................... 90 ...... 45... °C/W TSOT23-5.............................. 220 .... 110.. °C/W QFN6 (3x3mm) ....................... 50 ...... 12... °C/W Recommended Operation Conditions (3) (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature. TJ(MAX) the junction-toambient thermal resistance θJA and the ambient temperature TA. The maximum allowable power dissipation at any ambient temperature is calculated using: PD(MAX)=(TJ(MAX)-TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. VDD to Vss ............................................8V to 24V Operating Junction Temp. (TJ).... -40°C to +125°C MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER ELECTRICAL CHARACTERISTICS VDD = 12V, TA= +25°C, unless otherwise noted. Parameter VDD Voltage Range VDD UVLO Rising VDD UVLO Hysteresis Operating Current Quiescent Current Shutdown Current VDD=20V Thermal Shutdown Thermal Shutdown hysteresis Enable (Low) Enable (High) Pull-up Current On Enable CONTROL CIRCUITRY SECTION VSS –VD Forward Voltage, Vfwd Turn-on Delay Pull-down Resistance of VG Pin Input Bias Current On VD Pin Minimum On-time GATE DRIVER SECTION VG (Low) VG (High) Turn-off Threshold (VSS-VD) Turn-off Propagation Delay Turn-off Total Delay (5) Pull-down Impedance Pull-down Current Conditions Min 8 5.0 CLOAD=5nF, SW=100kHz No Switching VDD =4 V EN=0V (50kΩ) Typ 6.0 1.2 8 2 100 Max 24 7.0 12 3 150 250 170 50 SOIC-8 only SOIC-8 only SOIC-8 only 0.8 2 5 55 CLOAD = 5nF CLOAD = 10nF -0.3V > VD >180V CLOAD = 5nF ILOAD=1mA VDD >17V VDD <17V VD=VSS, RGATE=0Ω VD =VSS, CLOAD=5nF, RGATE=0Ω VD =VSS, CLOAD=10nF, RGATE=0Ω 3V <VG <10V 10 70 150 200 10 85 20 10 200 12 VDD-2.2 20 Units V V V mA mA µA µA o C o C V V µA mV ns ns kΩ µA ns 0.05 13.5 0.5 15 V V 30 15 40 mV ns 20 35 ns 30 45 ns 1 2 2 Ω A Notes: 5) Guaranteed by Design and Characterization MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 3 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER PIN FUNCTIONS TSOT23-5 Pin # SOIC8 Pin # 1 2 3 4 5 - 8 5 6 4 1 2 3 7 QFN6 (3x3mm) Pin # 6 4 5 3 1 2 Name Description VG VSS VDD VD PGND EN NC NC Gate drive output Ground, also used as reference for VD Supply Voltage FET drain voltage sense Power Ground, return for driver switch Enable pin, active high No connection No connection MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 4 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS VDD = 12V, unless otherwise noted. VFWD vs. Temperature Turn off threshold vs. Temperature 80 70 65 0 50 100 -25 -30 -35 -40 -50 60 -50 2.4 150 QUIESCENT CURRENT (mA) TURN OFF THRESHOLD (V) -20 75 VFWD (mV) Quiescent Current vs. Temperature Shutdown Current vs. Temperature 0 50 100 150 2.2 2 1.8 1.6 1.4 1.2 1 -50 VDD UVLO Rising vs. Temperature 0 50 100 150 Operation in 90W Flyback Application(5) (VIN=90Vac, IOUT=1A) 7 VDD UVLO RISING (V) 200 150 100 50 -50 6.5 VDS 50V/div 6 VGS 5V/div 5.5 ISD 10A/div 5 0 50 100 -50 150 0 50 100 150 Operation in 90W Flyback Application Operation in 90W Flyback Application Operation in 90W Flyback Application (VIN=90Vac, IOUT=4.7A) (VIN=250Vac, IOUT=1A) (VIN=250Vac, IOUT=4.7A) VDS 50V/div VDS 50V/div VDS 50V/div VGS 10V/div VGS 5V/div VGS 10V/div ISD 10A/div ISD 10A/div ISD 10A/div Notes: 5) See Fig.7 for the test circuit.. MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 5 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER BLOCK DIAGRAM Figure 1—Functional Block Diagram OPERATION The MP6900 supports operation in CCM, DCM and Quasi-Resonant topologies. Operating in either a DCM or Quasi-Resonant topology, the control circuitry controls the gate in forward mode and will turn the gate off when the MOSFET current is fairly low. In CCM operation, the control circuitry turns off the gate when very fast transients occur. Blanking The control circuitry contains a blanking function. When it pulls the MOSFET on/off, it makes sure that the on/off state at least lasts for some time. The turn on blanking time is ~1.6us, which determines the minimum on-time. During the turn on blanking period, the turn off threshold is not totally blanked, but changes the threshold voltage to ~+50mV (instead of -30mV). This assures that the part can always be turned off even during the turn on blanking period. (Albeit slower, so it is not recommended to set the synchronous period less than 1.6us at CCM condition in flyback converter, otherwise shoot through may occur) VD Clamp Because VD can go as high as 180V, a HighVoltage JFET is used at the input. To avoid excessive currents when Vg goes below -0.7V, a small resistor is recommended between VD and the drain of the external MOSFET. Under-Voltage Lockout (UVLO) When the VDD is below UVLO threshold, the part is in sleep mode and the Vg pin is pulled low by a 10kΩ resistor. Enable pin The Enable function is only available on the SOIC-8 package. If EN is pulled low, the part is in sleep mode. MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 6 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER Thermal shutdown If the junction temperature of the chip exceeds 170oC, the Vg will be pulled low and the part stops switching. The part will return to normal function after the junction temperature has dropped to 120oC. Thermal Design If the dissipation of the chip is higher than 100mW due to switching frequencies above 100kHz, VDD higher than 15V and/or Cload larger than 5nF, it is recommended to use the thermally-enhanced SOIC-8. Turn-on Phase When the synchronous MOSFET is conducting, current will flow through its body diode which generates a negative Vds across it. Because this body diode voltage drop (<-500mV) is much smaller than the turn on threshold of the control circuitry (-70mV), which will then pull the gate driver voltage high to turn on the synchronous MOSFET after about 150ns turn on delay (Defined in Fig.2). As soon as the turn on threshold (-70mV) is triggered, a blanking time (Minimum on-time: ~200ns) will be added during which the turn off threshold will be changed from -30mV to +50mV. This blanking time can help to avoid error trigger on turn off threshold caused by the turn on ringing of the synchronous MOSFET. V DS pulling up the gate driver which leads the gate voltage is pulled down by the internal pull-down resistance (10kΩ) to larger the on resistance of synchronous MOSFET to ease the rise of Vds. By doing that, Vds is adjusted to be around 70mV even when the current through the MOS is fairly small, this function can make the driver voltage fairly low when the synchronous MOSFET is turned off to fast the turn off speed (this function is still active during turn on blanking time which means the gate driver could still be turned off even with very small duty of the synchronous MOSFET). Turn-off Phase When Vds rises to trigger the turn off threshold (30mV), the gate voltage is pulled to low after about 20ns turn off delay (defined in Fig.2) by the control circuitry. Similar with turn-on phase, a 200ns blanking time is added after the synchronous MOSFET is turned off to avoid error trigger. Fig.3 shows synchronous rectification operation at heavy load condition. Due to the high current, the gate driver will be saturated at first. After Vds goes to above -70mV, gate driver voltage decreases to adjust the Vds to typical -70mV. Fig 4 shows synchronous rectification operation at light load condition. Due to the low current, the gate driver voltage never saturates but begins to decrease as soon as the synchronous MOSFET is turned on and adjust the Vds. -30 mV Vds -70 mV t Don tTotal -30mV t Doff -70mV V GATE 5V 2V Isd Figure 2—Turn on and Turn off delay Conducting Phase When the synchronous MOSFET is turned on, Vds becomes to rise according to its on resistance, as soon as Vds rises above the turn on threshold (-70mV), the control circuitry stops Vgs t0 t1 t2 Figure 3—Synchronous Rectification Operation at heavy load MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 7 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER Vds -30mV -70mV Isd Vgs t0 t1 t2 Figure 4—Synchronous Rectification Operation at light load Where Vds is Drain-Source voltage of the Mosfet and Vfwd is the forward voltage threshold of MP6902, which is ~70mV. So the Mosfet’s Ron is recommended to be no lower than ~35/IOUT (mΩ). (For example, for 5A application, the Ron of the Mosfet is recommended to be no lower than 7mΩ) Fig.6 shows the corresponding total delay during turn-on period (tTotal, see Fig.2) with driving different Qg Mosfet by MP6902. From Fig.6, with driving a 120nC Qg Mosfet, the driver ability of MP6900 is able to pull up the gate driver voltage of the Mosfet to ~5V in 300ns as soon as the body diode of the Mosfet is conducting, which greatly save the turn-on power loss in the Mosfet’s body diode. SR Mosfet Selection and Driver ability Fig.5 shows the typical waveform of QR flyback. Assume 50% duty cycle and the output current is IOUT. To achieve fairly high usage of the Mosfet’s Ron, it is expected that the Mosfet be fully turned on at least 50% of the SR conduction period: Vds = − Ic × Ron = −2 ⋅ I OUT × Ron ≤ −Vfwd 50% SR Conduction Period Ipeak Ipeak˜ 4·IOUT Ic Ic˜ 2·IOUT Vg SR Conduction Period Figure 5—Synchronous Rectification typical waveforms in QR Flyback Turn-on Delay vs . Qg 350 300 Total Delay (ns) The Power Mosfet selection proved to be a trade off between Ron and Qg. In order to achieve high efficiency, the Mosfet with smaller Ron is always preferred, while the Qg is usually larger with smaller Ron, which makes the turn-on/off speed lower and lead to larger power loss. For MP6900, because Vds is regulated at ~-70mV during the driving period, the Mosfet with too small Ron is not recommend, because the gate driver may be pulled down to a fairly low level with too small Ron when the Mosfet current is still fairly high, which make the advantage of the low Ron inconspicuous. Id 250 200 150 100 50 0 0 20 40 60 80 100 120 140 Qg (nC) Figure 6—Total Turn-on Delay vs. Q MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 8 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER TYPICAL APPLICATION CIRCUIT F1 1A R1 1M CX1 LX1 GBU4J 1 BD1 2 C1 100uF R11 150K R13 150K C10 4.7nF/1kV D2 US1K-F CY3 2.2nF/250VAC 11 13 10 AGND T1 3 1 4 R22 20 M1 R24 1K U3 PC817B R23 20K PGND 8 6 45:9:7:7 EE28_L C11 22uF/25V C14 R19 50 NC R18 C12 PGND 0.1uF/25V R16 51K NC 7 HF0200 Source VCC 6 HV 8 GND Drv D5 24mH 1 2 3 4 Fset 5 R20 NC Q2 R21 NC Vg C16 Vaux R27 66.5K 100nF R26 2K 0 Vs R25 C8 NC R6 NC NC1 NC Vs 1000uF C6 Vd R29 NA C7 1 6 C9 CN2 1 1 VG 8 NC 7 VSS 5 VD 4 D3 1uF/50V R14 10 C4 1uF VDD PGND U1 MP6900DS 2 EN 3 NC AGND 220uF D1 Vaux 3 4 CN1 CY1 4.7nF/250VAC 0.22uF/250VAC RF1 NC C13 22pF C5 10nF COMP TL431 R28 10K AGND R15 10k Vg 1k R17 D4 Vd CY2 4.7nF/250VAC R10 1K R12 10k 100uF/25V U2 1 D7 2 1 1 R2 1M R9 10 R7 20K PGND R5 C15 390p PGND 4 AGND 3 RT1 5Ohms Q1 R4 1Ohms PGND 1.5Ohms AP2761I R3 1Ohms 4 2 Figure 7—MP6900 for Secondary Synchronous Controller in 90W Flyback Application 9 MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER PACKAGE INFORMATION TSOT23-5 0.95 BSC 0.60 TYP 2.80 3.00 5 4 1.20 TYP 1.50 1.70 1 2.60 TYP 2.60 3.00 3 TOP VIEW RECOMMENDED LAND PATTERN 0.84 0.90 1.00 MAX 0.09 0.20 SEATING PLANE 0.30 0.50 0.95 BSC 0.00 0.10 SEE DETAIL "A" FRONT VIEW SIDE VIEW NOTE: GAUGE PLANE 0.25 BSC 0o-8o DETAIL A 0.30 0.50 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AA. 6) DRAWING IS NOT TO SCALE. MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 10 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER SOIC8 0.189(4.80) 0.197(5.00) 0.050(1.27) 0.024(0.61) 8 5 0.063(1.60) 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.213(5.40) 4 TOP VIEW RECOMMENDED LAND PATTERN 0.053(1.35) 0.069(1.75) SEATING PLANE 0.004(0.10) 0.010(0.25) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SEE DETAIL "A" 0.050(1.27) BSC SIDE VIEW FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0o-8o 0.016(0.41) 0.050(1.27) DETAIL "A" NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA. 6) DRAWING IS NOT TO SCALE. MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 11 MP6900- FAST TURN-OFF INTELLIGENT CONTROLLER QFN6 (3X3mm) 2.90 3.10 0.35 0.55 PIN 1 ID MARKING 0.35 0.45 1.40 1.60 PIN 1 ID SEE DETAIL A 1 6 2.90 3.10 PIN 1 ID INDEX AREA 2.20 2.40 0.95 BSC 3 4 TOP VIEW BOTTOM VIEW PIN 1 ID OPTION A R0.20 TYP. PIN 1 ID OPTION B R0.20 TYP. 0.80 1.00 0.20 REF 0.00 0.05 SIDE VIEW DETAIL A NOTE: 2.90 0.80 1) 2) 3) 4) 5) 1.50 0.40 ALL DIMENSIONS ARE IN MILLIMETERS. EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. LEAD COPLANARITY SHALL BE0.10 MILLIMETER MAX. JEDEC REFERENCE IS MO-229, VARIATION VEEA-2. DRAWING IS NOT TO SCALE. 2.30 0.95 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6900 Rev. 1.12 www.MonolithicPower.com 9/19/2012 MPS Proprietary Information. Patent Protected. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 12