MP6920 Fast Turn-Off Intelligent Rectifier The Future of Analog IC Technology FEATURES DESCRIPTION • The MP6920 is a fast turn-off intelligent rectifier for Flyback converters that combines a 60V power switch that replaces diode rectifiers for high efficiency. The chip regulates the forward voltage drop of the internal power switch to about 70mV and turns it off before the voltage goes negative. Supports DCM and Quasi-Resonant Flyback converters Integrated 10mΩ 60V Power Switch Compatible with Energy Star, 1W Standby Requirements VDD Range From 8V to 24V Max 300kHz Switching Frequency Supports High-Side and Low-Side Rectification Power Savings of Up to 1.5W in a Typical Notebook Adapter • • • • • • APPLICATIONS • • • • Industrial Power Systems Distributed Power Systems Battery Powered Systems Flyback Converters For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION Vin Vout U1 MP6920 1 5 PWM 6 2 3 VSS SENSE VSS 6 GND VSS VDD VD E/PAD MP6920 Rev. 1.01 9/19/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 1 MP6920- FAST TURN-OFF INTELLIGENT RECTIFIER ORDERING INFORMATION Part Number Package SOIC8E MP6920DN* Top Marking MP6920 * For Tape & Reel, add suffix –Z (e.g. MP6920DN–Z); For RoHS Compliant Packaging, add suffix –LF; (e.g. MP6920DN–LF–Z) PACKAGE REFERENCE TOP VIEW VSS 1 8 NC VSS 2 7 NC VSS 3 6 SENSE VDD 4 5 NC VD EXPOSED PAD SOIC8E ABSOLUTE MAXIMUM RATINGS (1) VDD to VSS ......................................-0.3V to +26V VD to VSS .......................................-0.7V to +60V Maximum Operating Frequency............. 300kHz (2) Continuous Power Dissipation (TA = 25°C) SOIC8E……………………………………....2.5W Junction Temperature ...............................150°C Lead Temperature (Solder).......................260°C Storage Temperature .............. -55°C to +150°C Recommended Operation Conditions (3) VDD to VSS ............................................8V to 24V Operating Junction Temp. (TJ).... -40°C to +125°C MP6920 Rev. 1.01 9/19/2012 Thermal Resistance (4) θJA θJC SOIC8E ...................................50 ...... 10 ... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. Without heatsink. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2 MP6920- FAST TURN-OFF INTELLIGENT RECTIFIER ELECTRICAL CHARACTERISTICS VDD = 12V, TA= 25°C, unless otherwise noted. Parameter Symbol Drain-to-Source Breakdown Voltage V(BR)DSS VDD Voltage Range VDD UVLO Rising VDD UVLO Hysteresis Operating Current ICC Light-Load Current CONTROL CIRCUITRY VSS –VD Forward Voltage Vfwd Turn-On Delay (5) tDon Turn Off Threshold (VSS-VD) (5) Turn-Off Delay (5) tDoff Minimum On-Time (5) tMIN Light-Load-Enter Delay tLL-Delay Light-Load-Enter Pulse Width tLL Light-Load-Enter Pulse Width tLL-H Hysteresis Light-Load Mode Exit Pulse Width VLL-DS Threshold (VDS) POWER SWITCH CHARACTERISTICS Single Pulse Avalanche Current (6) IAS Single Pulse Avalanche Energy (6) EAS Drain-Source On-State Resistance RDS(ON) Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss DRAIN-SOURCE DIODE CHARACTERISTICS Reverse Recovery Time trr Diode Reverse Charge Qrr Conditions Min 60 8 5.0 0.8 Typ Max 6.0 1.2 4.5 260 24 7.0 1.5 8 360 55 70 200 30 30 1.6 120 2.2 fSW=100kHz 20 VD =VSS VDS=25V, f=1MHz IF=10A, dIF/dt=300A/us 85 40 45 Units V V V V mA µA mV ns mV ns μs μs μs 0.2 μs -250 mV 41 250 9.5 3696 258 104 A mJ mΩ pF pF pF 29 80 11.4 ns nC Notes: 5) Guaranteed by Design and Characterization. 6) Starting TJ=25°C, L=0.3mH PIN FUNCTIONS Pin # (SOIC8E) 1,2,3 6 4 5,7,8 EXPOSED PAD MP6920 Rev. 1.01 9/19/2012 Name VSS SENSE VDD NC VD Description MOSFET Source, also used as reference for VDD Drain sense, connect this pin with exposed pad on the layout Supply Voltage No connection MOSFET Drain www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 3 MP6920- FAST TURN-OFF INTELLIGENT RECTIFIER TYPICAL PERFORMANCE CHARACTERISTICS VDD=12V, unless otherwise noticed. Operation In 36W Flyback Application VIN = 110VAC, VOUT =12V, IOUT = 1A VDS 1V/div. VDS 10V/div. Operation In 36W Flyback Application Operation In 36W Flyback Application VIN = 110VAC, VOUT =12V, IOUT = 1A VIN=110VAC, VOUT=12V, IOUT=3A VDS 10V/div. Operation In 36W Flyback Application VIN=110VAC, VOUT=12V, IOUT=3A VDS 1V/div. MP6920 Rev. 1.01 9/19/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 4 MP6920- FAST TURN-OFF INTELLIGENT RECTIFIER BLOCK DIAGRAM VD VDD Logic Driver Control Circuity SENSE VSS Figure 1: Functional Block Diagram MP6920 Rev. 1.01 9/19/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 5 MP6920- FAST TURN-OFF INTELLIGENT RECTIFIER OPERATION The MP6920 supports operation in discontinuous conduction mode (DCM) and Quasi-Resonant Flyback converters. The internal control circuitry of the MP6920 controls the integrated MOSFET gate in forward mode and will turn the gate off when the MOSFET current is fairly low. Blanking The control circuitry contains a blanking function. When it pulls the integrated MOSFET on/off, it makes sure that the on/off state at least lasts for some time. The turn-on blanking time is 1.6µs, which determines the minimum on-time. During the turn-on blanking period, the turn-off threshold is not totally blanked, but changes to +50mV (instead of -30mV). This ensures that the part can always turn off even during the turn-on blanking period (albeit slower). Under-Voltage Lockout When VDD is below the under-voltage lockout (UVLO) threshold, the part enters sleep mode and the integrated MOSFET will not turn on. Basic Operation The basic operations of flyback converter with the MP6920 are: z Turn-On Phase When the switch current flows through the body diode of the integrated MOSFET, it generates a negative VDS (VD-VSS) across it (<-500mV); the VDS is much lower than the turn-on threshold of the control circuitry (70mV), which then turns on the integrated MOSFET after a 200ns turn-on delay (defined in Figure 2). z Conducting Phase When the integrated MOSFET turns on, VDS (-ISD x RDS(ON)) rises according to the switch current (ISD) drop: As soon as VDS rises above the turn-on threshold (-70mV), the control circuitry stops pulling up the internal gate driver and the driver voltage of the integrated MOSFET drops, which makes the MOSFET ON-resistance RDS(ON) larger. By doing that, VDS (-ISD x RDS(ON)) stabilizes to around -70mV even when the switch current ISD is fairly small. This function can avoid MP6920 Rev. 1.01 9/19/2012 triggering the turn-off threshold (-30mV) of the internal driver until the current through the integrated MOSFET has dropped to near zero. Figure 3 shows the MP6920 operating in heavy-load condition. Due to the high current, the internal driver voltage initially saturates; after VDS goes to above -70mV, driver voltage decreases to adjust the VDS to around -70mV. z Figure 4 shows the MP6920 operating at light-load condition. Due to the low current, the driver voltage never saturates but begins to decrease as soon as the integrated MOSFET turns on and adjusts the VDS. Turn-Off Phase When VDS rises to trigger the turn-off threshold (-30mV), the driver voltage of the switch goes zero after a 20ns turn-off delay (shown in Figure 2) by the control circuitry. Similar to turn-on phase, a 200ns blanking time after the switch turns off avoid erroneous trigging. Light-Load Latch-Off Function The gate driver of integrated MOSFET in the MP6920 is latched to save the driver loss at lightload condition to improve light-load efficiency. The light-load-enter pulse width (tLL) is internally fixed at 2.2μs. During each switching cycle, if the integrated MOSFET conducting period remains below 2.2µs, the MP6920 falls into light-load mode and latches off the integrated MOSFET after a 120µs delay (light-load-enter delay, tLL-Delay) After entering light-load mode, the MP6920 monitors the integrated MOSFET’s body diode conducting period by sensing VDS—when VDS exceeds -250mV (VLL-DS), the MP6920 treats the integrated MOSFET as a body diode until the conducting period finishes. If the MOSFET’s body diode conducting period is longer than 2.4µs (tLL+tLL-H), the light-load mode finishes and the integrated MOSFET of MP6920 is unlatched to restart the internal synchronous rectification (see Figure 6 for details). www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 6 MP6920- FAST TURN-OFF INTELLIGENT RECTIFIER SR Gate VDS Normal Mode -30mV Light Load Mode 120 s -70mV TLL tDon T LL tDoff T LL Internal Driver Voltage Switching Current 2V Load become light Figure 5: Enter Light Load Mode Figure 2: Turn-On and Turn-Off Delay SR Gate Light Load Mode VDS Normal Mode -30mV -70mV ISD TLL +T LL- H T LL+TLL-H TLL+TLL-H TLL+TLL-H Switching Current Load become heavy Internal Driver voltage Figure 6: Exit Light Load Mode t0 t1 t2 Figure 3: Synchronous Rectification Operation at heavy load VDS -30mV -70mV ISD Internal Driver voltage t0 t1 t2 Figure 4: Synchronous Rectification Operation at light load MP6920 Rev. 1.01 9/19/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 7 MP6920- FAST TURN-OFF INTELLIGENT RECTIFIER TYPICAL APPLICATION CIRCUIT CN1 3 2 1 N ET 0002 8 N ET0 0005 LX1 24mH 1 N ET0 0021 L1 2 1 GBU4J BD1 2 Q1 N ET 0005 6 C1 100uF PG ND 1 R7 NE T00 054 2 20K 1 NE T00 001 R11 R13 150K 150K D8 N ET 0005 3 R10 1K R9 10 R12 10k D2 NE T00 014 C10 4.7nF/1kV 3 GND 2 Sou rce 1 Drv Fse t VCC NC HV HF0200 4 C OM P US1K-F RF1 NC NC RF2 C13 22pF N ET 000 58 P GN D C5 10nF PGND R16 51K 8 7 6 5 PGND 5 6 4 1 N E T000 03 R22 20 NC N ET 0000 0 R19 50 13 D9 2 NE T00 008 NE T00 017 1 0 R30 R25 C2 1 4.7 uF 10 NE T000 26 R2 6 2K C16 100nF 1 2 C8 1n N ET 0002 0 8 C6 1000uF C18 220uF A GND C7 220uF 1 R20 10 U4 NC 7 6 5 NA R29 1 R21 NC VSS NC NC VSEN SE VSS VSS 3 VD 4 VDD R27 38 K R28 10K AGN D 2 2 1 2 CY3 2.2nF/250VAC T1 1 11 A GND 10 8 1K R24 NE T00 006 U3 PC81 7B N E T000 23 AG ND U2 TL431 R23 20K 84:12:13:13 EE28_L M1 N ET 0006 0 D7 N ET0 0004 C1 4 100uF/25V N ET 0006 3 PGND C15 390p R18 C11 22uF/2 5V D5 NE T00 002 N ET0 0052 3 4 1A RT1 5Ohms R1 1M R2 1M CX1 0.22uF/25 0VAC N ET0 0032 R4 N ET 0006 1 1 2 F1 N E T000 33 3 CY1 4.7nF/250VAC PE CY2 4.7nF/250VAC PE N ET 0002 9 C2 NC R3 PGN D C12 0.1 uF/25V 2 1 1 C9 1u F/50V 1 2 1 1 CN2 8 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. MP6920 Rev. 1.01 9/19/2012 4 3 1 2 2 3 1 2 2 1 1 2 1 2 1 2 3 1 2 1.5Ohms 4 2 2 2 1 1Ohms Figure 7: MP6920 for Synchronous Conduction in 36W Flyback Application MP6920- FAST TURN-OFF INTELLIGENT RECTIFIER PACKAGE INFORMATION SOIC8E (Exposed Pad) 0.189(4.80) 0.197(5.00) 8 0.124(3.15) 0.136(3.45) 5 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.089(2.26) 0.101(2.56) 4 TOP VIEW BOTTOM VIEW SEE DETAIL "A" 0.013(0.33) 0.020(0.51) 0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.0075(0.19) 0.0098(0.25) SIDE VIEW 0.050(1.27) BSC FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0.050(1.27) 0.024(0.61) 0o-8o 0.016(0.41) 0.050(1.27) 0.063(1.60) DETAIL "A" 0.103(2.62) 0.213(5.40) NOTE: 0.138(3.51) RECOMMENDED LAND PATTERN 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6920 Rev. 1.01 9/19/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 9