MPS MP2227

MP2227
24V, 3A, 1.3MHz Synchronous
Step-Down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP2227 is an internally compensated
1.3MHz fixed frequency PWM synchronous
step-down regulator. MP2227 operates from a
3V to 24V input and generates an adjustable
output voltage from 0.8V to 0.9xVIN at up to 3A
load current.
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

The MP2227 integrates a 160mΩ high-side
switch and an 80mΩ synchronous rectifier for
high efficiency without an external Schottky
diode. With peak current mode control and
internal compensation, it is stable with an
output ceramic capacitor and a small inductor.
Fault protection includes hiccup short-circuit
protection, cycle-by-cycle current limiting and
thermal shutdown. Other features include
frequency synchronization and soft-start.
The MP2227 is available in a small 3mm x 3mm
10-lead QFN package.







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

3A Output Current
Input Supply Range: 3V to 24V
160mΩ high-side, 80mΩ low-side Internal
Power MOSFET Switches
All Ceramic Output Capacitor Design
Up to 95% Efficiency
1.3MHz Fixed Switching Frequency
Adjustable Output from 0.8V to 0.9xVIN
Internal LDO for VCC supply
1MHz to 2MHz Frequency Synchronization
POK
Thermal Shutdown
Cycle-by-Cycle Current Limiting
Hiccup Short Circuit Protection
10-lead, 3mm x 3mm QFN Package
APPLICATIONS




µP/ASIC/DSP/FPGA Core and I/O Supplies
Printers and LCD TVs
Network and Telecom Equipment
Point of Load Regulators
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“MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic
Power Systems, Inc.
TYPICAL APPLICATION
Efficiency
VIN=12V, VOUT=5V
100
90
EFFICIENCY (%)
80
70
60
50
40
30
20
10
0
0.0
MP2227 Rev. 1.1
11/21/2011
0.5 1.0 1.5 2.0 2.5
LOAD CURRENT ( A )
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3.0
1
MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
Free Air Temperature (TA)
MP2227DQ
QFN10(3mm x 3mm)
7U
-40C to +85C
* For Tape & Reel, add suffix –Z (e.g. MP2227DQ–Z).
For RoHS Compliant packaging, add suffix –LF (e.g. MP2227DQ–LF–Z)
PACKAGE REFERENCE
TOP VIEW
FB
1
10
EN/SYNC
POK
2
9
VCC
VIN
3
8
BST
GND
4
7
SW
GND
5
6
SW
EXPOSED PAD
ON BACKSIDE
ABSOLUTE MAXIMUM RATINGS (1)
VIN to GND ...................................-0.3V to +28V
SW to GND ...........................-0.3V to VIN + 0.3V
.............................-2.5V to VIN + 2.5V for < 50ns
FB, EN/SYNC, VCC to GND...........-0.3V to +6.5V
POK, SYNC_OUT to GND .............-0.3V to +6.5V
BS to SW .....................................-0.3V to +6.5V
(2)
Continuous Power Dissipation (TA = +25°C)
………………………………………………....2.5W
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
Recommended Operating Conditions
(3)
Thermal Resistance
(4)
θJA
θJC
QFN10 (3mm x 3mm) .............50 ...... 12 ... C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Supply Voltage VIN ..............................3V to 24V
Output Voltage VOUT ..................0.8V to 0.9 x VIN
Max Operating Junct. Temp (TJ).............+125°C
MP2227 Rev. 1.1
11/21/2011
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (5)
VIN=12V, TA = +25C, unless otherwise noted.
Parameters
Quiescent Supply Current
Shutdown Current
VCC Under Voltage Lockout Threshold
VCC Under Voltage Lockout Hysteresis
IN Under Voltage Lockout Threshold,
Rising Edge
IN Under Voltage Lockout Hysteresis
Regulated FB Voltage
FB Input Current
EN High Threshold
EN Low Threshold
High-Side Switch On-Resistance
Low-Side Switch On-Resistance
SW Leakage Current
BS Under Voltage Lockout Threshold
High-Side Switch Current Limit
Low-Side Switch Current Limit
Oscillator Frequency
Maximum Synch Frequency
Minimum Synch Frequency
Minimum On Time
Maximum Duty Cycle
POK Upper Trip Threshold
POK Lower Trip Threshold
POK Output Voltage Low
POK Deglitch Timer
SYNC_Input High Level
SYNC_Input Low Level
Thermal Shutdown Threshold
Condition
VEN = HIGH
VFB = 0.85V, not switching
VEN = 0V
Rising Edge
TA = +25°C
-40°C ≤ TA ≤ +85°C
VFB = 0.85V
-40°C ≤ TA ≤ +85°C
-40°C ≤ TA ≤ +85°C
ISW = 300mA
ISW = –300mA
VEN = 0V; VIN = 12V
VSW = 0V or 12V
Min
Typ
Max
1
0.784
0.780
-50
1.6
mA
1
2.7
300
2.95
μA
V
mV
2.85
2.95
V
300
0.800
0.816
0.820
50
0.4
160
80
-1
Sourcing
Sinking
1
FB respect to the nominal value
FB respect to the nominal value
ISINK = 5mA
1
1.8
4.5
2.5
1.3
2
1
50
90
10
-10
1.6
0.4
40
VCC = 5V, Source 5mA
VCC = 5V, Sink 5mA
Hysteresis = 20°C
Units
4.6
0.4
150
mV
V
V
nA
V
V
mΩ
mΩ
μA
V
A
A
MHz
MHz
MHz
ns
%
%
%
V
μs
V
V
°C
Note:
5) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization.
MP2227 Rev. 1.1
11/21/2011
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin #
Name
1
FB
2
POK
3
IN
4, 5
GND
6,7
SW
8
BST
9
VCC
10
EN/SYNC
MP2227 Rev. 1.1
11/21/2011
Description
Feedback. This is the input to the error amplifier. An external resistive divider connected
between the output and GND is compared to the internal 0.8V reference to set the
regulation voltage.
Open Drain Power Good Output. “HIGH” output indicates VOUT is within ±10% window.
“LOW” output indicates VOUT is out of ±10% window. POK is pulled down in shutdown.
Input Supply. This supplies power to the high side switch. A decoupling capacitor to ground
is required close to this pin to reduce switching spikes.
Ground. Connect these pins with larger copper areas to the negative terminals of the input
and output capacitors.
Switch Node Connection to the Inductor. These pins connect to the internal high and lowside power MOSFET switches. All SW pins must be connected together externally.
Bootstrap. A capacitor between this pin and SW provides a floating supply for the high-side
gate driver.
Bias Supply. Provide 5V to this pin when the input voltage is less than 5V. Otherwise it
does not need external supply. This supplies power to both the internal control circuit and
the gate drivers. A decoupling capacitor to ground is required close to this pin.
Enable and Frequency Synchronization Input Pin. Forcing this pin below 0.4V shuts down
the part. Forcing this pin above 1.6V turns on the part. Applying a 1MHz to 2MHz clock
signal to this pin synchronizes the internal oscillator frequency to the external source. To
enable the device, connect this pin to VIN through a 100kΩ resistor. When VIN is less than
5V and VCC is externally biased, this pin can also be connected to VCC through a 100kΩ
resistor.
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 1.8V, C1A = 22μF, C2A = C2B = 22μF, L = 1.5µH, TA = +25ºC, unless otherwise
noted.
MP2227 Rev. 1.1
11/21/2011
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1.8V, C1A = 22μF, C2A = C2B = 22μF, L = 1.5µH, TA = +25ºC, unless otherwise
noted.
Steady State
Power Ramp Up
Power Ramp Down
VSYS = 5V, VEN put to VIN,
VOUT= 3.3V, IOUT = 3A
VIN = 12V, VEN put to VIN,
VOUT = 1.8V, IOUT = 2A
VIN = 12V, VEN put to VIN,
VOUT = 1.8V, IOUT = 2A
VSYS
5V/div.
VSW
10V/div.
VSYS
10V/div.
VSW
10V/div.
VSYS
10V/div.
VSW
10V/div.
VOUT
2V/div.
VOUT
1V/div.
VOUT
1V/div.
IL
2A/div.
IL
2A/div.
IL
2A/div.
Steady State
Enable Up
Enable Down
VIN = 26V, VEN put to VIN,
VOUT = 3.3V, IOUT = 3A
VIN = 12V, VEN = 0-3V,
VOUT = 5V, IOUT = 3A, Resistor Load
VIN = 12V, VEN = 3-0V,
VOUT = 5V, IOUT = 3A, Resistor Load
VSYS
20V/div.
VSW
20V/div.
VEN
2V/div.
VEN
2V/div.
VPG
5V/div.
VPG
5V/div.
VOUT
2V/div.
VOUT
5V/div.
VOUT
5V/div.
IL
2A/div.
IL
2A/div.
IL
2A/div.
Transient Response
Short Circuit
Short Circuit Recovery
VIN = 18V, VIN,VOUT = 1.8V, IOUT = 3A
VIN = 18V, VEN put to VIN, VOUT = 1.8V
VIN = 18V, VEN put to VIN, VOUT = 1.8V
VSYS
10V/div.
VOUT
20V/div.
IOUT
2A/div.
MP2227 Rev. 1.1
11/21/2011
VOUT
1V/div.
VOUT
1V/div.
IL
2A/div.
IL
2A/div.
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
Figure 1—Functional Block Diagram
MP2227 Rev. 1.1
11/21/2011
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION
MP2227 Rev. 1.1
11/21/2011
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL DESCRIPTION
PWM Control
The MP2227 is a constant frequency peakcurrent-mode control PWM switching regulator.
Refer to the functional block diagram. The high
side N-Channel DMOS power switch turns on at
the beginning of each clock cycle. The current
in the inductor increases until the PWM current
comparator trips to turn off the high side DMOS
switch. The peak inductor current at which the
current comparator shuts off the high side
power switch is controlled by the COMP voltage
at the output of feedback error amplifier. The
transconductance from the COMP voltage to
the output current is set at 11.25A/V.
This current-mode control greatly simplifies the
feedback
compensation
design
by
approximating the switching converter as a
single-pole system. Only Type II compensation
network is needed, which is integrated into the
MP2227. The loop bandwidth is adjusted by
changing the upper resistor value of the resistor
divider at the FB pin. The internal compensation
in the MP2227 simplifies the compensation
design, minimizes external component counts,
and keeps the flexibility of external
compensation for optimal stability and transient
response.
Enable and Frequency
(EN/SYNC PIN)
Synchronization
This is a dual function input pin. Forcing this pin
below 0.4V for longer than 4us shuts down the
part; forcing this pin above 1.6V for longer than
4µs turns on the part. Applying a 1MHz to
2MHz clock signal to this pin also synchronizes
the internal oscillator frequency to the external
clock. When the external clock is used, the part
turns on after detecting the first few clocks
regardless of duty cycles. If any ON or OFF
period of the clock is longer than 4µs, the signal
will be intercepted as an enable input and
disables the synchronization.
Soft-Start and Output Pre-Bias Startup
When the soft-start period starts, an internal
current source begins charging an internal softstart capacitor. During soft-start, the voltage on
MP2227 Rev. 1.1
11/21/2011
the soft-start capacitor is connected to the noninverting input of the error amplifier. The softstart period lasts until the voltage on the softstart capacitor exceeds the reference voltage of
0.8V. At this point the reference voltage takes
over at the non-inverting error amplifier input.
The soft-start time is internally set at 120µs. If
the output of the MP2227 is pre-biased to a
certain voltage during startup, the IC will disable
the switching of both high-side and low-side
switches until the voltage on the internal softstart capacitor exceeds the sensed output
voltage at the FB pin.
Over Current Protection
The MP2227 offers cycle-to-cycle current
limiting for both high-side and low-side switches.
The high-side current limit is relatively constant
regardless of duty cycles. When the output is
shorted to ground, causing the output voltage to
drop below 70% of its nominal output, the IC is
shut down momentarily and begins discharging
the soft start capacitor. It will restart with a full
soft-start when the soft- start capacitor is fully
discharged. This hiccup process is repeated
until the fault is removed.
Bootstrap (BST PIN)
The gate driver for the high-side N-channel
DMOS power switch is supplied by a bootstrap
capacitor connected between the BS and SW
pins. When the low-side switch is on, the
capacitor is charged through an internal boost
diode. When the Low-side switch is off and the
high-side switch turns on, the voltage on the
bootstrap capacitor is boosted above the input
voltage and the internal bootstrap diode
prevents the capacitor from discharging.
No external bootstrap diode is required for
typical applications. For applications with low
input VCC voltage or where output voltage is
very close to input voltage, an external Schottky
diode may be connected from the VCC to BS
pins to charge the bootstrapped capacitor more
strongly for increased gate drive voltage. When
using the external bootstrap diode, a resistor at
the regulator output or a minimal load current
may be required as the bootstrapped capacitor
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
always see the supply voltage even when the
part is disabled.
Input UVLO
Both VCC and IN pins have input UVLO
detection. Until both VCC and IN voltage under
voltage lockout threshold, the parts remain in
shutdown condition.
There are also under
voltage lockout hysesteres at both VCC and IN
pins.
MP2227 Rev. 1.1
11/21/2011
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider sets the output
voltage (see Typical Application Schematic). The
feedback resistor R1 also sets the feedback loop
bandwidth with the internal compensation
capacitor (see Figure 1). The relation between
R1 and feedback loop bandwidth (fC), output
capacitance (CO) is as follows:
R1(K ) 
1.24  106
.
fC (kHz)  CO (F)
The feedback loop bandwidth (fC) is no higher
than 1/10th of switching frequency of MP2227. In
the case of ceramic capacitor as CO, it’s usually
set to be in the range of 50kHz and 150kHz for
optimal transient performance and good phase
margin. If electrolytic capacitor is used, the loop
bandwidth is no higher than 1/4th of the ESR zero
frequency (fESR). fESR is given by:
fESR 
1
For example, choose fC=70kHz with ceramic
capacitor, CO=47uF, R1 is estimated to be
400KΩ. R2 is then given by:
R1
VOUT
1
0.8V
Table 1—Resistor Selection vs. Output
Voltage Setting
VOUT (V) R1 (kΩ) R2 (kΩ)
1.2
1.5
1.8
2.5
3.3
400
400
400
400
400
MP2227 Rev. 1.1
11/21/2011
806
453
316
187
127
A 0.47µH to 1µH inductor with DC current rating
at least 25% higher than the maximum load
current is recommended for most applications.
For best efficiency, the inductor DC resistance
shall be <10mΩ. See Table 2 for recommended
inductors and manufacturers. For most designs,
the inductance value can be derived from the
following equation:
L
VOUT x(VIN  VOUT )
VIN xIL xfOSC
Where ∆IL is Inductor Ripple Current. Choose
inductor ripple current approximately 30% of the
maximum load current, 3A.The maximum
inductor peak current is:
IL(MAX)  ILOAD 
IL
2
Under light load conditions, larger inductance is
recommended for improved efficiency
2  RESR  CO
R2 
Selecting the Inductor
L (μH)
COUT
(ceramic)
0.47μH-1μH
0.47μH-1μH
0.47μH-1μH
0.47μH-1μH
0.47μH-1μH
47μF
47μF
47μF
47μF
47μF
Input Capacitor Selection
The input capacitor reduces the surge current
drawn from the input and switching noise from
the device. The input capacitor impedance at the
switching frequency shall be less than input
source impedance to prevent high frequency
switching current passing to the input. Ceramic
capacitors with X5R or X7R dielectrics are highly
recommended because of their low ESR and
small temperature coefficients. For most
applications, a 47µF capacitor is sufficient.
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
Table 2—Suggested Surface Mount Inductors
Manufacturer
Part Number
Inductance
(μH)
Max DCR
(mΩ)
Current Rating
(A)
Dimensions
L x W x H (mm3)
0.55
0.95
4.5
7.4
14
11
7×6.9×3
7×6.9×3
1
11
6.9
8.4×8.3×4
Wurth Electronics
744310055
744310095
TOKO
B1015AS-1R0N
Output Capacitor Selection
PC Board Layout
The output capacitor keeps output voltage ripple
small and ensures regulation loop stable. The
output capacitor impedance shall be low at the
switching frequency. Ceramic capacitors with
X5R or X7R dielectrics are recommended. If
electrolytic capacitor is used, pay attention to
output ripple voltage, extra heating, and the
selection of feedback resistor R1 (refer to “Output
Voltage Setting” section) due to large ESR of
electrolytic capacitor. The output ripple ∆VOUT is
approximately:
The high current paths (GND, IN and SW) should
be placed very close to the device with short,
direct and wide traces. A 0.1μF-1μF ceramic is
recommended for VCC supply. C5 must be
placed as close as possible to “VCC” pin and
“GND” pin. The external feedback resistors shall
be placed next to the FB pin. Keep the switching
node SW short and away from the feedback
network. Please see EV2227EQ datasheet for
detailed info.
VOUT 
VOUT x(VIN  VOUT )
1
x(ESR 
)
VIN xfOSC xL
8xfOSC xC3
MP2227 Rev. 1.1
11/21/2011
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MP2227 – 24V, 3A, 1.3MHz SYNCHRONOUS STEP-DOWN CONVERTER
PACKAGE INFORMATION
QFN10 (3mm x 3mm)
2.90
3.10
0.30
0.50
PIN 1 ID
MARKING
0.18
0.30
2.90
3.10
PIN 1 ID
INDEX AREA
1.45
1.75
PIN 1 ID
SEE DETAIL A
10
1
2.25
2.55
0.50
BSC
5
6
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
R0.20 TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
NOTE:
2.90
0.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5.
5) DRAWING IS NOT TO SCALE.
1.70
0.25
2.50
0.50
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP2227 Rev. 1.1
11/21/2011
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13