ONSEMI NCP4688DSN15T1G

NCP4688
150 mA, Low Noise, LDO
Linear Voltage Regulator
The NCP4688 is a CMOS 150 mA LDO linear voltage regulator
with high output voltage accuracy which features a low noise output
voltage and high ripple rejection. The low level of output noise
10 mVrms typically is kept at any output voltage. The very common
SOT23−5 package and small mDFN 1x1 package are suitable for
industrial applications, portable communication equipments and RF
modules.
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MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 2 V to 5.25 V
Output Voltage Range: 1.2 to 4.8 V (available in 0.1 V steps)
±1% Output Voltage Accuracy
Output Noise: 10 mVrms
Line Regulation: 0.02%/V
Current Limit Circuit
High PSRR: 80 dB at 1 kHz, 75 dB at 10 kHz
Available in SOT−23−5 and mDFN 1.0 x 1.0 mm Package
These are Pb−Free Devices
Typical Applications
•
•
•
•
•
Home Appliances, Industrial Equipment
Cable Boxes, Satellite Receivers, Entertainment Systems
Car Audio Equipment, Navigation Systems
Notebook Adaptors, LCD TVs, Cordless Phones and Private LAN
Systems
RF Modules
NCP4688x
VIN
VIN
C1
1.0 mF
XXXMM
SOT−23−5
CASE 1212
1
1
UDFN−4
CASE 517BR
1
XX
MG
G
(Top Views)
XX, XXX = Specific Device Code
M, MM = Date Code
G
= Pb−Free Package
(*Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
VOUT
VOUT
CE
GND
C2
1.0 mF
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2012
February, 2012 − Rev. 1
1
Publication Order Number:
NCP4688/D
NCP4688
NCP4688D
NCP4688xxxx
Vout Vin
Vin
Vout
Vref
Vref
Noise Reduction
Noise Reduction
CE
CE
Current Limit
Current Limit
GND
GND
Figure 2. Simplified Schematic Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
SOT−23−5
Pin No.
DFN 1x1
1
4
VIN
Input pin
2
2
GND
Ground pin
3
3
CE
Chip enable pin (“H” active)
NC
Non connected
Pin Name
4
5
1
VOUT
*EP
EP
Description
Output pin
Exposed Pad (leave floating or connect to GND)
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Input Voltage
Value
Unit
VIN
0−6V
V
Output Voltage
VOUT
−0.3 to VIN + 0.3
V
Chip Enable Input
VCE
0−6V
V
Power Dissipation SOT−23−5
PD
420
mW
400
Power Dissipation mDFN 1.0 x 1.0 mm
Junction Temperature
Storage Temperature
TJ
−40 to 150
°C
TSTG
−55 to 125
°C
ESD Capability, Human Body Model (Note 1)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 1)
ESDMM
200
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
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2
NCP4688
Table 3. THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, SOT−23−5
Thermal Resistance, Junction−to−Air
RqJA
238
°C/W
Thermal Characteristics, mDFN 1x1
Thermal Resistance, Junction−to−Air
RqJA
250
°C/W
Table 4. ELECTRICAL CHARACTERISTICS
(−40°C ≤ TA ≤ 85°C; CIN = COUT = 1.0 mF, unless otherwise noted. Typical values are at TA = +25°C.)
Test Conditions
Parameter
Operating Input Voltage
Output Voltage
1.2 V < Vout < 4.8 V
Symbol
Min
VIN
2.0
VOUT
Ta = 25°C, Vout > 2.0 V
Max
Unit
5.25
V
x0.99
x1.01
V
x0.985
x1.015
V
Ta = 25°C, Vout ≤ 2.0 V
−20
+20
mV
−40°C < Ta < 85°C, Vout ≤ 2.0 V
−30
+30
mV
−40°C < Ta < 85°C, Vout > 2.0 V
Output Voltage Temp.
Coefficient
−40°C < Ta < 85°C
Line Regulation
Set Vout + 0.3 < VIN < 5.25 V
Vout > 4.1 V
Set Vout + 0.5 < VIN < 5.0 V
1.7 V ≤ VOUT < 4.1 V
2.2 < VIN < 5.0 V
Vout < 1.7 V
Load Regulation
1 mA < IOUT ≤ 150 mA
Dropout Voltage
IOUT = 150 mA
LineReg
LoadReg
1.2 V ≤ VOUT < 1.3 V
−14
VDO
Quiescent Current
Iout = 0 mA
0.10
%/V
0
14
mV
V
0.39
0.80
0.37
0.70
1.4 V ≤ VOUT ≤ 1.5 V
0.34
0.60
1.5 V ≤ VOUT < 1.7 V
0.32
0.50
1.7 V ≤ VOUT < 2.0 V
0.29
0.41
2.0 V ≤ VOUT < 2.5 V
0.25
0.36
2.5 V ≤ VOUT < 2.8 V
0.22
0.31
0.20
0.28
IOUT
VOUT = 0 V
0.02
1.3 V ≤ VOUT < 1.4 V
2.8 V ≤ VOUT ≤ 4.8 V
Short Current Limit
ppm/°C
±100
Output Current
Vout > 4.1 V
150
mA
ISC
40
IQ
80
Vout ≤ 4.1 V
Standby Current
Typ
mA
100
mA
1.0
mA
0.6
mA
VIN
V
75
VIN = VIN max , VCE = 0 V
ISTB
CE Input Voltage “H”
VCEH
CE Input Voltage “L”
VCEL
VOUT > 4.1 V @ VIN = 5.25 V, f = 1 kHz
VOUT ≤ 4.1 V @ VIN =
f = 10 kHz
Set VOUT + 1.0 V,
ΔVIN_PK−PK = 0.2 V,
f = 100 kHz
IOUT = 30 mA
PSRR
Output Noise Voltage
IOUT = 30 mA, f = 10 Hz to 100 kHz
VNOISE
10
mVrms
Autodischarge NMOS
Resistance
VIN = 4.0 V, VCE = 0.0 V
RDSON
60
ohm
CE Pin Pull−Down Current
CE Pin Threshold Voltage
Power Supply
Rejection Ratio
0.1
IPD
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3
0.3
1.0
0.4
80
dB
75
65
NCP4688
TYPICAL CHARACTERISTICS
3.0
1.4
Vin = 5.25 V
Vin = 5.25 V
2.5
Vin = 4.0 V
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
1.2
1.0
Vin = 3.0 V
0.8
Vin = 2.0 V
0.6
0.4
0
50
100
150
200
50
100
150
200
250
Figure 4. Output Voltage vs. Output Current
NCP4688xx25
1.2
Vin = 4.3 V
3.5
Vin = 4.5 V
3.0
Vin = 4.8 V
2.5
300
1.4
Vin = 5.25 V
2.0
1.5
1.0
1.0
0.8
0.6
Iout = 1 mA
0.4
Iout = 30 mA
0.2
0.5
0
50
100
150
200
250
0
300
Iout = 50 mA
0
1
2
3
4
5
OUTPUT CURRENT (mA)
INPUT VOLTAGE (V)
Figure 5. Output Voltage vs. Output Current
NCP4688xx40
Figure 6. Output Voltage vs. Input Voltage
NCP4688xx12
3.0
6
4.5
4.0
OUTPUT VOLTAGE (V)
2.5
OUTPUT VOLTAGE (V)
0
Figure 3. Output Voltage vs. Output Current
NCP4688xx12
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
0
250
OUTPUT CURRENT (mA)
4.0
2.0
1.5
1.0
Iout = 1 mA
0.5
0
Vin = 2.8 V
1.0
OUTPUT CURRENT (mA)
4.5
0
Vin = 3.0 V
1.5
0.5
0.2
0
Vin = 4.0 V
2.0
Iout = 30 mA
Iout = 50 mA
0
1
2
3.5
3.0
2.5
2.0
Iout = 1 mA
1.5
1.0
Iout = 30 mA
0.5
3
4
5
0
6
Iout = 50 mA
0
1
2
3
4
5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 7. Output Voltage vs. Input Voltage
NCP4688xx25
Figure 8. Output Voltage vs. Input Voltage
NCP4688xx40
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4
6
NCP4688
80
90
70
80
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
TYPICAL CHARACTERISTICS
60
50
40
30
20
10
0
0
1
2
3
4
5
40
30
20
0
1
2
3
4
5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 9. Supply Current vs. Input Voltage
NCP4688xx12
Figure 10. Supply Current vs. Input Voltage
NCP4688xx25
6
80
70
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
50
0
6
80
60
50
40
30
20
10
0
1
2
3
4
5
75
70
65
60
55
50
−50
6
0
25
50
75
TEMPERATURE (°C)
Figure 11. Supply Current vs. Input Voltage
NCP4688xx40
Figure 12. Supply Current vs. Temperature
NCP4688xx12
80
80
75
75
70
65
60
55
50
−50
−25
INPUT VOLTAGE (V)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
60
10
90
0
70
−25
0
25
50
75
70
65
60
55
50
−50
100
−25
0
25
50
75
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. Supply Current vs. Temperature
NCP4688xx25
Figure 14. Supply Current vs. Temperature
NCP4688xx40
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5
100
100
NCP4688
TYPICAL CHARACTERISTICS
1.215
2.52
OUTPUT VOLTAGE (V)
2.53
OUTPUT VOLTAGE (V)
1.220
1.210
1.205
1.200
1.195
−25
0
25
50
75
−25
0
25
50
75
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 15. Output Voltage vs. Temperature
NCP4688xx12
Figure 16. Output Voltage vs. Temperature
NCP4688xx25
100
0.50
0.45
DROPOUT VOLTAGE (V)
4.01
OUTPUT VOLTAGE (V)
2.49
2.47
−50
100
4.02
4.00
3.99
3.98
3.97
3.96
−50
−25
0
25
50
75
100
85°C
0.40
25°C
0.35
0.30
−40°C
0.25
0.20
0.15
0.10
0.05
0
0
30
60
90
120
150
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
Figure 17. Output Voltage vs. Temperature
NCP4688xx40
Figure 18. Dropout Voltage vs. Output Current
NCP4688xx12
0.30
0.25
0.25
85°C
DROPOUT VOLTAGE (V)
DROPOUT VOLTAGE (V)
2.50
2.48
1.190
−50
25°C
0.20
0.15
−40°C
0.10
0.05
0
2.51
0
30
60
90
120
0.20
0.15
−40°C
0.10
0.05
0
150
85°C
25°C
0
30
60
90
120
150
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
Figure 19. Dropout Voltage vs. Output Current
NCP4688xx25
Figure 20. Dropout Voltage vs. Output Current
NCP4688xx40
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NCP4688
120
120
110
110
100
100
90
80
70
Iout =
50 mA
60
50
Vin = 2.2 V
40
PSRR (dB)
30
100
10k
80
70
Vin = 3.5 V
40
100k
30
100
1M
Iout = 150 mA
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 21. PSRR vs. Frequency NCP4688xx12
Figure 22. PSRR vs. Frequency NCP4688xx25
120
0.8
110
0.7
100
0.6
90
Iout = 1 mA
80
70
Iout =
50 mA
60
0.5
0.4
0.3
0.2
Vin = 5.0 V
0.1
40
30
100
Iout = 150 mA
1k
10k
100k
0
100
1M
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. PSRR vs. Frequency NCP4688xx40
Figure 24. Output Noise Density vs. Frequency
NCP4688xx12
0.8
0.7
0.7
0.6
0.6
0.5
0.5
mV / sqrt Hz
0.8
0.4
0.3
0.4
0.3
0.2
0.2
0.1
0.1
0
Iout =
50 mA
60
50
Iout = 150 mA
1k
Iout = 1 mA
90
FREQUENCY (Hz)
50
mV / sqrt Hz
PSRR (dB)
Iout = 1 mA
mV / sqrt Hz
PSRR (dB)
TYPICAL CHARACTERISTICS
10
100
1k
10k
100k
0
10
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 25. Output Noise Density vs. Frequency
NCP4688xx25
Figure 26. Output Noise Density vs. Frequency
NCP4688xx40
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NCP4688
5.0
3.2
4.5
2.7
4.0
2.2
3.5
1.201
2.503
2.502
2.501
1.200
2.500
1.199
2.499
1.198
1.197
Iout = 30 mA
0
40
2.498
2.497
80 120 160 200 240 280 320 360 400
VIN (V)
1.202
VOUT (V)
1.203
3.7
VIN (V)
VOUT (V)
TYPICAL CHARACTERISTICS
Iout = 30 mA
0
40
80
120 160 200 240 280 320 360 400
t (ms)
t (ms)
Figure 27. Line Transient Response
NCP4688xx12
Figure 28. Line Transient Response
NCP4688xx25
5.75
225
5.25
150
4.75
75
4.002
4.001
1.24
1.22
1.20
4.000
1.18
3.999
1.16
3.998
3.997
1.14
1.12
Iout = 30 mA
0
40
80 120 160 200 240 280 320 360 400
IOUT (mA)
VOUT (V)
0
VIN (V)
VOUT (V)
4.25
4.003
Vin = 2.2 V
0
20
40
60
t (ms)
t (ms)
Figure 29. Line Transient Response
NCP4688xx40
Figure 30. Load Transient Response Load
Step 1 mA to 150 mA NCP4688xx12
150
225
100
150
50
75
0
1.20
2.54
2.52
2.50
1.19
2.48
1.18
2.46
2.44
2.42
Vin = 2.2 V
0
20
40
60
80
100 120 140 160 180 200
IOUT (mA)
1.21
0
VOUT (V)
1.22
IOUT (mA)
VOUT (V)
1.23
1.17
1.16
80 100 120 140 160 180 200
Vin = 3.5 V
0
20
40
60
80 100 120 140 160 180 200
t (ms)
t (ms)
Figure 31. Load Transient Response Load
Step 50 mA to 100 mA NCP4688xx12
Figure 32. Load Transient Response Load
Step 1 mA to 150 mA NCP4688xx25
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NCP4688
TYPICAL CHARACTERISTICS
150
225
100
150
50
4.04
4.02
4.00
2.49
3.98
2.48
3.96
2.47
2.46
3.94
3.92
Vin = 3.5 V
0
20
40
60
80
100 120 140 160 180 200
0
IOUT (mA)
2.50
4.06
VOUT (V)
2.52
2.51
75
0
IOUT (mA)
VOUT (V)
2.53
Vin = 5.0 V
0
20
40
60
80 100 120 140 160 180 200
t (ms)
t (ms)
Figure 33. Load Transient Response Load
Step 50 mA to 100 mA NCP4688xx25
Figure 34. Load Transient Response Load
Step 1 mA to 150 mA NCP4688xx40
150
3.3
100
2.2
50
0
4.00
2.0
1.5
3.99
1.0
3.98
0.5
20
40
60
80
100 120 140 160 180 200
0.6
0.7
0.8
t (ms)
Figure 35. Load Transient Response Load
Step 50 mA to 100 mA NCP4688xx40
Figure 36. Turn Off with CE Behavior
NCP4688Dx12
7.5
3.50
5.0
VCE (V)
Iout = 30 mA
1.0
4.0
3.0
Iout = 1 mA
Iout = 30 mA
1.0
0
Iout = 150 mA
−0.5
0 0.1 0.2 0.3
0.4
0.5
0.6
0.7
0.8
0
−1.0
0.9 1.0
0
5.0
2.0
0.5
2.5
Chip Enable
0
Iout = 1 mA
0.9 1.0
5.25
1.75
2.5
1.5
0.4 0.5
t (ms)
Chip Enable
2.0
Iout = 30 mA
VCE (V)
0
Iout = 1 mA
0
Iout = 150 mA
−0.5
0 0.1 0.2 0.3
Vin = 5.0 V
VOUT (V)
3.97
3.96
VOUT (V)
VOUT (V)
4.01
0
2.5
VCE (V)
4.02
IOUT (mA)
VOUT (V)
4.03
1.1
Chip Enable
Iout = 150 mA
0
0.1
0.2
0.3
0.4 0.5
0.6
0.7
0.8
t (ms)
t (ms)
Figure 37. Turn Off with CE Behavior
NCP4688Dx25
Figure 38. Turn Off with CE Behavior
NCP4688Dx40
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0.9 1.0
NCP4688
TYPICAL CHARACTERISTICS
3.3
2.0
1.5
2.5
2.0
1.5
1.0
0.5
0.5
0
−0.5
0
−0.5
20
40
60
80
100 120 140 160 180 200
1.75
0
1.0
0
3.50
VCE (V)
2.5
0
VOUT (V)
Iout = 1 mA
Iout = 30 mA
Iout = 150 mA
Chip Enable
1.1
VCE (V)
VOUT (V)
Chip Enable
5.25
2.2
Iout = 1 mA
Iout = 30 mA
Iout = 150 mA
0
20
40
60
80 100 120 140 160 180 200
t (ms)
t (ms)
Figure 39. Turn ON with CE Behavior
NCP4688xx12
Figure 40. Turn ON with CE Behavior
NCP4688xx25
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NCP4688
APPLICATION INFORMATION
Enable Operation
A typical application circuit for NCP4688 series is shown
in the Figure 41.
NCP4688x
VIN
VIN
C1
1.0 mF
CE
The enable pin CE may be used for turning the regulator
on and off. The IC is switched on when a high level voltage
is applied to the CE pin. The enable pin has an internal pull
down current source which assure off state of LDO in case
the CE pin will stay floating. If the enable function is not
needed connect CE pin to VIN.
The D version of the NCP4688 device includes a
transistor between VOUT and GND that is used for faster
discharging of the output capacitor. This function is
activated when the IC goes into disable mode.
VOUT
VOUT
C2
1.0 mF
GND
Figure 41. Typical Application Schematic
Thermal Consideration
As a power across the IC increase, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and also the ambient
temperature affect the rate of temperature increase for the
part. When the device has good thermal conductivity
through the PCB the junction temperature will be relatively
low in high power dissipation applications.
Input Decoupling Capacitor (C1)
A 1.0 mF ceramic input decoupling capacitor should be
connected as close as possible to the input and ground pin of
the NCP4688 device. Higher values and lower ESR
improves line transient response.
Output Decoupling Capacitor (C2)
ESR vs. Output Current
When using the NCP4688 devices, consider the following
points:
The relation between Output Current Iout and ESR of the
output capacitor are shown below in Figures 42, 43 and 44.
The conditions when the device performs stable operation
are marked as the hatched area in the charts.
100
100
10
10
ESR (W)
ESR (W)
A 1.0 mF ceramic output decoupling capacitor is sufficient
to achieve stable operation of the device. If tantalum
capacitor is used, and its ESR is high, the loop oscillation
may result. For information about ESR see Figures 42, 43
and 44. The capacitor should be connected as close as
possible to the output and ground pin. Larger values and
lower ESR improves dynamic parameters.
1
0.1
0.01
1
0.1
0
25
50
75
100
125
150
0.01
0
25
50
75
100
125
150
LOAD CURRENT (mA)
LOAD CURRENT (mA)
Figure 42. ESR vs. Load Current NCP4688xx12
Figure 43. ESR vs. Load Current NCP4688xx25
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NCP4688
100
ESR (W)
10
1
0.1
0.01
0
25
50
75
100
125
150
LOAD CURRENT (mA)
Figure 44. ESR vs. Load Current NCP4688xx40
ORDERING INFORMATION
Marking
Nominal Output
Voltage
Feature
Package
Shipping†
NCP4688DMU12TCG
3A
1.2 V
Auto discharge
DFN1010
(Pb−Free)
10000 / Tape & Reel
NCP4688DMU15TCG
3E
1.5 V
Auto discharge
DFN1010
(Pb−Free)
10000 / Tape & Reel
NCP4688DMU18TCG
3H
1.8 V
Auto discharge
DFN1010
(Pb−Free)
10000 / Tape & Reel
NCP4688DMU25TCG
3R
2.5 V
Auto discharge
DFN1010
(Pb−Free)
10000 / Tape & Reel
NCP4688DMU28TCG
3U
2.8 V
Auto discharge
DFN1010
(Pb−Free)
10000 / Tape & Reel
NCP4688DMU30TCG
3X
3.0 V
Auto discharge
DFN1010
(Pb−Free)
10000 / Tape & Reel
NCP4688DMU33TCG
4A
3.3 V
Auto discharge
DFN1010
(Pb−Free)
10000 / Tape & Reel
NCP4688DSN12T1G
L12
1.2 V
Auto discharge
SOT−23
(Pb−Free)
3000 / Tape & Reel
NCP4688DSN15T1G
L15
1.5 V
Auto discharge
SOT−23
(Pb−Free)
3000 / Tape & Reel
NCP4688DSN18T1G
L18
1.8 V
Auto discharge
SOT−23
(Pb−Free)
3000 / Tape & Reel
NCP4688DSN25T1G
L25
2.5 V
Auto discharge
SOT−23
(Pb−Free)
3000 / Tape & Reel
NCP4688DSN28T1G
L28
2.8 V
Auto discharge
SOT−23
(Pb−Free)
3000 / Tape & Reel
NCP4688DSN33T1G
L33
3.3 V
Auto discharge
SOT−23
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
12
NCP4688
PACKAGE DIMENSIONS
UDFN4 1.0x1.0, 0.65P
CASE 517BR−01
ISSUE O
PIN ONE
REFERENCE
2X
0.05 C
4X
A
B
D
ÉÉ
ÉÉ
c 0.18
L2
E
typ
DETAIL A
0.05 C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L3
3X
TOP VIEW
0.43
4X
0.23
(A3)
0.05 C
A
3X
0.05 C
NOTE 4
A1
SIDE VIEW
e
DETAIL A
e/2
1
3X
2
D2
45 5
C
SEATING
PLANE
0.10
DETAIL B
DIM
A
A1
A3
b
D
D2
E
e
L
L2
L3
MILLIMETERS
MIN
MAX
−−−
0.60
0.00
0.05
0.10 REF
0.20
0.30
1.00 BSC
0.43
0.53
1.00 BSC
0.65 BSC
0.20
0.30
0.27
0.37
0.02
0.12
L
D2
4
3
4X
BOTTOM VIEW
b
0.05
M
C A B
NOTE 3
RECOMMENDED
MOUNTING FOOTPRINT*
0.65
PITCH
DETAIL B
2X
0.52
PACKAGE
OUTLINE
1.30
0.53
4X
0.30
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
13
NCP4688
PACKAGE DIMENSIONS
SOT−23 5−LEAD
CASE 1212−01
ISSUE A
A
5
E
1
L1
A1
4
2
L
3
5X
e
A2
0.05 S
B
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSIONS: MILLIMETERS.
3. DATUM C IS THE SEATING PLANE.
A
E1
b
0.10
C
M
C B
S
A
S
C
RECOMMENDED
SOLDERING FOOTPRINT*
3.30
DIM
A
A1
A2
b
c
D
E
E1
e
L
L1
MILLIMETERS
MIN
MAX
--1.45
0.00
0.10
1.00
1.30
0.30
0.50
0.10
0.25
2.70
3.10
2.50
3.10
1.50
1.80
0.95 BSC
0.20
--0.45
0.75
5X
0.85
5X
0.95
PITCH
0.56
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
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Phone: 81−3−5817−1050
http://onsemi.com
14
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP4688/D