ONSEMI NLAS5223B

NLAS5223B, NLAS5223BL
Ultra-Low 0.35 W
Dual SPDT Analog Switch
The NLAS5223B is an advanced CMOS analog switch fabricated in
Sub−micron silicon gate CMOS technology. The device is a dual
Independent Single Pole Double Throw (SPDT) switch featuring
Ultra−Low RON of 0.35 , at VCC = 4.3 V.
The part also features guaranteed Break Before Make (BBM)
switching, assuring the switches never short the driver.
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MARKING
DIAGRAM
Features













Ultra−Low RON, 0.35 (typ) at VCC = 4.3 V
NLAS5223B Interfaces with 2.8 V Chipset
NLAS5223BL Interfaces with 1.8 V Chipset
Single Supply Operation from 1.65−4.5 V
Full 0−VCC Signal Handling Capability
High Off−Channel Isolation
Low Standby Current, t50 nA
Low Distortion
RON Flatness of 0.15 High Continuous Current Capability
 320 mA Through Each Switch
Large Current Clamping Diodes at Analog Inputs
 320 mA Continuous Current Capability
Package:
 1.4 x 1.8 x 0.75 mm WQFN10 Pb−Free
 1.4 x 1.8 x 0.55 mm UQFN10 Pb−Free
These are Pb−Free Devices
1
1
XX
M
G
XXMG
G
UQFN10
CASE 488AT
XXMG
G
= Specific Device Code
AD = NLAS5223BMNR2G
AE = NLAS5223BLMNR2G
AP = NLAS5223BMUR2G
= Date Code/Assembly Location
= Pb−Free Device
(Note: Microdot may be in either location)
Applications




WQFN10
CASE 488AQ
Cell Phone Audio Block
Speaker and Earphone Switching
Ring−Tone Chip/Amplifier Switching
Modems
NC2
GND
7
6
IN2
8
5
NC1
COM2
9
4
IN1
10
3
COM1
NO2
1
2
VCC
NO1
FUNCTION TABLE
IN 1, 2
NO 1, 2
NC 1, 2
0
OFF
ON
1
ON
OFF
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
 Semiconductor Components Industries, LLC, 2011
October, 2011 − Rev. 8
1
Publication Order Number:
NLAS5223B/D
NLAS5223B, NLAS5223BL
COM
NO
NC
IN
Figure 1. Logic Equivalent Circuit
PIN DESCRIPTION
QFN PIN #
Symbol
Name and Function
2, 5, 7, 10
NC1 to NC2, NO1 to NO2
Independent Channels
4, 8
IN1 and IN2
3, 9
COM1 and COM2
Controls
6
GND
Ground (V)
1
VCC
Positive Supply Voltage
Common Channels
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
−0.5 to +5.5
V
−0.5 v VIS v VCC + 0.5
V
VCC
Positive DC Supply Voltage
VIS
Analog Input Voltage (VNO, VNC, or VCOM)
VIN
Digital Select Input Voltage
−0.5 v VIN v +5.5
V
Ianl1
Continuous DC Current from COM to NC/NO
320
mA
Ianl−pk1
Peak Current from COM to NC/NO, 10% Duty Cycle, 100 ms = tON (Note 1)
600
mA
Ianl−pk2
Instantaneous Peak Current from COM to NC/NO, 10% Duty Cycle, tON < 1 s
850
mA
Continuous DC Current into COM/NO/NC with Respect to VCC or GND
100
mA
Iclmp
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Defined as 10% ON, 90% OFF Duty Cycle.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage
1.65
4.5
V
VIN
Digital Select Input Voltage (OVT) Overvoltage Tolerance
GND
4.5
V
VIS
Analog Input Voltage (NC, NO, COM)
GND
VCC
V
TA
Operating Temperature Range
−40
+85
C
tr, tf
Input Rise or Fall Time, SELECT
VCC = 1.6 V − 2.7 V
VCC = 3.0 V − 4.5 V
20
10
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2
ns/V
NLAS5223B, NLAS5223BL
NLAS5223B DC CHARACTERISTICS − DIGITAL SECTION (Voltages Referenced to GND)
Guaranteed Limit
Condition
VCC
25C
−40C to +85C
Unit
Symbol
Parameter
VIH
Minimum High−Level Input Voltage, Select
Inputs
3.0
4.3
1.4
2.0
1.4
2.0
V
VIL
Maximum Low−Level Input Voltage, Select
Inputs
3.0
4.3
0.7
0.8
0.7
0.8
V
IIN
Maximum Input Leakage Current, Select
Inputs
VIN = VCC or GND
4.3
0.1
1.0
A
IOFF
Power Off Leakage Current
VIN = VCC or GND
0
0.5
2.0
A
ICC
Maximum Quiescent Supply Current
(Note 2)
Select and VIS = VCC or GND
1.65 to 4.5
1.0
2.0
A
2. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
NLAS5223B DC ELECTRICAL CHARACTERISTICS − ANALOG SECTION
Guaranteed Maximum Limit
25C
Symbol
RON
Parameter
Condition
VCC
Min
−40C to +85C
Max
Min
Max
Unit
NC/NO On−Resistance
(Note 3)
VIN = VIL or VIN = VIH
VIS = GND to VCC
ICOM = 100 mA
3.0
4.3
0.4
0.35
0.5
0.4
RFLAT
NC/NO On−Resistance Flatness
(Notes 3 and 4)
ICOM = 100 mA
VIS = 0 to VCC
3.0
4.3
0.16
0.11
0.20
0.14
RON
On−Resistance Match Between Channels
(Notes 3 and 5)
VIS = 1.5 V;
ICOM = 100 mA
VIS = 2.2 V;
ICOM = 100 mA
3.0
0.05
0.05
4.3
0.05
0.05
INC(OFF)
INO(OFF)
NC or NO Off Leakage Current (Note 3)
VIN = VIL or VIH
VNO or VNC = 0.3 V
VCOM = 4.0 V
4.3
−5.0
5.0
−50
50
nA
ICOM(ON)
COM ON
Leakage Current
(Note 3)
VIN = VIL or VIH
VNO 0.3 V or 4.0 V with
VNC floating or
VNC 0.3 V or 4.0 V with
VNO floating
VCOM = 0.3 V or 4.0 V
4.3
−10
10
−100
100
nA
3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
4. Flatness is defined as the difference between the maximum and minimum value of On−resistance as measured over the specified analog
signal ranges.
5. RON = RON(MAX) − RON(MIN) between NC1 and NC2 or between NO1 and NO2.
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3
NLAS5223B, NLAS5223BL
NLAS5223BL DC CHARACTERISTICS − DIGITAL SECTION (Voltages Referenced to GND)
Guaranteed Limit
Condition
VCC
25C
−40C to +85C
Unit
Symbol
Parameter
VIH
Minimum High−Level Input Voltage, Select
Inputs
3.0
4.3
1.3
1.6
1.3
1.6
V
VIL
Maximum Low−Level Input Voltage, Select
Inputs
3.0
4.3
0.5
0.6
0.5
0.6
V
IIN
Maximum Input Leakage Current, Select
Inputs
VIN = 4.5 V or GND
4.3
0.1
1.0
A
IOFF
Power Off Leakage Current
VIN = 4.5 V or GND
0
0.5
2.0
A
ICC
Maximum Quiescent Supply Current
(Note 6)
Select and VIS = VCC or GND
1.65 to 4.5
1.0
2.0
A
6. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
NLAS5223BL DC ELECTRICAL CHARACTERISTICS − ANALOG SECTION
Guaranteed Maximum Limit
25C
Symbol
RON
Parameter
Condition
VCC
Min
−40C to +85C
Max
Min
Max
Unit
NC/NO On−Resistance
(Note 7)
VIN = VIL or VIN = VIH
VIS = GND to VCC
ICOM = 100 mA
3.0
4.3
0.4
0.35
0.5
0.4
RFLAT
NC/NO On−Resistance Flatness
(Notes 7 and 8)
ICOM = 100 mA
VIS = 0 to VCC
3.0
4.3
0.16
0.11
0.20
0.14
RON
On−Resistance Match Between Channels
(Notes 7 and 9)
VIS = 1.5 V;
ICOM = 100 mA
VIS = 2.2 V;
ICOM = 100 mA
3.0
0.05
0.05
4.3
0.05
0.05
INC(OFF)
INO(OFF)
NC or NO Off Leakage Current (Note 7)
VIN = VIL or VIH
VNO or VNC = 0.3 V
VCOM = 4.0 V
4.3
−10
10
−100
100
nA
ICOM(ON)
COM ON
Leakage Current
(Note 7)
VIN = VIL or VIH
VNO 0.3 V or 4.0 V with
VNC floating or
VNC 0.3 V or 4.0 V with
VNO floating
VCOM = 0.3 V or 4.0 V
4.3
−10
10
−100
100
nA
7. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
8. Flatness is defined as the difference between the maximum and minimum value of On−resistance as measured over the specified analog
signal ranges.
9. RON = RON(MAX) − RON(MIN) between NC1 and NC2 or between NO1 and NO2.
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NLAS5223B, NLAS5223BL
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Guaranteed Maximum Limit
Symbol
Parameter
Test Conditions
VCC
(V)
VIS
(V)
25C
Min
Typ*
−40C to +85C
Max
Min
Max
Unit
tON
Turn−On Time
RL = 50 , CL = 35 pF
(Figures 3 and 4)
2.3 − 4.5
1.5
50
60
ns
tOFF
Turn−Off Time
RL = 50 , CL = 35 pF
(Figures 3 and 4)
2.3 − 4.5
1.5
30
40
ns
tBBM
Minimum Break−Before−Make
Time
VIS = 3.0
RL = 50 , CL = 35 pF
(Figure 2)
3.0
1.5
2
ns
15
Typical @ 25, VCC = 3.6 V
CIN
CNO/NC
CCOM
Control Pin Input Capacitance
3.5
pF
NO, NC Port Capacitance
60
pF
COM Port Capacitance When Switch is Enabled
200
pF
*Typical Characteristics are at 25C.
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Symbol
BW
Parameter
Condition
25C
VCC
(V)
Typical
Unit
Maximum On−Channel −3 dB
Bandwidth or Minimum
Frequency Response
VIN centered between VCC and GND
(Figure 5)
1.65 − 4.5
19
MHz
VONL
Maximum Feed−through On Loss
VIN = 0 dBm @ 100 kHz to 50 MHz
VIN centered between VCC and GND (Figure 5)
1.65 − 4.5
−0.06
dB
VISO
Off−Channel Isolation
f = 100 kHz; VIS = 1 V RMS; CL = 5.0 pF
VIN centered between VCC and GND (Figure 5)
1.65 − 4.5
−68
dB
Charge Injection Select Input to
Common I/O
VIN = VCC to GND, RIS = 0 , CL = 1.0 nF
Q = CL x DVOUT (Figure 6)
1.65 − 4.5
38
pC
THD
Total Harmonic Distortion
THD + Noise
FIS = 20 Hz to 20 kHz, RL = Rgen = 600 , CL = 50 pF
VIS = 2.0 V RMS
3.0
0.08
%
VCT
Channel−to−Channel Crosstalk
f = 100 kHz; VIS = 1.0 V RMS, CL = 5.0 pF, RL = 50 VIN centered between VCC and GND (Figure 5)
1.65 − 4.5
−70
dB
Q
10. Off−Channel Isolation = 20log10 (VCOM/VNO), VCOM = output, VNO = input to off switch.
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5
NLAS5223B, NLAS5223BL
VCC
DUT
VIS
Input
Output
GND
VOUT
0.1 F
50 tBMM
35 pF
90%
90% of VOH
Output
Switch Select Pin
GND
Figure 2. tBBM (Time Break−Before−Make)
VCC
Input
DUT
VIS
0.1 F
50%
Output
VOUT
Open
50%
0V
50 VOH
90%
35 pF
90%
Output
VOL
Input
tON
tOFF
Figure 3. tON/tOFF
VCC
VCC
Input
DUT
Output
50%
0V
50 VOUT
Open
50%
VOH
35 pF
Output
Input
tOFF
Figure 4. tON/tOFF
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6
10%
10%
VOL
tON
NLAS5223B, NLAS5223BL
50 DUT
Reference
Transmitted
Input
Output
50 Generator
50 Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction.
ǒVVOUT
Ǔ for VIN at 100 kHz
IN
VOUT
Ǔ for VIN at 100 kHz to 50 MHz
VONL = On Channel Loss = 20 Logǒ
VIN
VISO = Off Channel Isolation = 20 Log
Bandwidth (BW) = the frequency 3 dB below VONL
VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50 Figure 5. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
DUT
VCC
VIN
Output
Open
GND
CL
Output
Off
VIN
Figure 6. Charge Injection: (Q)
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7
On
Off
VOUT
NLAS5223B, NLAS5223BL
0
0
−10
−3
−20
−30
−6
BW (dB)
XT (dB)
−40
−50
−60
−9
−12
−70
−80
−15
−90
−100
0.01
0.1
1
10
−18
0.01
100
0.1
FREQUENCY (MHz)
100
FREQUENCY (MHz)
Figure 7. Cross Talk vs. Frequency
@ VCC = 4.3 V
Figure 8. Bandwidth vs. Frequency
0.4
0.12
85C
0.35
0.1
0.3
RON ()
0.08
THD (%)
10
1
0.06
0.04
25C
0.25
−40C
0.2
0.15
0.1
0.02
0.05
0
10
100
1000
10000
0
100000
0
0.5
1
FREQUENCY (Hz)
3
2.5
Figure 10. On−Resistance vs. Input Voltage
@ VCC = 3.0 V
0.36
0.34
0.4
0.35
3.0 V
0.32
0.3
0.30
85C
0.28
RON ()
0.25
RON ()
2
VIN (V)
Figure 9. Total Harmonic Distortion
25C
0.2
−40C
0.15
0.26
0.24
0.22
4.3 V
0.20
0.1
0.18
0.05
0
1.5
0.16
0
0.5
1
1.5
2
2.5
3
3.5
0.14
4
0
0.5
1
1.5
2
2.5
3
3.5
4
VIN (V)
VIN (V)
Figure 11. On−Resistance vs. Input Voltage
@ VCC = 4.3 V
Figure 12. On−Resistance vs. Input Voltage
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8
4.5
NLAS5223B, NLAS5223BL
ORDERING INFORMATION
Package
Shipping†
NLAS5223BMNR2G
WQFN10
(Pb−Free)
3000 / Tape & Reel
NLAS5223BLMNR2G
WQFN10
(Pb−Free)
3000 / Tape & Reel
NLAS5223BMUR2G
UQFN10
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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9
NLAS5223B, NLAS5223BL
PACKAGE DIMENSIONS
WQFN10, 1.4x1.8, 0.4P
CASE 488AQ−01
ISSUE C
D
ÉÉ
ÉÉ
ÉÉ
PIN 1 REFERENCE
2X
2X
0.15 C
M1
E
DETAIL A
Bottom View
(Optional)
0.15 C
B
EXPOSED Cu
A
0.10 C
0.08 C
A1
A1
A3
3
9X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
5. EXPOSED PADS CONNECTED TO DIE FLAG.
USED AS TEST CONTACTS.
EDGE OF PACKAGE
A
5
L
C
SEATING
PLANE
DIM
A
A1
A3
b
D
E
e
L
L1
M1
MOLD CMPD
ÉÉÉ
ÉÉÉ
A3
DETAIL B
Side View
(Optional)
e/2
MOUNTING FOOTPRINT
e
1.700
0.0669
6
1
0.663
0.0261
10
L1
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.050
0.20 REF
0.15
0.25
1.40 BSC
1.80 BSC
0.40 BSC
0.30
0.50
0.40
0.60
0.00
0.05
10 X
b
0.200
0.0079
0.10 C A B
0.05 C
NOTE 3
9X
0.563
0.0221
1
2.100
0.0827
0.400
0.0157
PITCH
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10
10 X
0.225
0.0089
SCALE 20:1
mm Ǔ
ǒinches
NLAS5223B, NLAS5223BL
PACKAGE DIMENSIONS
UQFN10, 1.4x1.8, 0.4P
CASE 488AT−01
ISSUE A
EDGE OF PACKAGE
D
ÉÉ
ÉÉ
PIN 1 REFERENCE
2X
2X
L1
E
DETAIL A
Bottom View
(Optional)
0.10 C
0.10 C
B
TOP VIEW
A1
0.05 C
A1
3
SEATING
PLANE
C
SIDE VIEW
9X
EXPOSED Cu
A
0.05 C
10X
5
DIM
A
A1
A3
b
D
E
e
L
L1
L3
MOLD CMPD
ÉÉ
ÉÉ
A3
DETAIL B
Side View
(Optional)
1.700
0.0669
0.663
0.0261
6
e
1
10 X
L3
b
MILLIMETERS
MIN
MAX
0.45
0.60
0.00
0.05
0.127 REF
0.15
0.25
1.40 BSC
1.80 BSC
0.40 BSC
0.30
0.50
0.00
0.15
0.40
0.60
MOUNTING FOOTPRINT
e/2
L
10
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
A
0.200
0.0079
1
0.10 C A B
0.05 C
9X
0.563
0.0221
2.100
0.0827
NOTE 3
BOTTOM VIEW
0.400
0.0157
PITCH
10 X
0.225
0.0089
SCALE 20:1
mm Ǔ
ǒinches
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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11
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NLAS5228B/D