MC74LCX125 Low-Voltage CMOS Quad Buffer With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) http://onsemi.com The MC74LCX125 is a high performance, non−inverting quad buffer operating from a 2.3 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX125 inputs to be safely driven from 5.0 V devices. The MC74LCX125 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Current drive capability is 24 mA at the outputs. The Output Enable (OEn) inputs, when HIGH, disable the outputs by placing them in a HIGH Z condition. MARKING DIAGRAMS 14 SOIC−14 D SUFFIX CASE 751A 14 1 1 Features • • • • • • • • • • • • 14 Designed for 2.3 to 3.6 V VCC Operation 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0 V LVTTL Compatible LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in all Three Logic States (10 mA) Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA ESD Performance: Human Body Model >2000 V Machine Model >200 V NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant © Semiconductor Components Industries, LLC, 2012 July, 2012 − Rev. 7 LCX125G AWLYWW 1 14 1 TSSOP−14 DT SUFFIX CASE 948G A L, WL Y, YY W, WW G or G 1 LCX 125 ALYWG G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. Publication Order Number: MC74LCX125/D MC74LCX125 VCC OE3 D3 O3 OE2 D2 O2 14 13 12 11 10 9 8 1 2 3 4 5 6 7 OE0 D0 O0 OE1 D1 O1 GND OE 0 D0 1 OE 1 D1 4 2 3 5 6 Figure 1. Pinout: 14−Lead (Top View) OE 2 O0 D2 10 OE 3 O1 D3 13 9 12 8 O2 11 O3 Figure 2. Logic Diagram PIN NAMES TRUTH TABLE Pins Function OEn Output Enable Inputs OEn Dn On Dn Data Inputs L L L On 3−State Outputs L H H H X Z INPUTS OUTPUTS H = High Voltage Level L = Low Voltage Level Z = High Impedance State X = High or Low Voltage Level and Transitions Are Acceptable; for ICC reasons, DO NOT FLOAT Inputs MAXIMUM RATINGS Symbol VCC Parameter DC Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Condition Units −0.5 to +7.0 V −0.5 ≤ VI ≤ +7.0 V −0.5 ≤ VO ≤ +7.0 Output in 3−State V −0.5 ≤ VO ≤ VCC + 0.5 Output in HIGH or LOW State. (Note 1) V IIK DC Input Diode Current −50 VI < GND mA IOK DC Output Diode Current −50 VO < GND mA +50 VO > VCC mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current Per Ground Pin ±100 mA TSTG Storage Temperature Range −65 to +150 °C MSL Moisture Sensitivity Level 1 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. IO absolute maximum rating must be observed. http://onsemi.com 2 MC74LCX125 RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Operating Data Retention Only Min Typ Max 2.0 1.5 2.5, 3.3 2.5, 3.3 3.6 3.6 VI Input Voltage 0 5.5 VO Output Voltage HIGH or LOW State 3−State 0 0 VCC 5.5 IOH HIGH Level Output Current VCC = 3.0 V − 3.6 V VCC = 2.7 V − 3.0 V VCC = 2.3 V − 2.7 V −24 −12 −8 IOL LOW Level Output Current VCC = 3.0 V − 3.6 V VCC = 2.7 V − 3.0 V VCC = 2.3 V − 2.7 V +24 +12 +8 TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V Units V V V mA mA −40 +85 °C 0 10 ns/V DC ELECTRICAL CHARACTERISTICS TA = −40°C to +85°C Symbol VIH VIL VOH VOL Characteristic HIGH Level Input Voltage (Note 2) LOW Level Input Voltage (Note 2) HIGH Level Output Voltage LOW Level Output Voltage Condition Min 2.3 V ≤ VCC ≤ 2.7 V 1.7 2.7 V ≤ VCC ≤ 3.6 V 2.0 Max V 2.3 V ≤ VCC ≤ 2.7 V 0.7 2.7 V ≤ VCC ≤ 3.6 V 0.8 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA VCC − 0.2 VCC = 2.3 V; IOH = −8 mA 1.8 VCC = 2.7 V; IOH = −12 mA 2.2 VCC = 3.0 V; IOH = −18 mA 2.4 VCC = 3.0 V; IOH = −24 mA 2.2 Units V V 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA 0.2 V VCC = 2.3 V; IOL= 8 mA 0.6 VCC = 2.7 V; IOL= 12 mA 0.4 VCC = 3.0 V; IOL = 16 mA 0.4 VCC = 3.0 V; IOL = 24 mA 0.55 VCC = 3.6 V, VIN = VIH or VIL, VOUT = 0 to 3.6 V ±5 mA IOZ 3−State Output Current IOFF Power Off Leakage Current VCC = 0, VIN = 3.6 V or VOUT = 3.6 V 10 mA IIN Input Leakage Current VCC = 0 to 3.6 V, VIN = 3.6 V or GND ±5 mA ICC Quiescent Supply Current VCC = 3.6 V, VIN = 3.6 V or VOUT = 3.6 V 10 mA 2.3 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V 500 mA DICC Increase in ICC per Input 2. These values of VI are used to test DC electrical characteristics only. http://onsemi.com 3 MC74LCX125 AC CHARACTERISTICS tR = tF = 2.5 ns; RL = 500 W Limits TA = −40°C to +85°C Parameter Symbol VCC = 3.3 V ± 0.3 V VCC = 2.7 V VCC = 2.5 V ± 0.2 V CL = 50 pF CL = 50 pF CL = 30 pF Waveform Min Max Min Max Min Max Units tPLH tPHL Propagation Delay Time Input to Output 1 1.5 1.5 6.0 6.0 1.5 1.5 6.5 6.5 1.5 1.5 7.2 7.2 ns tPZH tPZL Output Enable Time to High and Low Level 2 1.5 1.5 7.0 7.0 1.5 1.5 8.0 8.0 1.5 1.5 9.1 9.1 ns tPHZ tPLZ Output Disable Time From High and Low Level 2 1.5 1.5 6.0 6.0 1.5 1.5 7.0 7.0 1.5 1.5 7.2 7.2 ns tOSHL tOSLH Output−to−Output Skew (Note 3) 1.0 1.0 ns 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. DYNAMIC SWITCHING CHARACTERISTICS TA = +25°C Symbol Characteristic Condition Min Typ Max Units VOLP Dynamic LOW Peak Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V 0.8 0.6 V VOLV Dynamic LOW Valley Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V −0.8 −0.6 V 4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol CIN Parameter Condition Typical Units Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF ORDERING INFORMATION Package Shipping† MC74LCX125DG SOIC−14 (Pb−Free) 55 Units / Rail MC74LCX125DR2G SOIC−14 (Pb−Free) 2500 Tape & Reel MC74LCX125DTG TSSOP−14 (Pb−Free) 96 Units / Rail MC74LCX125DTR2G TSSOP−14 (Pb−Free) 2500 Tape & Reel NLVLCX125DTR2G TSSOP−14* (Pb−Free) 2500 Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified. http://onsemi.com 4 MC74LCX125 VCC Vmi Dn Vmi 0V tPLH tPHL VOH Vmo On Vmo VOL WAVEFORM 1 − PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns VCC Vmi OEn Vmi 0V tPZH tPHZ VCC VOH − 0.3 V Vmo On ≈0V tPZL tPLZ ≈ 3.0 V Vmo On VOL + 0.3 V GND WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns VCC Symbol 3.3 V ± 0.3 V 2.7 V 2.5 V ± 0.2 V Vmi 1.5 V 1.5 V VCC/2 Vmo 1.5 V 1.5 V VCC/2 Figure 3. AC Waveforms VCC PULSE GENERATOR DUT RT CL = CL = RL = RT = CL RL 50 pF at VCC = 3.3 ±0.3 V or equivalent (includes jig and probe capacitance) 30 pF at VCC = 2.5 ±0.2 V or equivalent (includes jig and probe capacitance) R1 = 500 W or equivalent ZOUT of pulse generator (typically 50 W) Figure 4. Test Circuit http://onsemi.com 5 MC74LCX125 PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K D A B 14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. A3 E H L 1 0.25 M DETAIL A 7 B 13X M b 0.25 M C A S B S e DETAIL A h A X 45 _ M A1 C SEATING PLANE DIM A A1 A3 b D E e H h L M MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.19 0.25 0.35 0.49 8.55 8.75 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ SOLDERING FOOTPRINT* 6.50 14X 1.18 1 1.27 PITCH 14X 0.58 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 INCHES MIN MAX 0.054 0.068 0.004 0.010 0.008 0.010 0.014 0.019 0.337 0.344 0.150 0.157 0.050 BSC 0.228 0.244 0.010 0.019 0.016 0.049 0_ 7_ MC74LCX125 PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S N 2X 14 L/2 0.25 (0.010) 8 M B −U− L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. S S DETAIL E K A −V− ÇÇÇ ÇÇÇ ÉÉÉ ÇÇÇ ÉÉÉ K1 J J1 SECTION N−N −W− C 0.10 (0.004) −T− SEATING PLANE D G H DETAIL E DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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