PAC7301/PAC7302 PAC7302 VGA Output PC Camera SOC with Audio PAC7301 VGA Output PC Camera SOC without Audio General Description The PAC7301/PAC7302 is a VGA output PC Camera SOC with embedded CMOS image sensor and USB 1.1 interface. It embedded a JPEG image compression engine and an image signal processor (ISP). The JPEG decoder and auto exposure control are performed by software in PC side. The PAC7301/PAC7302 can achieve a compact module size by using it’s 1/6” optical size which can easily be embedded in LCD monitors and notebooks. The chip provides IO-trapping pins with internal pull-up resistors. Hence it is flexible for customers to set PID on module PCB. It supports an interface connect to a serial-EEPROM. When the EEPROM function is enabled, the internal control register setting will be auto loaded to the external EEPROM. This allows customization of VID, PID, product string…etc. PAC7301/PAC7302 also provide a high quality audio ADC function for sound recording. The audio-in function complies with USB audio device class 1.0. The PAC7301/PAC7302 is powered by 5V and in PLCC/CSP/LGA package 1. Feature z z z z z z z z z z z z Embedded CMOS image sensor with VGA output Frame rate up to 30fps@VGA for PC mode video Embedded PixArt 3rd generation ISP and JPEG compression engine AEC/AGC/AWB automatic On chip 10bit ADC for image date converter External 12MHz crystal input 5 IO-trapping pins to set USB PID Support video data transfer through USB isochronous transfer Snapshot and LED control function Built-in EEPROM controller for customized VID, PID etc USB1.1 compliance and support USB suspend mode Embedded audio function (PAC7301/PAC7302) -- 10bits ADC for audio recording through microphone, -- sampling rate @ 16K/48KHz, 16bits PCM format -- USB audio device class 1.0 compatible z On chip regulator(LDO) for internal use z 5V single power supply Frame rate up to 30fps at following resolution format .. VGA format (640x480) with JPEG compression .. CIF format (352x288) with JPEG compression .. QVGA format (320x240) with JPEG compression .. QCIF format (176x144) without compression .. QQVGA format (160x120) without compression 2. Ordering Information Order number Package Type Package Size(mm) PAC7302PE PAC7302PM PAC7301/PAC73 02LT PAC7302LG 48-pin PLCC 40-pin PLCC 35-pin CSP 11.43 x 11.43 9.0x9.0 3.95x3.95 30-pin LGA 3.95x3.95 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 1 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 3. Pin Assignment 3.1 PLCC Package(11.43X11.43) Pin# 1 2 3 4 5 6 7 Name MIC_N VSSA_AUDIO VDDADC33 GPI3 GPO1 NC NC Type IN GND BYPASS IN OUT - 41 TEST1 IN 42 NC 43 NC VDDMA5_AU 44 D 45 VDDPGA33 46 VCOM - Description Microphone negative input Audio analog circuit GND Audio ADC power ,3.3V General purpose input pin General purpose output pin No Connection No Connection Test pin. Connect to GND in normal operation mode, internal pull-down 100Kohm Chip power up reset General purpose input pin Digital Ground for I/O and PHY, digital core. Data out of EEPROM (IO trap pin for PID3, internal pull-up 100Kohm) Data input of EEPROM (IO trap pin for PID0, internal pull-up 100Kohm) Serial clock of EEPROM (IO trap pin for PID2, internal pull-up 100Kohm) Chip select of EEPROM (IO trap pin for PID1, internal pull-up 100Kohm) LED driver General purpose input pin No Connection No Connection EEPROM enable pin active high Audio enable pin, High active, internal pull-up 100Kohm Digital Ground for I/O and PHY, digital core. Logic power for digital circuit, 1.8V 5V power for digital circuit Power for I/O and PHY, 3.3V Crystal output Crystal input DN for USB1.1 PHY DP for USB1.1 PHY No Connection No Connection General purpose output pin, internal pull-up 100Kohm, reserve VID Snapshot control signal (Active Low, internal pull-up 100Kohm) Analog ground Sensor ground Analog power for Video PGA/ADC 2.5V Analog power for sensor CDS 2.5V Analog power for sensor array 2.5V Analog power output 3.3V(for 2.5 regulator use) 5V power for video analog circuit Test pin. Connect to GND in normal operation mode, internal pull-down 100Kohm No Connection No Connection 8 TEST2 IN 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 RESET# GPI1 VSSQ EPR_DO/TR3 EPR_DI/TR0 EPR_SK/TR2 EPR_CS/TR1 LED GPI2 NC NC EPR_EN AUD_EnH VSSQ VDDD VDDMD5 VDDQ OSC_OUT OSC_IN DN DP NC NC GPO2 KEY# VSSA VSSAY VDDA VDDAYM VDDAY VDDA33 VDDMA5 IN IN GND IN OUT OUT OUT OUT IN IN IN GND BYPASS PWR BYPASS OUT IN I/O I/O OUT IN GND GND BYPASS BYPASS BYPASS BYPASS PWR PWR 5V power for analog audio circuit BYPASS Analog power output for audio PGA 3.3V BYPASS Microphone common mode voltage reference(audio power) All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 2 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 47 VDDMIC28 48 MIC_P BYPASS Analog MIC reference audio power 2.8V IN Microphone positive input 3.2 PLCC Package(9X9) Pin# 1 2 3 4 5 Name MIC_N VSSA_AUDIO VDDADC33 GPI3 GPO1 Type IN GND BYPASS IN OUT 6 TEST2 IN 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 RESET# GPI1 VSSQ EPR_DO/TR3 EPR_DI/TR0 EPR_SK/TR2 EPR_CS/TR1 LED GPI2 EPR_EN AUD_EnH VSSQ VDDD VDDMD5 VDDQ OSC_OUT OSC_IN DN DP GPO2 KEY# VSSA VSSAY VDDA VDDAYM VDDAY VDDA33 VDDMA5 IN IN GND IN OUT OUT OUT OUT IN IN IN GND BYPASS PWR BYPASS OUT IN I/O I/O OUT IN GND GND BYPASS BYPASS BYPASS BYPASS PWR 35 TEST1 36 37 38 39 40 VDDMA5_AU D VDDPGA33 VCOM VDDMIC28 MIC_P IN Description Microphone negative input Audio analog circuit GND Audio ADC power ,3.3V General purpose input pin General purpose output pin Test pin. Connect to GND in normal operation mode, internal pull-down 100Kohm Chip power up reset General purpose input pin Digital Ground for I/O and PHY, digital core. Data out of EEPROM (IO trap pin for PID3, internal pull-up 100Kohm) Data input of EEPROM (IO trap pin for PID0, internal pull-up 100Kohm) Serial clock of EEPROM (IO trap pin for PID2, internal pull-up 100Kohm) Chip select of EEPROM (IO trap pin for PID1, internal pull-up 100Kohm) LED driver General purpose input pin EEPROM enable pin active high Audio enable pin, High active, internal pull-up 100Kohm Digital Ground for I/O and PHY, digital core. Logic power for digital circuit, 1.8V 5V power for digital circuit Power for I/O and PHY, 3.3V Crystal output Crystal input DN for USB1.1 PHY DP for USB1.1 PHY General purpose output pin, internal pull-up 100Kohm, reserve VID Snapshot control signal (Active Low, internal pull-up 100Kohm) Analog ground Sensor ground Analog power for Video PGA/ADC 2.5V Analog power for sensor CDS 2.5V Analog power for sensor array 2.5V Analog power output 3.3V(for 2.5 regulator use) 5V power for video analog circuit Test pin. Connect to GND in normal operation mode, internal pull-down 100Kohm PWR 5V power for analog audio circuit BYPASS BYPASS BYPASS IN Analog power output for audio PGA 3.3V Microphone common mode voltage reference(audio power) Analog MIC reference audio power 2.8V Microphone positive input All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 3 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 3.3 CSP Package Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Name GPO1 VDDADC33 MIC_N VDDMIC28 VDDPGA33 VDDMA5_AU D RESET# GPI3 VSSA_AUDIO MIC_P VDDMA5 VDDA33 VSSQ GPI1 VCOM VDDAY VDDAYM EPR_DI/TR0 EPR_SK/TR2 EPR_DO/TR3 VDDA KEY# VSSAY EPR_CS/TR1 LED VDDD VDDQ OSC_IN VSSA EPR_EN VSSQ VDDMD5 OSC_OUT DN DP Type OUT BYPASS IN BYPASS BYPASS Description General purpose output pin Audio ADC power ,3.3V Microphone negative input Analog MIC reference audio power 2.8V Analog power output for audio PGA 3.3V PWR 5V power for analog audio circuit IN IN GND IN PWR BYPASS GND IN BYPASS BYPASS BYPASS OUT OUT IN BYPASS IN GND OUT OUT BYPASS BYPASS IN GND IN GND PWR OUT I/O I/O Chip power up reset General purpose input pin Audio analog circuit GND Microphone positive input 5V power for video analog circuit Analog power output 3.3V(for 2.5 regulator use) Digital Ground for I/O and PHY, digital core. General purpose input pin Microphone common mode voltage reference(audio power) Analog power for sensor array 2.5V Analog power for sensor CDS 2.5V Data input of EEPROM (IO trap pin for PID0, internal pull-up 100Kohm) Serial clock of EEPROM (IO trap pin for PID2, internal pull-up 100Kohm) Data out of EEPROM (IO trap pin for PID3, internal pull-up 100Kohm) Analog power for Video PGA/ADC 2.5V Snapshot control signal (Active Low, internal pull-up 100Kohm) Sensor ground Chip select of EEPROM (IO trap pin for PID1, internal pull-up 100Kohm) LED driver Logic power for digital circuit, 1.8V Power for I/O and PHY, 3.3V Crystal input Analog ground EEPROM enable pin active high Ground for I/O and PHY 5V power for digital circuit Crystal output DN for USB1.1 PHY DP for USB1.1 PHY Type OUT BYPASS GND IN IN BYPASS BYPASS BYPASS Description General purpose output pin Audio ADC power ,3.3V Audio analog circuit GND Microphone negative input Microphone positive input Analog MIC reference audio power 2.8V Microphone common mode voltage reference(audio power) Analog power output for audio PGA 3.3V 3.4 LGA Package Pin# 1 2 3 4 5 6 7 8 Name GPO1 VDDADC33 VSSA_AUDIO MIC_N MIC_P VDDMIC28 VCOM VDDPGA33 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 4 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 VDDMA5 VDDA33 VDDAY VDDAYM VDDA VSSA KEY# DP DN OSC_IN OSC_OUT VDDQ VDDMD5 VDDD VSSQ EPR_EN LED NC NC VSSQ GPI1 RESET# PWR BYPASS BYPASS BYPASS BYPASS GND IN I/O I/O IN OUT BYPASS PWR BYPASS GND IN OUT GND IN IN 5V power for video analog circuit Analog power output 3.3V(for 2.5 regulator use) Analog power for sensor array 2.5V Analog power for sensor CDS 2.5V Analog power for Video PGA/ADC 2.5V Analog ground Snapshot control signal (Active Low, internal pull-up 100Kohm) DP for USB1.1 PHY DN for USB1.1 PHY Crystal input Crystal output Power for I/O and PHY, 3.3V 5V power for digital circuit Logic power for digital circuit, 1.8V Digital Ground for I/O and PHY, digital core. EEPROM enable pin active high LED driver No Connection No Connection Digital Ground for I/O and PHY, digital core. General purpose input pin Chip power up reset 4. Block Diagram PAC7301/PAC7302 is a USB PC Camera SOC with enhanced image quality and sensitivity, internal regulators, JPEG image compression, image processing schemed, control registers, on-chip SRAM for image data buffer and USB controller. All register parameters are set by USB interface. And the JPEG compressed image data is transmitted by USB 1.1 isochronous pipe. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 5 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 5. Function Description 5.1 Analog Data Path The sensor array is covered by Bayer pattern color filters and micro lens. After a programmable exposure time, the image is sampled first with CDS (Correlated Double Sampling) block to improve S/N ration and reduce fixed pattern noise. Three analog gain stages are implemented before signal transferred by the 10bit ADC. The front gain stage (FG) can be programmed to fit the saturation level of sensor to the full-range input of ADC. The programmable color gain stage (CG) is used to balance the luminance response difference between B/G/R. The global gain stage (GG) is programmed to adapt the gain to the image luminance. The fine gained signal will be digitized by the on-chip 10bit ADC. After the image data has been digitized, further alteration to the signal can be applied before the data is output. The gain stage can be set by digital register, please refer to the following equation to get the mapping gain. Front Gain = 2 + (n/4), n = 0, 1, 2, …7 Color Gain = (1 +m)/16, m= 0, 1, 2, …31 Global Gain = (1 +q)/16, q = 0, 1, 2, …31 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 6 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 6. Specifications Absolute Maximum Ratings Exceeding the Absolute Maximum Ratings shown below invalidates all AC and DC electrical specifications and may result in permanent device damage. Symbol Parameter Min Max Unit TSTG Ambient storage temperature -25 125 °C VDD DC supply voltage -0.5 5.5 V VIN DC input voltage 0.5 3.8 V VOUT DC output voltage -0.5 3.8 V ESD ESD Rating, Human Body model 2 kV Notes Recommend Operating Condition Symbol Min Typ. Max Unit Temperature Operation Range Stable Image -10 - 70 °C 0 - 50 °C VDD Power supply voltage 4.5 5.0 5.5 V FCLK System clock frequency - 12.0 - MHz TA Parameter Notes DC Electrical Characteristics (Typical values at 25°C, VDD =5.0V, FCLK=12.0MHz) Symbol Parameter Min. Typ. Max. Unit Notes Type: PWR IDD Operating Current - 35 - mA IDD Suspend Current - - 500 uA @30 frame/sec Type: IN & I/O, Reset VIH Input voltage HIGH 2 - VDDQ V VIL Input voltage LOW 0 - 0.8 V CIN Input capacitor - - 10 pF ILKG Input leakage current - - 1.0 uA Type: OUT & I/O VOH Output voltage HIGH Vddq-0.2 - - V CL= 10pf, RL=1.2kΩ VOL Output voltage LOW - - 0.2 V CL= 10pf, RL=1.2kΩ Sensor Characteristics (Light source: 3200K halogen lamp; 8bit resolutions) Symbol PRNU VSAT VDARK DSNU R G B Parameter Photo response non-uniformity Saturation output voltage Dark output voltage Dark signal non-uniformity Sensitivity (Red channel) Sensitivity (Green channel) Sensitivity (Blue channel) Min. Typ. Max. Unit Notes - 1.2 1 1.08m 0.001 1.19 1.2 0.85 - % V V/sec V V/((uw/cm2)*sec) V/((uw/cm2)*sec) V/((uw/cm2)*sec) All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 7 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 7. Package Information 7.1 .1 PAC7302PE(11.43X11.43) Pin Assignment and Optical Center Information 30 A 19 31 19 18 18 7 7 30 31 CHIP SENSOR 42 43 48 1 A 42 6 6 1 48 Note: Sensor Array Center = Package Center --TOP VIEW— All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 8 V1.4 Nov 2007 43 PixArt Imaging Inc. PAC7301/PAC7302 7.1.2 PAC7302PE(11.43X11.43) Package Outline Dimension All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 9 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 7.1.3 PAC7302PE(11.43X11.43) Recommend PCB Layout All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 10 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 7.2 PAC7302PM(9.0x9.0) Pin Assignment and Optical Center Information All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 11 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 12 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 7.3.1 CSP Pin Assignment and Optical Center Information 1962 1476 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 13 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 7.3.2.CSP Package Ball Matrix Table 1 A GPO1(PIN 1) B RSTN(PIN 7) 2 VDDADC33(PIN 2) MIC_N(PIN 3) GPI3(PIN 8) VSSA_AUDIO(PIN 9) MIC_P(PIN 10) C VSSQ (PIN 13) GPI1(PIN14) D EPR_DI(PIN 18) EPR_SK (PIN 19) E EPR_CS(PIN 24) LED(PIN 25) F EPR_EN(PIN 30) VSSQ(PIN 31) 3 4 5 6 VDDMIC28(PIN 4) VDDPGA33(PIN 5) VDDMA5_AUDIO(PIN 6) VDDMA5(PIN 11) VDDA33(PIN 12) VCOM(PIN 15) VDDAY(PIN 16) VDDAYM(PIN 17) EPR_DO (PIN 20) VDDA (PIN 21) KEY(PIN 22) VSSAY(PIN 23) VDDD (PIN 26) VDDQ (PIN 27) OSC_IN(PIN 28) VSSA(PIN 29) VDDMD5 (PIN32) OSC_OUT(PIN 33) DN(PIN 34) DP(PIN 35) All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 14 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 7.3.3 PAC7302LT Recommend PCB Layout All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 15 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 7.4.1 LGA Pin Assignment and Optical Center Information 1962 1476 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 16 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 7.4.2.LGA Package Ball Matrix Table 1 2 3 4 5 6 7 8 9 A GPO1(P1) VDDADC33(P2) VSSA_AUDIO(P3) MIC_N(P4) MIC_P(P5) VDDMIC28(P6) VCOM(P7) VDDPGA33(P8) VDDMA5(P9) B RSTN(P30) C GPI1(P29) VDDAY(P11) D VSSQ(P28) VDDAYM(P12) E NC(P27) VDDA(P13) VSSAY(P14) F NC(P26) G LED(P25) H EPR_EN(P24) VDDA33(P10) KEY(P15) VSSQ(P23) VDDD(P22) VDDMD5(P21) VDDQ(P20) OSC_OUT(P19) OSC_IN(P18) All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] DN(P17) DP(P16) 17 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 7.4.3 PAC7302LG Recommend PCB Layout All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 18 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 8. Reference Application Circuit 8.1 PLCC(11.43x11.43) Package (PAC7302PE) VDDQ VDDA 0 VDDQ R1 R28 R27 VDDAY 1k R2 1 100k LED-0603 C13 1uF C18 1uF VDDAY 300k D1 C1 VDDMIC28 7 RSTN NC 9 8 TEST2 10 GPI1 RSTN EPR_DO 12 11 EPR_DI 13 EPR_DO/TR3 VSSQ EPR_SK 14 EPE_DI/TR0 EPR_SK/TR2 17 2 LED EPR_CS 15 EPR_CS/TR1 LED 2.2k 1 + C32 C30 22uF VDDADC33 C31 10uF C2 2 X1 MIC_N 2.2uF R5 C4 48 MIC_P 47 VDDMIC28 R6 46 VCOM 10k 45 VDDPGA33 44 VDDMA5_AUD C10 C11 0.1uF_N.M. VDDMIC28 22uF MICROPHONE 10k 2.2uF R8 2.2k C15 0.1uF VDDMA5_AUD C16 10uF NC 43 42 TEST1 41 VDDMA5 VDDA33 VDDA33 39 VDDMA540 KEY 31 3 0.1uF_N.M. VDDPGA33 R3 R25 0 4 C6 0.1uF C7 10uF C22 0.1uF VDDMA5 C24 10uF + 27 NC R29 0 5 + R9 R10 VDDAY DP NC NC VSSQ DN VDDMA5_AUD DP 10uF + 30 VDDPGA33 DN VDDAY 38 29 VDDAYM DP VCOM VDDAYM37 28 VDDMIC28 OSC_IN VDDA DN MIC_P OSC_OUT VSSAY 27 36 OSC_IN 12MHz VDDQ 35 10pF 1M C5 PAC7301/7302PE VDDA R7 MIC_N VDDMD5 VSSA OSC_OUT 26 VSSA_AUDIO VDDD C28 6 + Y1 VDDADC33 34 VDDQ 25 GPO1 GPI3 KEY C3 NC VSSQ 0.1uF_N.M. VDDADC33 C26 5.1k AUD_EnH 33 VDDMD5 24 EPR_EN R26 + 22 VDDD 23 10pF 18 NC 21 GPO2 20 NC C25 1uF 10uF_N.M. + U3 L1 3.3uH VSSA DP L2 3.3uH VSSA_Audio VSSQ KEY L3 VDDA 27 C27 VDDQ 1.5K R11 VDDA33 10uF_N.M. + 19 GPI2 U2 32 0 or 3.3uH R19 C21 + VDDMA5 R22 0 - 0 or 3.3uH R18 0 + VDDMD5 R23 16 1uF VDD_5V 0 or 3.3uH VDDMA5_AUD R17 C8 1uF C12 0.1uF VDDMD5 C14 10uF VDDD L4 VDD_5V short VDD5V short R12 EPR_DO 1 2 3 4 5 10uF R13 10M HC4 HC3 MINI USB 5P 10K_N.M. 9 8 EPR_CS R15 R14 R15 PID 10K_N.M. EPR_SK 10K_N.M. EPR_DI CON1 R13 USBGND PAC7302 PID IO_TRAP Open Open Open Open 2620 Open Open Open Short . . . Short Open Open Open . . . Short Short Short Open 2621 Short Short Short Short 262F (Def ault) C17 C20 2628 C9 262E All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 1uF VDDQ 10uF_N.M. + R16 4.7nF/250V HC1 HC2 PID IO_TRAP R12 R14 6 7 USBGND C29 10K_N.M. + 0.1uF C19 + +5V + NC GND2 C23 19 V1.4 Nov 2007 1uF VDDAY M PixArt Imaging Inc. PAC7301/PAC7302 8.2 PLCC (9.0x9.0) Package (PAC7302PM) VDDQ VDDQ R1 R28 R2 1k R27 0 VDDA VDDAY 100k VDD_5V 0 or 3.3uH VDDMA5_AUD R17 VDDMIC28 RSTN 6 7 RSTN TEST2 8 GPI1 VSSQ EPR_DO 10 9 EPR_DI 11 EPR_DO EPR_SK 12 EPE_DI EPR_SK 13 2 LED EPR_CS 14 EPR_CS 15 + C32 0.1uF VDDMA5 C24 10uF 22uF VDDADC33 C2 2 X1 1 MIC_N 40 MIC_P 39 VDDMIC28 R6 38 VCOM 10k 37 VDDPGA33 36 VDDMA5_AUD 2.2uF R5 C4 10k C9 1uF VDDAY M MICROPHONE C13 1uF VDDAY C18 1uF 2.2uF R8 2.2k C21 TEST1 VDDMA5 2.2k 4 3 C22 R3 R25 0 35 VDDMA534 VDDA33 33 VDDA 5 VDDA33 10uF_N.M. C6 0.1uF C26 C7 10uF C28 0.1uF_N.M. VDDADC33 10uF + VDDAY 32 26 10uF + KEY VDDA33 VDDMA5_AUD VDDAY DP VDDAYM VDDPGA33 GPO2 DN VSSQ DP VCOM 27 0.1uF VDDMA5_AUD C16 + DN VDDMIC28 OSC_IN R9 R10 27 MIC_P OSC_OUT VDDAYM31 25 PAC7302PM VDDQ VDDA DP MIC_N VDDMD5 VSSAY 24 VSSA_AUDIO 30 DN 12MHz VDDADC33 VDDD 29 23 VSSD VSSA OSC_IN GPI3 AUD_EnH 28 OSC_OUT 22 LED GPI2 Y1 R7 R29 0 GPO1 KEY VDDQ 21 C15 5.1k EPR_EN 27 C3 R26 + VDDMD5 20 22uF - 18 VDDD 19 R22 0 + 17 1M C5 0.1uF_N.M. VDDMIC28 + 16 10pF C10 + 0 U2 10pF 1uF C11 R23 0 or 3.3uH R19 VDDMA5 C1 D1 0 or 3.3uH R18 VDDMD5 300k 1 LED-0603 C30 0.1uF_N.M. VDDPGA33 U3 L1 DP 3.3uH L2 3.3uH C31 10uF VSSQ VSSA + VDDQ 1.5K R11 KEY L4 L5 VDD_5V short R12 10K_N.M. R13 10K_N.M. EPR_DO 1 2 3 4 5 C19 + 10uF EPR_SK USBGND C29 R16 4.7nF/250V HC4 HC3 EPR_CS R15 10K_N.M. EPR_DI CON1 MINI USB 5P 10K_N.M. 9 8 USBGND PAC7302 PID IO_TRAP R13 R14 R15 Open Open Open Open C12 0.1uF VDDMD5 C14 10uF C17 1uF PID 2620 Open Open Open Short . . . Short Open Open Open . . . Short Short Short Open 2621 Short Short Short Short 262F (Def ault) VDDQ 2628 C20 10uF_N.M. 262E C25 1uF C27 20 V1.4 Nov 2007 VDDA 10uF_N.M. + All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] VDDD + 10M HC1 HC2 1uF + R14 6 7 C8 PID IO_TRAP R12 +5V + NC GND2 C23 0.1uF short PixArt Imaging Inc. PAC7301/PAC7302 8.3.1 CSP Package (PAC7301LT, no MIC) VDDQ 0 1uF C1 VDDA R2 0 VDDA33 12 C9 0.1uF L4 2 VDDADC33 3 4 MIC_N VDDPGA33 VDDMIC28 5 6 7 RSTN DN R6 27 DP R8 27 R18 0 VDDMA5_AUDIO VDDMA5 8 9 MIC_P VSSA_AUDIO 10 VDDMA5 11 GPI3 U1 L3 short R5 1.5K short A' B' L5 short C11 20p DP DN C12 20p 35 DP 34 DN OSC_OUT VSSQ 33 OSC_OUT C18 Y1 32 VDDMD5 VDDMD5 OSC_OUT OSC_IN 10pF 14 GPI1 EPR_CS/TR1 26 VDDD 25 LED VDDD LED OSC_IN VDDQ 28 OSC_IN 27 VDDQ C3 0.1uF VDDMA5 C4 10uF C6 1uF VDDAY M C7 1uF VDDAY C8 1uF VDDA33 C13 1uF VDDD C14 0.1uF VDDMD5 C15 10uF 2 EPR_CS 24 VSSAY 23 22 KEY KEY VDDA 21 VDDA EPR_DO/TR3 EPR_DO20 EPR_SK/TR2 VDDAY M EPR_DI/TR0 17 EPR_SK 19 VDDAY M VDDAY EPR_DI 18 16 29 + VDDAY 12MHz 30 VSSA VCOM 1M C5 31 VSSQ PAC7301LT EPR_EN 15 U3 D1 R19 KEY 1 LED-0603 VDD_5V R20 100k 0 or 3.3uH R10 VDDMA5 0 or 3.3uH R11 R12 10K_N.M. EPR_DO PID IO_TRAP 10K_N.M. R14 10K_N.M. EPR_SK EPR_CS R15 10K_N.M. EPR_DI PAC7301 PID IO_TRAP R13 R14 R15 PID Open Open Open Open 2620 Open Open Open Short . . . Short Open Open Open . . . Short Short Short Open 2621 Short Short Short Short 262F + R12 R13 1k VDDQ VDDMD5 (Def ault) C16 1uF VDDQ C17 1uF VDDA 2628 262E All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 0.1uF 1 2 3 4 5 HEADER 1X5 R7 13 JP1 A-A' (DN) and B-B'(DP) 路徑長度要相等且不要有交錯 10pF VDDA33 C10 USB5V DNC DPC 1 R17 VSSQ RSTN VDDAY R1 300k 3.3uH GPO1 L1 VSSA VDD_5V VDDQ 21 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 8.3.2 CSP Package (PAC7302LT) VDDQ 10pF C3 Y1 L1 3.3uH VSSA L2 3.3uH VSSQ VSSA_Audio OSC_OUT R7 OSC_IN 10pF R2 300k 12MHz 1M C5 1uF C1 VDDA33 12 L3 short 13 VDD5V R20 VDDMA5_AUD VDDPGA33 VDDMIC28 MIC_N VDDADC33 6 5 4 3 2 GPI1 1 34 DN 33 OSC_OUT 0.1uF VDDMA5_AUD C16 10uF C22 0.1uF VDDMA5 C24 10uF VDDMD5 EPR_CS/TR1 VDDD LED VDDAY M VDDQ 28 OSC_IN C13 1uF VDDAY 27 VDDQ C18 1uF 26 25 1uF C21 VDDD EPR_CS 24 VSSAY C26 2 23 KEY C9 29 OSC_IN C28 D1 0.1uF_N.M. VDDADC33 10uF LED-0603 KEY R26 100K 0 or 3.3uH VDDMA5_AUD R17 R3 0 or 3.3uH R19 X1 VDDQ VDDMA5 C2 C31 10uF + VDDMD5 0 or 3.3uH R18 0.1uF_N.M. VDDPGA33 R1 1k + C32 22uF C30 1 VDD_5V C8 1uF VDDD C12 0.1uF VDDMD5 C14 10uF + 2.2uF R5 C4 MIC_P R12 R6 10K_N.M. MICROPHONE 10k EPR_DO PID IO_TRAP R12 R13 2.2uF EPR_SK R14 10K_N.M. EPR_CS R15 R14 R15 PID 10K_N.M. R8 2.2k R13 + 10k VCOM 10K_N.M. 0.1uF Open Open Open Open 2620 Open Open Open Short . . . Short Open Open Open . . . Short Short Short Open 2621 (Def ault) C17 1uF C20 2628 10uF_N.M. C25 1uF Short Short Short Short 262F All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 10uF_N.M. + + PAC7302 PID IO_TRAP VDDA 262E C27 10uF VDDQ + EPR_DI C7 VDDA33 10uF_N.M. + U3 5.1k 2.2k C15 + 22 VDDAY M KEY 17 VDDA VDDAY M VDDAY 21 16 USBGND MIC_N DP 30 VSSA VDDA MINI USB 5P VDDAY VCOM EPR_DO/TR3 CON1 15 EPR_DO20 HC4 HC3 VCOM EPR_SK/TR2 HC1 HC2 22uF 31 VSSQ PAC7301/7302LT EPR_EN 9 8 35 32 VDDMD5 R23 C6 GPO1 VDDADC33 MIC_N VDDMIC28 RSTN 7 VSSQ VDDMIC28 10M OSC_OUT EPR_DI/TR0 R16 4.7nF/250V DN VDDA33 EPR_DI 18 6 7 USBGND C29 DP 1 2 3 4 5 10uF +5V + NC GND2 0.1uF C11 0 14 C19 + R25 0 + L4 short VDD_5V C23 8 9 DP EPR_SK 19 VDDQ 1.5K R11 VDDMA5 0.1uF_N.M. C10 VDDMIC28 + VDDMA5 11 MIC_P VDDPGA33 10 VDDMA5_AUDIO MIC_P GPI3 27 VSSA_AUDIO DP 27 VDDAY R24 + U1 R9 R10 RSTN R21 0 VSSQ DN VDDA 0 22 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 8.4 LGA Package (PAC7302LG) VDDQ VDDQ VDD_5V R2 R1 1k R28 300k C1 100k 0 or 3.3uH R18 VDDMA5 0 or 3.3uH R19 1uF 1 LED-0603 VDDMD5 D1 3.3uH L2 3.3uH R22 0 GPI1 RSTN 29 30 R26 RSTN GPI1 28 VSSQ 27 NC NC LED 25 U2 26 LED 2 VSSQ VDDMIC28 L1 VSSA 5.1k R3 0 GPO1 2 VDDADC33 X1 MIC_N 2.2uF R5 C4 5 MIC_P 6 VDDMIC28 R6 7 VCOM 10k 8 VDDPGA33 KEY DP 15 VSSQ KEY VDDA 0 0.1uF C7 10uF C8 1uF R27 VDDAY C9 1uF VDDAY M C13 1uF VDDAY C18 1uF + 27 DP 0.1uF_N.M. VDDMIC28 VDDD C11 22uF + KEY L3 short 2.2uF 2.2k C6 C10 VDD_5V MICROPHONE 10k R8 U3 VDDQ 1.5K R11 22uF C2 3 4 + C32 2.2k DP R9 R10 27 1 VDDMA5 16 VDDPGA33 DN VDDA33 DP VCOM OSC_IN VDDMA59 17 VDDMIC28 OSC_OUT VDDAY DN MIC_P VDDA33 10 18 12MHz 1M C5 DN 10pF OSC_IN VDDAY 11 R7 PAC7301/7302LG VDDQ VDDAYM OSC_OUT 19 MIC_N VDDA VDDQ 20 Y1 VSSA_AUDIO VDDMD5 13 C3 VDDD VDDAYM12 10pF VDDADC33 VDDA VDDD 22 VDDMD5 21 VSSD VSSA 23 GPO1 EPR_EnH 14 24 EPR_Enh + 0 - R4 L4 short 0.1uF VDDMD5 C14 10uF C21 VDDA33 10uF_N.M. + C12 1 2 3 4 5 10uF 9 8 CON1 C28 C20 C22 0.1uF VDDMA5 10uF C24 10uF 10uF_N.M. C30 C25 1uF VDDA C31 0.1uF_N.M. VDDPGA33 10uF + MINI USB 5P VDDQ 0.1uF_N.M. VDDADC33 + 10M HC4 HC3 1uF + R16 4.7nF/250V HC1 HC2 C17 + 6 7 USBGND C29 C26 +5V + NC GND2 0.1uF C19 + + C23 USBGND C27 10uF_N.M. + All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 23 V1.4 Nov 2007 PixArt Imaging Inc. PAC7301/PAC7302 9. Update History Version V0.1 V0.2 V0.3 V0.4 V0.5 V0.6 V0.7 V0.8 V0.9 V1.0 V1.1 V1.2 V1.3 V1.4 Update Creation, Preliminary 1st version Added circuit/package information for 2nd version Changed circuit/package information for 3rd version Modified some string for 4th version Modified CSP package LC type for 5th version Modified MIC circuit for 6th version Modified MIC circuit for 7th version and changed CSP package LT type Support PAC7302PE/PM/LT/LG package. Write the Specifications TBD value LGA GPO1 replace GPI3, update PAC7301CS circuit GPO1/LED modified circuit for suspend, and update PAC7301/7302 circuit Update LGA/CSP package for marking code revision Modified reference circuit symbol. Added package sensor array dimension and update the newest package information. Only update reference circuit symbol. Date 11/24/2006 12/07/2006 12/25/2006 12/26/2006 12/26/2006 01/23/2007 01/29/2007 04/09/2007 05/02/2007 05/18/2007 06/29/2007 08/22/2007 08/28/2007 11/01/2007 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: [email protected] 24 V1.4 Nov 2007