PCS3P7303A General Purpose Peak EMI Reduction IC General Features locks on to it delivering a 1x modulated clock output. PCS3P7303A has a Frequency Selection (FS) control that facilitates selecting one of the two frequency ranges within the operating frequency range. Refer to the Frequency Selection Table for details. • 1x, LVCMOS Peak EMI Reduction • Input frequency: 10MHz - 70MHz @ 2.5V 10MHz - 80MHz @ 3.3V • Output frequency: PCS3P7303A has an SSEXTR pin to select different deviations depending upon the value of an external resistor connected between SSEXTR and GND. Modulation Rate (MR) control selects two different Modulation Rates. 10MHz - 70MHz @ 2.5V 10MHz - 80MHz @ 3.3V • Analog Deviation Selection • ModRate selection option PCS3P7303A operates from a 3.3V/2.5V supply and is available in an 8-pin TSSOP and 8L 2mmX2mm WDFN packages. • Supply Voltage: 2.5V ± 0.2V 3.3V ± 0.3V • 8-pin TSSOP, 8L 2mmX2mm WDFN(TDFN) Packages Application • The First True Drop-in Solution PCS3P7303A is targeted for many applications including USB and SATA. Functional Description PCS3P7303A is a versatile, 3.3V/2.5V Peak EMI reduction IC based on Timing-Safe™ technology. PCS3P7303A accepts an input clock either from a Crystal or from an external reference (AC or DC coupled to XIN / CLKIN) and Block Diagram FS MR VDD XIN / CLKIN XOUT Crystal Oscillator GND ©2010 SCILLC. All rights reserved. JANUARY 2010 – Rev. 2 PLL ModOUT SSEXTR Publication Order Number: PCS3P7303/D PCS3P7303A Pin Configuration XIN / CLKIN 1 8 VDD 7 SSEXTR FS 3 6 MR GND 4 5 ModOUT XOUT 2 PCS3P7303A Pin Description Pin # Pin Name Pin Type 1 XIN / CLKIN I 2 XOUT O Description Crystal connection or External reference clock input. Crystal connection. If using an external reference, this pin should be left open. 3 FS I Frequency Select. Pull LOW to select Low Frequency range. Selects High Frequency range when pulled HIGH. Has an internal pull-up resistor. (See Frequency Selection table for details.) 4 GND P Ground. 5 ModOUT O 6 MR I Buffered Modulated clock output. Modulation Rate Select. When LOW selects Low Modulation Rate. Selects High Modulation Rate when pulled HIGH. Has an internal pull-down resistor. 7 SSEXTR I Analog Deviation Selection through external resistor to GND. 8 VDD P 2.5V / 3.3V supply Voltage. Frequency Selection Table VDD (V) FS Frequency (MHz) 0 10-35 1 30-70 0 10-40 1 30-80 2.5 3.3 Rev. 2 | Page 2 of 10 | www.onsemi.com PCS3P7303A Absolute Maximum Rating Symbol VDD, VIN TSTG Rating Unit Voltage on any input pin with respect to Ground Parameter -0.5 to +4.6 V Storage temperature -65 to +125 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C TDV Static Discharge Voltage (As per JEDEC STD22- A114-B) 2 KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions Parameter VDD Description Supply Voltage Min Max Unit 2.3 3.6 V 0 TA Operating Temperature (Ambient Temperature) 70 °C CL Load Capacitance 10 pF CIN Input Capacitance 7 pF DC Electrical Characteristics for 2.5V Parameter VDD Description Test Conditions Supply Voltage Min Typ Max Unit 2.3 2.5 2.7 V 0.7 V VIL Input LOW Voltage VIH Input HIGH Voltage IIL Input LOW Current VIN = 0V -50 µA IIH Input HIGH Current VIN = VDD 50 µA VOL Output LOW Voltage IOL = 8mA 0.6 V VOH Output HIGH Voltage IOH = -8mA ICC Static Supply Current XIN / CLKIN pulled low IDD Dynamic Supply Current Unloaded Output Zo Output Impedance 1.7 V 1.8 V 500 FS=0; @ 10MHz 5 FS=1; @ 70MHz 12 45 Rev. 2 | Page 3 of 10 | www.onsemi.com µA mA Ω PCS3P7303A Switching Characteristics for 2.5V Parameter 1 Test Conditions Min Typ Max Input Frequency / FS=0 10 35 ModoUT FS=1 30 70 Measured at VDD /2 45 Duty Cycle 2, 3 Output Rise Time Output Fall Time 2, 3 2,3 55 % Measured between 20% to 80% 1.75 2.5 nS Measured between 80% to 20% 1.0 1.6 nS 10MHz ±450 ±600 35MHz ±125 ±250 30MHz ±225 ±350 70MHz ±150 ±300 3 Unloaded output PLL Lock Time Notes: 3 MHz 50 FS=0 Cycle-to-Cycle Jitter Unit FS=1 Stable power supply, valid clock presented on XIN / CLKIN pS 3 mS 1. Functionality with Crystal is guaranteed by design and characterization. Not 100% tested in production. 2. All parameters are specified with 10pF loaded outputs. 3. Parameter is guaranteed by design and characterization. Not 100% tested in production. DC Electrical Characteristics for 3.3V Parameter VDD Description Test Conditions Supply Voltage VIL Input LOW Voltage VIH Input HIGH Voltage IIL Input LOW Current VIN = 0V IIH Min Typ Max Unit 3.0 3.3 3.6 V 0.8 V 2.0 V -50 µA Input HIGH Current VIN = VDD 50 µA VOL Output LOW Voltage IOL = 8mA 0.4 V VOH Output HIGH Voltage IOH = -8mA ICC Static Supply Current XIN / CLKIN pulled low IDD Dynamic Supply Current Unloaded Output Zo 2.4 V 700 FS=0; @ 10MHz 7 FS=1; @ 80MHz 20 Output Impedance 35 Rev. 2 | Page 4 of 10 | www.onsemi.com µA mA Ω PCS3P7303A Switching Characteristics for 3.3V Parameter 1 Input Frequency / ModOUT Duty Cycle 2, 3 Output Rise Time Output Fall Time 2, 3 2, 3 Test Conditions 3 Notes: 3 Max 10 40 FS=1 30 80 Measured at VDD /2 45 Unit MHz 50 55 % Measured between 20% to 80% 1.3 2 nS Measured between 80% to 20% 0.9 1.3 nS 10MHz ±450 ±600 40MHz ±125 ±250 30MHz ±225 ±350 80MHz ±125 ±250 Unloaded output FS=1 PLL Lock Time Typ FS=0 FS=0 Cycle-to-Cycle Jitter Min Stable power supply, valid clock presented on XIN / CLKIN 3 1. Functionality with Crystal is guaranteed by design and characterization. Not 100% tested in production. 2. All parameters are specified with10pF loaded outputs. 3. Parameter is guaranteed by design and characterization. Not 100% tested in production. Typical Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency 25MHz Frequency tolerance ±50ppm or better at 25°C Operating temperature range -25°C to +85°C Storage temperature -40°C to +85°C Load capacitance(CP) 18pF Shunt capacitance 7pF maximum ESR 25 Ω Note: CL is the Load Capacitance and R1 is used to prevent oscillations at overtone frequency of the Fundamental frequency. Typical Crystal Interface Circuit PCS3P7303A R XOUT XIN / CLKIN Crystal CL R1 CL CL = 2*(CP – CS), Where CP = Load capacitance of crystal from crystal vendor datasheet. CS = Stray capacitance due to CIN, PCB, Trace, etc. Rev. 2 | Page 5 of 10 | www.onsemi.com pS mS PCS3P7303A Switching Waveforms Duty Cycle Timing t1 t2 VDD/2 VDD/2 VDD/2 OUTPUT Output Rise/Fall Time 80% 80% 20% 20% OUTPUT t3 t4 Application Schematic Noise Reduction Filter VDD R CLKIN VDD 1 XIN/CLKIN 2 XOUT C 0.1uF VDD 8 External Deviation Control SSEXTR 7 0Ω VDD 3 FS MR 0Ω 4 GND 6 ModOUT 5 0Ω 0Ω Note: FS (Pin#3) MR (Pin#6): Connect to VDD or GND Refer to Pin Description table for Functionality details. Note: For AC Coupled Interface refer to Application Brief: CT100801. Rev. 2 | Page 6 of 10 | www.onsemi.com R Analog Deviation Control SSEXTR can be Pulled HIGH to turn OFF Deviation. PCS3P7303A Charts Deviation Vs Resistance (FS=0, MR=0) 2.00 Deviation Vs Resistance (FS=0, MR=1) 2.00 12M 27M 33M 1.75 1.50 Deviation(±% ) 1.50 Deviation(±% ) 12M 27M 33M 1.75 1.25 1.00 0.75 1.25 1.00 0.75 0.50 0.50 0.25 0.25 0.00 0.00 0 20 40 60 80 100 120 140 160 180 200 220 240 0 20 40 60 Resistance (KΩ) Resistance (KΩ) Deviation Vs Resistance (FS=1, MR=0) 2.00 Deviation Vs Resistance (FS=1, MR=1) 2.00 33M 40M 50M 1.75 33M 40M 50M 1.75 1.50 1.50 Deviation(±% ) Deviation(±% ) 80 100 120 140 160 180 200 220 240 1.25 1.00 0.75 1.25 1.00 0.75 0.50 0.50 0.25 0.25 0.00 0.00 0 20 40 60 80 100 120 140 160 180 200 220 240 0 20 40 Resistance (KΩ) 60 80 100 120 140 160 180 200 220 240 Resistance (KΩ) Note: Device to Device variation of Deviation is ±10%. Rev. 2 | Page 7 of 10 | www.onsemi.com PCS3P7303A Package Information 8-lead TSSOP Package (4.40-MM Body) H E D A2 A θ e C A1 L B Dimensions Symbol Inches Min A Millimeters Max Min 0.043 Max 1.10 A1 0.002 0.006 0.05 0.15 A2 0.033 0.037 0.85 0.95 B 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.028 θ 0° 8° 0.50 0.70 0° 8° Rev. 2 | Page 8 of 10 | www.onsemi.com PCS3P7303A 8L 2mmX2mm WDFN package Outline drawing Dimensions Symbol A A3 b D Inches Millimeters Min Max Min Max 0.027 0.0315 0.70 0.80 0.008 BSC 0.008 0.012 0.203 BSC 0.20 0.079 BSC 0.30 2.00 BSC E 0.078 BSC 2.00 BSC e 0.020 BSC 0.50 BSC L 0.020 0.024 0.50 Rev. 2 | Page 9 of 10 | www.onsemi.com 0.60 PCS3P7303A Ordering Code Part Number Marking Package Temperature PCS3P7303AG-08TR BKL 8-pin TSSOP, TAPE AND REEL, Green 0°C to +70°C PCS3P7303AG-08TT BKL 8-pin TSSOP, TUBE, Green 0°C t o +70°C PCS3P7303AG-08CR BK 8L WDFN (2mmX2mm), TAPE & REEL, Green 0°C to +70°C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Note: Many ON Semiconductor products are protected by issued patents or applications for patent. are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes ON Semiconductor and without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. U.S Patent Pending; Timing-Safe and Active Bead are trademarks of PulseCore Semiconductor, a wholly owned subsidiary of ON Semiconductor. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative