Design Specification PL2211 300mA Low Noise Dual LDO FEATURES DESCRIPTION The PL2211 is a dual CMOS low dropout linear regulator with ultra-low-noise output, very low dropout voltage and very low ground current. Guaranteed 300mA load/ LDO Ultra low output noise: 100µVRMS Low ground current: 200µA Very low dropout: 180mV @300mA Zero shutdown supply current TTL-logic-controlled independent enable input Thermal and current limit protections Low ESR capacitor compatibility to achieve Ultra low droop load transient response Ultra fast line transient response Tiny 10pin 3mm x 3mm MLF (10L-TDLMF ) package Fixed options 1.5V, 1.8V, 2.5V, 2.8V, 3.0V and 3.3V APPLICATIONS The PL2211 operates from a 2.5V to 5.5V input voltage range and delivers up to 300mA, with low dropout of 200 mV at 300mA. The other features of PL2211 include shortcircuit protection and thermal-shutdown protection. The PL2211 is designed especially for battery-powered portable devices. Its low noise feature makes PL2211 ideal for noise-sensitive personal communication applications. Other key application areas for PL2211 also include palmtop computers, PCMCIA cards and WLAN cards. The PL2211 has a special feature that if both EN pin is enabled simultaneously the output of LDO2 delays 20us from output of LDO1 which helps to minimize inrush startup current. Cellular and cordless phones Wireless LAN cards Palmtop computers Personal communication equipment The PL2211 is available in tiny 10pin 3mm x 3mm MLF (10L-TDLMF) package with fixed output voltage versions. TYPICAL APPLICATION Power IC Ltd. Version 1.0 -1- www.picsemi.com Mar 4, 2007 Design Specification PL2211 300mA Low Noise Dual LDO MARKING DIAGRAMS PIN CONFIGURATION ORDERING INFORMATION Part Number Output Voltage Marking Package PL2211 – 15VZ 1.5 DBAMW 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF 10L-TDLMF PL2211 – 15UZ 1.5 DBBMW PL2211 – 18VZ 1.8 DBCMW PL2211 – 18UZ 1.8 DBDMW PL2211 – 25VZ 2.5 DBEMW PL2211 – 25UZ 2.5 DBFMW PL2211 – 27VZ 2.7 DBGMW PL2211 – 27UZ 2.7 DBHMW PL2211 – 28VZ 2.8 DBIMW PL2211 – 28UZ 2.8 DBJMW PL2211 – 30VZ 3.0 DBKMW PL2211 – 30UZ 3.0 DBLMW PL2211 – 33VZ 3.3 DBMMW PL2211 – 33UZ 3.3 DBNMW Note 1: Contact the factory for other output voltages that are not in the above table PIN DESCRIPTIONS Name Pin NO. Type Function IN 1 Supply Supply voltage. 2.5V ~ 5.5V. EN1 2 Logic input 1 Enable/Shutdown. CMOS compatible input. Logic ‘H’ : enable, logic ‘L’ : shutdown. EN2 3 Logic input 2 Enable/Shutdown. CMOS compatible input. Logic ‘H’ : enable, logic ‘L’ : shutdown. BYP 4 Bypass GND 6 Ground OUT2 9 Analog output2 Regulator 2 Output. OUT1 10 Analog output1 Regulator 1 Output. Power IC Ltd. Version 1.0 Reference voltage bypass pin. Connect 0.01uF ≦ CBYP ≦ 0.1uF to GND to reduce output noise. May be left open. Ground pin -2- www.picsemi.com Mar 4, 2007 Design Specification PL2211 300mA Low Noise Dual LDO BLOCK DIAGRAM Power IC Ltd. Version 1.0 -3- www.picsemi.com Mar 4, 2007 Design Specification PL2211 300mA Low Noise Dual LDO ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VIN DC Supply Voltage at Pin 1 -0.3 to +6.0 V VEN Enable Input Voltage at Pin 2 and Pin 3 -0.3 to +6.0 V PD Continuous Power Dissipation Internally limited W TSTG Storage Temperature Range -65 to +150 ℃ RθJA Thermal Resistance, Junction-To-Air 235 ℃/W TJ,MAX Operating Junction Temperature -40 to +125 ℃ TL Lead Temperature (Soldering, 5sec) 260 ℃ ESD ESD Capability, HBM model 2 kV RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit VIN DC Supply Voltage at Pin 1 +2.5 to 5.5 V VEN Enable Input Voltage at Pin 2 and Pin 3 0 to VIN V TA Operating Ambient Temperature -40 to +85 ℃ ELECTRICAL CHARACTERISTICS (VIN=VOUT(NOMINAL)+1V or 2.5V (whichever is greater), VEN=VIN, CIN=COUT=1µF, IO=1mA, TA=25°C, unless otherwise noted.) Symbol Parameter VIN Supply Voltage ∆VOUT Output Voltage Accuracy IO = 1mA ( both regulator ) ∆Vload Load Regulation IO=1mA to 300mA ( both regulator ) Line Regulation VIN =VOUT(NOMINAL) +0.1V (or 2.5V, whichever dVOUT/( dVIN*VOUT(NOMINAL) )*100% is greater) to 5.5V, IO=1mA ( both regulator ) ∆Vl LINE VDP Dropout Voltage (Note 1) IO Maximum Output Current ILIM Current Limit/Output Current Test Conditions Min. Typ. Max. Unit 2.5 5.5 V -1.0 1.0 % 0.5 % 0.05 %/V mV ILOAD = 300mA ( both regulator ) 180 220 ILOAD = 100mA ( both regulator ) 80 100 Continuous 300 VIN-VOUT =1.3V ( regulator 1 ) 350 600 VIN-VOUT =1.3V ( regulator 2 ) 350 600 mV mA RMS mA IQ Standby Current VEN = 0V 0.02 1 µA IG Ground pin current ILOAD1 = ILOAD2 =1mA ( both regulator active) 200 300 µA PSRR PSRR Ripple Rejection, IOUT = 10mA, Output voltage noise f = 100Hz, Cout= 1µF, Cbyp=10nF 75 dB f = 10KHz, Cout= 1µF, Cbyp=10nF 70 dB 100 µVRMS COUT = 1µF, CBYP = 10nF, F = 10Hz to 100K Hz (Vp-p/2/√ 2) Thermal Shutdown Temperature 165 °C Thermal Shutdown Hysteresis 20 °C VIH Logic Input High Voltage (EN) ( both regulator ) VIL Logic Input Low Voltage (EN\) ( both regulator ) IEN Logic Input Current (SHDN\) ( both regulator ) 1.2 -1 V 0.4 V 1 µA Note 1: The Dropout Voltage is defined as VIN - VOUT, when VOUT is 2% below the value of VOUT measured for VIN=VOUT(nominal)+1V. Power IC Ltd. Version 1.0 -4- www.picsemi.com Mar 4, 2007 Design Specification PL2211 300mA Low Noise Dual LDO rising time is 35us typically at 300mA output current. Connect EN pin to IN pin for normal operation OPERATION DESCRIPTION The PL2211 are ultra-low-noise, low-dropout, lowquiescent current linear regulators designed for spacerestricted applications. These devices can supply loads up to 300mA. As shown in the Block Diagram, the PL2211 consists of a highly accurate band gap core, noise bypass circuit, error amplifier, P-channel pass transistor and an internal feedback voltage divider. The 1.0V band gap reference is connected to the error amplifier’s inverting input. The error amplifier compares this reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the pass transistor gate is pulled low. This allows more current to pass to the output and increases the output voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the output. The output voltage is feedback through an internal resistor voltage divider connected to the OUT pin. An external bypass capacitor connected to BYP reduces noise at the output. Additional blocks include a current limiter, over temperature protection, and shutdown logic. Internal P-Channel Pass Transistor The PL2211 feature a 1Ω (typ) P-channel MOSFET pass transistor. This provides several advantages over similar designs using a PNP pass transistor, including longer battery life. The P-channel MOSFET requires no base drive, which considerably reduces quiescent current. PNP-based regulators waste considerable current in dropout when the pass transistor saturates. They also use high base-drive current under heavy loads. The PL2211 does not suffer from these problems and consume only 200µA of quiescent current in light load. Under Voltage Lockout When the input supply goes too low (below 2.0V) the PL2211 produces an internal UVLO (under voltage lockout) signal that generates a fault signal and shuts down the chip. This mechanism protects the chip from producing false logic due to low input supply. Quick Charging Mode The PL2211 has a quick charge block to get the reference up very quickly by charging the BYP capacitor with very high current when the chip comes out of shut down. This quick charge block stops charging the BYP capacitor when the reference reaches 95% of its nominal value and then the chip switches out of quick charging mode to normal operating mode. Over Temperature Protection Over temperature protection limits total power dissipation in the PL2211. When the junction temperature exceeds Tj= +155°C, the thermal sensor signals the shutdown logic and turns off the pass transistor. The thermal sensor turns the pass transistor on again after the IC’s junction temperature drops by 15°C, resulting in a pulsed output during continuous thermaloverload conditions. Thermal-Overload protection is design to protect the PL2211 in the event of a fault condition. For continual operation, do not exceed the absolute maximum junction temperature rating of Tj = +150°C. Current Limit Operating Region and Power Dissipation The PL2211 includes a current limiter. It monitors the output current and controls the pass transistor’s gate voltage to limit the output current under 550mA (typ). The output can be shorted to ground for an indefinite amount of time without damaging the part. The PL2211 maximum power dissipation depends on 1) the thermal resistance of the case and circuit board, 2) the temperature difference between the die junction and ambient, and 3) the rate of airflow. The power dissipation across the device is: Enable Input P = Iout ( Vin – Vout ) The PL2211 features an active-high Enable input (EN) pin that allows on/off control of the regulator. The PL2211 bias current reduces to less than microampere of leakage current when it is shutdown. The Enable input is TTL/CMOS compatible threshold for simple logic interfacing. When EN is ‘H,’ the output voltage startup Power IC Ltd. Version 1.0 -5- The maximum power dissipation is: Pmax = (Tj – Ta) / (θjc + θca) Where (Tj – Ta) is the temperature difference between the PL2211 die junction and the ambient air; θjc is the thermal resistance of the package; and θca is the thermal www.picsemi.com Mar 4, 2007 Design Specification PL2211 300mA Low Noise Dual LDO resistance through the PC board, copper traces, and other materials to the surrounding air. The GND pin of the PL2211 performs the dual function of providing an electrical connection to ground and channeling heat away. Connect the GND pin to ground using a large pad or ground plane. When operating from sources other than batteries, improved supply-noise rejection and transient response can be achieved by increasing the values of the input and output bypass capacitors, and through passive filtering techniques. The Typical Characteristics show the PL2211 line and load transient responses. Dropout Voltage Noise Reduction For the PL2211, an external 0.01µF bypass capacitor between BYP and GND with innovative noise bypass scheme reduces output noises dramatically, exhibiting 100µVrms of output voltage noise with Cbyp = 0.01µF and Cout = 1µF. A regulator’s minimum dropout voltage determines the lowest usable supply voltage. In battery-powered systems, this determines the useful end-of-life battery voltage. Because the PL2211 use a P-channel MOSFET pass transistor, their dropout voltage is a function of drain-tosource on resistance (RDS(on)) multiplied by the load current (see the Typical Characteristics). APPLICATION INFORMATION Capacitor Selection and Regulator Stability Use a 1µF capacitor on the PL2211 input and a 1µF capacitor on the output. Large input capacitor values and lower ESRs provide better noise rejection and linetransient response. Reduce output noise and improve load-transient response, stability, and power-supply rejection by using large output capacitors. Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature. With dielectrics such as Z5U and Y5V, it may be necessary to use a 1µF or larger output capacitor to ensure stability at temperatures below -10°C. With X7R or X5R dielectrics, 1µF is sufficient at all operating temperatures. A graph of the region of stable Cout ESR vs. load current is shown in the Typical Characteristics. Use a 0.01µF bypass capacitor at BYP for low-output voltage noise. The leakage current going into the BYP pin should be less than 10nA. Noise, PSRR, and Transient Response The PL2211 are designed to deliver ultra-low noise and high PSRR, as well as low dropout and low quiescent currents in battery-powered systems. The PL2211 PSRR is 70dB at 100Hz and 60dB at 10kHz (see the PowerSupply Rejection Ratio vs. Frequency graph in the Typical Characteristic). Power IC Ltd. Version 1.0 -6- www.picsemi.com Mar 4, 2007 Design Specification PL2211 300mA Low Noise Dual LDO PACKAGE INFORMATION 5-pin SOT-25 Outline Dimension D Detail A b 4 E E1 5 1 e c 3 e1 1 L2 R R θ A A2 1 L θ A1 θ L1 1 Detail A Dimension: Symbol A A1 A2 b c D E E1 e e1 L L1 L2 R R1 θ ˚ θ 1˚ Power IC Ltd. Version 1.0 Millimeter Min. 0.90 0.30 0.08 0.30 Typ. 1.15 2.90 2.80 1.60 0.95 1.90 0.45 0.60 0.25 0.10 0.10 0˚ 5˚ 4˚ 10˚ -7- Max. 1.45 0.15 1.30 0.50 0.22 Inch Min. Typ. 0.036 0.011 0.003 0.60 0.020 0.25 0.004 0.004 8˚ 15˚ 0˚ 5˚ 0.045 0.114 0.110 0.063 0.037 0.075 0.018 0.024 0.010 Max. 0.057 0.006 0.051 0.020 0.009 0.024 0.010 4˚ 10˚ 8˚ 15˚ www.picsemi.com Mar 4, 2007 Design Specification PL2211 300mA Low Noise Dual LDO 3-PIN SOT-23 OUTLINE DIMENSION D Detail A b E E1 3 1 c 2 e1 1 R θ A A2 1 L2 R L A1 θ e L1 θ 1 Detail A Dimension: Symbol A A1 A2 b c D E E1 e e1 L L1 L2 R R1 θ ˚ θ 1˚ Power IC Ltd. Version 1.0 Millimeter Min. 0.90 0.30 0.08 0.30 Typ. 1.15 2.90 2.80 1.60 0.95 1.90 0.45 0.60 0.25 0.10 0.10 0˚ 5˚ 4˚ 10˚ -8- Max. 1.45 0.15 1.30 0.50 0.22 Inch Min. Typ. 0.036 0.011 0.003 0.60 0.020 0.25 0.004 0.004 8˚ 15˚ 0˚ 5˚ 0.045 0.114 0.110 0.063 0.037 0.075 0.018 0.024 0.010 Max. 0.057 0.006 0.051 0.020 0.009 0.024 0.010 4˚ 10˚ 8˚ 15˚ www.picsemi.com Mar 4, 2007 Design Specification PL2211 300mA Low Noise Dual LDO DISCLAIMERS LIFE SUPPORT Power IC’s products are not designed to be used as components in devices intended to support or sustain human life. Use of Power IC’s products in components intended for surgical implant into the body, or other applications in which failure of Power IC’s products could create a situation where personal death or injury may occur, is not authorized without the express written approval of Power IC’s Chief Executive Officer. Power IC will not be held liable for any damages or claims resulting from the use of its products in medical applications. MILITARY Power IC's products are not designed for use in military applications. Use of Power IC’s products in military applications is not authorized without the express written approval of Power IC’s Chief Executive Officer. Power IC will not be held liable for any damages or claims resulting from the use of its products in military applications. RIGHT TO MAKE CHANGES Power IC reserves the right to change this document and/or this product without notice. Customers are advised to consult their Power IC sales representative before ordering. Power IC Ltd. Version 1.0 -9- www.picsemi.com Mar 4, 2007