Preliminary Datasheet R2J20655BNP R07DS0548EJ0101 (Previous No.: R07DS0540EJ0100) Rev.1.01 Sep 30, 2011 Integrated Driver - MOS FET (DrMOS) Description The R2J20655BNP multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver in a single QFN package. The on and off timing of the power MOS FET is optimized by the built-in driver, making this device suitable for large-current buck converters. The chip also incorporates a high-side bootstrap switch, eliminating the need for an external SBD for this purpose. Features Based on Intel 6 6 DrMOS Specification. Built-in power MOS FET suitable for Desktop, Server application. Low-side MOS FET with built-in SBD for lower loss and reduced ringing. Built-in driver circuit which matches the power MOS FET Built-in tri-state input function which can support a number of PWM controllers High-frequency operation (above 1 MHz) possible VIN operating-voltage range: 27 Vmax Large average output current (Max.35 A) Achieve low power dissipation Controllable driver: Remote on/off Support Mid-Voltage PWM signal to enter zero current detection Double thermal protection: Thermal Warning & Thermal Shutdown Built-in bootstrapping Switch Small package: QFN40 (6 mm 6 mm 0.95 mm) Pb-free/Halogen-Free Outline Integrated Driver-MOS FET (DrMOS) QFN40 package 6 mm × 6 mm VCIN Reg5V BOOT GH VIN 1 10 11 40 THWN Driver Pad High-side MOS Pad DISBL# VSWH MOS FET Driver LSDBL# Low-side MOS Pad PWM 31 CGND GL PGND 20 30 21 (Bottom view) R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 Page 1 of 16 R2J20655BNP Preliminary Block Diagram Driver Chip VCIN THWN THWN Reg5V UVL THDN BOOT GH Boot SW VIN Reg5V DISBL# High Side MOS FET 2 μA Supervisor CGND Level Shifter 20 k CGND Reg5V 160 k LSDBL# Overlap Protection. & Logic 3 state signal Low Side MOS FET Reg5V Reg5V PWM VSWH Zero Current Det. Input Logic (TTL Level) (3 state in) 35 k 3 state signal PGND CGND GL Notes: 1. Truth table for the DISBL# pin DISBL# Input Driver Chip Status "L" Shutdown (GL, GH = "L") "Open" Shutdown (GL, GH = "L") "H" Enable (GL, GH = "Active") 2. Truth table for the LSDBL# pin & PWM pin LSDBL# PWM Input Input GL Status "L" * "L" "L" or "H" "Continuous "Open" or "H" Conduction Mode" "Open" or "Mid" 3. Output signal from the UVL block UVL output Logic Level 4. Output signal from the THWN block For active "H" For shutdown "L" VCIN VL "Zero Current Detection" Mode VH "H" Thermal Warning Logic Level "L" Normal operating Thermal Warning TIC(°C) TwarnL TwarnH 5. Truth table for the THDN block Driver IC Temp. Driver Chip Status < 150°C Enable (GL, GH = "Active") > 150°C Shutdown (GL, GH = "L") (latch-off) R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 Page 2 of 16 R2J20655BNP Preliminary VIN 11 VIN 12 VIN 13 VIN VIN VIN VSWH GH CGND BOOT VCIN Reg5V LSDBL# Pin Arrangement 10 9 8 7 6 5 4 3 2 1 40 PWM 39 DISBL# 38 THWN VIN 14 37 CGND VSWH 15 36 GL PGND 16 35 VSWH PGND 17 34 VSWH PGND 18 33 VSWH PGND 19 32 VSWH PGND 20 31 VSWH VIN CGND VSWH VSWH PGND VSWH PGND PGND PGND PGND PGND PGND PGND 21 22 23 24 25 26 27 28 29 30 (Top view) Note: All die-pads (three pads in total) should be soldered to PCB. Pin Description Pin Name LSDBL# Reg5V VCIN BOOT CGND GH VIN VSWH PGND GL THWN DISBL# Pin No. 1 2 3 4 5, 37, Pad 6 8 to 14, Pad 7, 15, 29 to 35, Pad 16 to 28 36 38 39 Description Low-side gate disable +5 V logic power supply output Control input voltage Bootstrap voltage pin Control signal ground High-side gate signal Input voltage Phase output/Switch output Power ground Low-side gate signal Thermal warning Signal disable PWM 40 PWM drive logic input R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 Remarks When asserted "L" signal, Low-side gate disable Driver Vcc input To be supplied +5 V through internal switch Should be connected to PGND externally Pin for monitor Pin for monitor Thermal warning when over 115°C Disabled when DISBL# is "L". This Pin is pulled low when internal IC over the thermal shutdown level, 150°C. 5 V logic input Page 3 of 16 R2J20655BNP Preliminary Absolute Maximum Ratings (Ta = 25°C) Item Power dissipation Supply voltage PWM voltage Symbol Pt(25) Pt(110) Iout VIN(DC) VIN(AC) VSWH(DC) VSWH(AC) VBOOT(DC) VBOOT(AC) VCIN Vpwm Other I/O voltage Reg5V voltage Reg5V current THWN/THDN current Vdisbl, Vlsdbl Vreg5V Ireg5V Ithwn, Idisbl Operating junction temperature Storage temperature Tj-opr Tstg Average output current Input voltage Switch node voltage BOOT voltage Notes: 1. 2. 3. 4. 5. 6. 7. 8. Rating 25 8 35 –0.3 to +27 30 27 30 32 36 –0.3 to +27 Units W A V V V V V –0.3 to +5.5 @UVL OFF –0.3 to +0.3 @UVL ON –0.3 to Reg5V + 0.3 –0.3 to VCIN + 0.3 –0.3 to +6 –20 to +0.1 0 to 1.0 V V mA mA –40 to +150 –55 to +150 °C °C Note 1 2 2, 4, 6 2 2, 4, 6 2 2, 4, 6 2 2, 4 2, 5 2, 7, 8 2 2, 7 3 3 Pt(25) represents a PCB temperature of 25°C, and Pt(110) represents 110C. Rated voltages are relative to voltages on the CGND and PGND pins. For rated current, (+) indicates inflow to the chip and (–) indicates outflow. This rating is when UVL (Under Voltage Lock out) is ineffective (normal operation mode). This rating is when UVL (Under Voltage Lock out) is effective (lock out mode). The specification values indicated "AC" are limited within 10 ns. This rating is when the external power-source is applied to Reg5V pin. Reg5V + 0.3 V < 6 V Safe Operating Area Average Output Current (A) 45 40 35 30 25 20 VOUT = 1.3 V VIN = 12 V VCIN = 5 V L = 0.45 μH Fsw = 1 MHz 15 10 5 0 R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 0 25 50 75 100 125 PCB Temperature (°C) 150 175 Page 4 of 16 R2J20655BNP Preliminary Recommended Operating Condition Item Input voltage Symbol VIN Rating 4.5 to 22 Units V Supply voltage & Drive voltage VCIN 4.5 to 5.5 or 8 to 22 V Note When the usage of VCIN = 4.5 V to 5.5 V, VCIN should be connected to Reg5V (Refer to "Pin Connection") Electrical Characteristics (Ta = 25°C, VCIN = 12 V, VSWH = 0 V, unless otherwise specified) Supply PWM input DISBL# input LSDBL# input Thermal warning Thermal shutdown 5V regulator Note: Item VCIN start threshold VCIN shutdown threshold UVLO hysteresis VCIN operating current Symbol VH VL dUVL ICIN Min 7.0 6.6 — — Typ 7.4 7.0 0.4 49 Max 7.8 7.4 — — Units V V V mA VCIN disable current ICIN-DISBL — — 1.2 mA PWM input high level VH-PWM 4.1 — — V PWM input low level PWM input resistance VL-PWM RIN-PWM — 3.5 — 7.5 0.8 15 V k PWM input tri-state range Enable level Disable level Input current VIN-tri VENBL VDISBL IDISBL THDN on resistance Low-side activation level Low-side disable level RTHDN * VLSDBLH VLSDBLL Input current Warning temperature Temperature hysteresis THWN on resistance ILSDBL TTHWN *1 THYS *1 RTHWN *1 THWN leakage current Shutdown temperature ILEAK 1 Tstdn * 1.4 2.0 — — 0.2 2.0 — –52 100 — 0.2 — 130 — — — 2.0 0.5 — — –26 115 15 0.5 — 150 3.3 — 0.8 5.0 1.0 — 0.8 –12 130 — 1.0 1.0 — V V V A k V V A °C °C k A °C Output voltage Line regulation Vreg Vreg-line 4.95 –10 5.2 0 5.45 10 V mV VCIN = 12 V to 16 V Load regulation Vreg-load –10 0 10 mV Ireg = 0 to 10 mA 1 Test Conditions VH – VL fPWM = 1 MHz, Ton_pwm = 120 ns DISBL# = 0 V, PWM = LSDBL# = Open 5.0 V PWM interface 4V – 1V IPWM(VPWM=4V) – IPWM(VPWM=1V) 5.0 V PWM interface DISBL# = 1 V DISBL# = 0.2 V LSDBL# = 1 V Driver IC temperature THWN = 0.2 V THWN = 5 V Driver IC temperature 1. Reference values for design. Not 100% tested in production. R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 Page 5 of 16 R2J20655BNP Preliminary Typical Application (1) Desktop/Server Application +12 V VCIN BOOT VIN THWN DISBL# Reg5V VSWH PWM PGND R2J20655BNP CGND LSDBL# GH +5 V VCIN GL BOOT THWN VIN DISBL# Reg5V VSWH PWM PGND R2J20655BNP CGND LSDBL# GH GL PWM1 PWM Control Circuit +1.3 V PWM2 PWM3 PWM4 VCIN BOOT THWN VIN DISBL# Reg5V VSWH PWM PGND Power GND Signal GND R2J20655BNP CGND LSDBL# GH VCIN GL BOOT THWN VIN DISBL# Reg5V VSWH PWM PGND R2J20655BNP CGND LSDBL# GH R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 GL Page 6 of 16 R2J20655BNP Preliminary Typical Application (cont.) (2) Notebook Application +19 V +5 V VCIN BOOT THWN VIN DISBL# Reg5V VSWH PWM PGND R2J20655BNP CGND LSDBL# GH VCIN GL BOOT THWN VIN DISBL# Reg5V VSWH PWM PGND R2J20655BNP CGND LSDBL# GH GL PWM1 PWM Control Circuit +1.1 V PWM2 PWM3 VCIN BOOT VIN THWN DISBL# Reg5V VSWH PWM PGND Power GND Signal GND R2J20655BNP CGND LSDBL# GH R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 GL Page 7 of 16 R2J20655BNP Preliminary Pin Connection (1) Single 12 V Application 0.1 μF 0 to 10 Ω 1.0 μF VIN 7 6 5 4 3 2 1 BOOT VCIN Reg5V LSDBL# 11 VIN PAD 12 13 PGND CGND PAD 14 VIN PWM 40 PWM INPUT DISBL# 39 Thermal Shutdown THWN 38 CGND 37 R2J20655BNP 15 VSWH 16 PGND 18 26 27 VSWH 25 PGND 31 24 VCIN 33 20 23 10 kΩ 34 32 22 VCIN VSWH 35 19 21 10 kΩ GL 36 VSWH PAD 17 Power GND CGND 8 CGND 9 GH 10 Low Side Disable Signal INPUT VIN 10 μF × 4 1.0 μF VSWH 12 V CGND 28 29 30 Thermal Warning 0.45 μH Signal GND Vout PGND PGND (2) VCIN 5 V Application 0.1 μF 1.0 μF 0 to 10 Ω 8 7 6 5 4 3 2 CGND BOOT VCIN Reg5V 9 GH 10 VIN 10 μF × 4 11 VIN PAD 12 13 PGND Low Side Disable Signal INPUT VSWH 12 V CGND PAD 14 VIN R2J20655BNP 16 PGND PWM INPUT Thermal Shutdown THWN 38 18 26 27 VSWH 25 PGND 31 24 5V 33 20 23 10 kΩ 34 32 22 5V VSWH 35 19 21 10 kΩ GL 36 VSWH PAD 17 Signal GND PWM 40 DISBL# 39 CGND 37 15 VSWH Power GND CGND 1 5.0 V External Power Supply LSDBL# VIN 28 29 30 Thermal Warning 0.45 μH Vout PGND R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 PGND Page 8 of 16 R2J20655BNP Preliminary Test Circuit Vinput A IIN V VIN Vcont A ICIN VCIN V VCIN BOOT DISBL# VIN R2J20655BNP Reg5V VSWH LSDBL# 5 V pulse PWM CGND Note: PIN = IIN × VIN + ICIN × VCIN POUT = IO × VO Efficiency = POUT / PIN PLOSS(DrMOS) = PIN – POUT Ta = 27°C R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 PGND GH Electric load IO GL Average Output Voltage Averaging V VO circuit Page 9 of 16 R2J20655BNP Preliminary Typical Data Power Loss vs. Output Current Power Loss vs. Input Voltage 9 1.7 VCIN = Reg5V = 5 V VIN = 12 V 8 VCIN = Reg5V = 5 V 1.6 VOUT = 1.3 V fPWM = 600 kHz VOUT = 1.3 V Normalized Power Loss @ VIN = 12 V Power Loss (W) 7 fPWM = 600 kHz L = 0.45 μH 6 5 4 3 2 1 0 1.5 L = 0.45 μH IOUT = 25 A 1.4 1.3 1.2 1.1 1.0 0.9 0 5 10 15 20 25 30 0.8 35 4 6 8 Output Current (A) 12 14 16 18 20 22 Input Voltage (V) Power Loss vs. Switching Frequency Power Loss vs. Output Voltage 1.7 1.7 VIN = 12 V VIN = 12 V 1.6 VCIN = Reg5V = 5 V 1.6 VCIN = Reg5V = 5 V VOUT = 1.3 V 1.5 L = 0.45 μH IOUT = 25 A 1.4 1.3 1.2 1.1 1.0 Normalized Power Loss @ fPWM = 600 kHz fPWM = 600 kHz Normalized Power Loss @ VOUT = 1.3 V 10 1.5 L = 0.45 μH IOUT = 25 A 1.4 1.3 1.2 1.1 1.0 0.9 0.9 0.8 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 0.8 250 Output Voltage (V) R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 500 750 1000 1250 Switching Frequency (kHz) Page 10 of 16 R2J20655BNP Preliminary Typical Data (cont.) Power Loss vs. Output Inductance Power Loss vs. VCIN 1.7 1.7 VIN = 12 V VIN = 12 V 1.6 VCIN = Reg5V = 5 V 1.6 VOUT = 1.3 V fPWM = 600 kHz Normalized Power Loss @ VCIN = Reg5V = 5 V Normalized Power Loss @ L = 0.45 μH VOUT = 1.3 V 1.5 fPWM = 600 kHz IOUT = 25 A 1.4 1.3 1.2 1.1 1.0 1.5 L = 0.45 μH IOUT = 25 A 1.4 1.3 1.2 1.1 1.0 0.9 0.9 0.8 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0.8 4.5 Output Inductance (μH) 5.0 5.5 6.0 VCIN = Reg5V (V) Average ICIN vs. Switching Frequency 70 Average ICIN (mA) 60 VIN = 12 V VCIN = Reg5V = 5 V VOUT = 1.3 V L = 0.45 μH IOUT = 0 A 50 40 30 20 10 250 500 750 1000 1250 Switching Frequency (kHz) R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 Page 11 of 16 R2J20655BNP Preliminary Description of Operation The DrMOS multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver in a single QFN package. Since the parasitic inductance between each chip is extremely small, the module is highly suitable for use in buck converters to be operated at high frequencies. The control timing between the high-side MOS FET, lowside MOS FET, and driver is optimized so that high efficiency can be obtained at low output-voltage. VCIN & DISBL# The VCIN pin is connected to the UVL (under-voltage lockout) module, so that the built-in 5 V regulator is disabled as long as VCIN is 7.4 V or less. On cancellation of UVL, the built-in 5 V regulator remains enabled until the UVL input is driven to 7.0 V or less. The built-in 5 V regulator is a series regulator with temperature compensation. A ceramic capacitor with a value of 0.1 F or more must be connected between the CGND plane and the Reg5V pin. The output of 5 V regulator is monitored by the internal Supervisor circuits. When the Supervisor detects this output is more than 4.3 V (typ.), the driver state becomes active (figure 1.1). Supervisor circuit has hysteresis and its shutdown level of Supervisor is 3.8 V (typ.). Figure 1.2 shows the application when the external 5 V regulator is used. When the Reg5V pin is applied into external 5 V, the Supervisor can activate the driver. In this application usage, VCIN should be connected to Reg5V. The signal on pin DISBL# also enables or disables the circuit. When UVL disables the circuit , the built-in 5 V regulator does not operate, but when the signal on DISBL# disables the circuit, only output-pulse generation is terminated, and the 5 V regulator is not disabled. Voltages from –0.3 V to VCIN+0.3 V can be applied to the DISBL# pin, so on/off control by a logic IC or the use of a resistor, etc., to pull the DISBL# line up to VCIN are both possible. VCIN L H H H DISBL# L H Open REG5V 0 Active Active Active 12 V Driver State Disable (GL, GH = L) Disable (GL, GH = L) Active Disable (GL, GH = L) VCIN > 7.4 V VCIN VCIN 5V IN Reg5V UVL & 5 V Regulator To Internal Logic OUT OUT IN UVL & 5 V Regulator Reg5V External 5 V To Internal Logic Supervisor Figure 1.1 Typical 12 V Input Application (Activate Built-in 5 V Regulator) R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 Supervisor Figure 1.2 External 5 V Application Page 12 of 16 R2J20655BNP Preliminary PWM & LSDBL# The PWM pin is the signal input pin for the driver chip. When the PWM input is high, the gate of the high-side MOS FET (GH) is high and the gate of the low-side MOS FET (GL) is low. When the PWM input becomes middle voltage or high impedance, Zero Current Detection (ZCD) function works. Figure 2 shows the operation diagram of PWM input and inductor current (IL). PWM L H Middle or Open GH L H L L GL H L H L PWM IL * * >0 0 3.3V 1.4V IL GH GL Figure 2 ZCD Operation Diagram The equivalent circuit for the PWM-pin input is shown in the next figure. PWM SW is in the ON state during normal operation; if DISBL#-pin input is Low or Open State, the PWM SW is turned off. Reg5V DISBL# signal 18.5k PWM Pin Input Logic PWM SW Tri-state detection signal To internal control 12.5k Figure 3 Equivalent Circuit for the PWM-pin Input R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 Page 13 of 16 R2J20655BNP Preliminary The LSDBL# pin is the Low Side Gate Disable pin for "Discontinuous Conduction Mode (DCM)" when LSDBL# is low. This pin is internally pulled up to Reg5V with 160 k resistor. When low side disable function is not used, keep this pin open or pulled up to VCIN. Truth Table for the LSDBL# pin & PWM pin LSDBL# Input "L" "Open" or "H" R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 PWM Input * "L" or "H" "Open" or "Mid" GL Status "L" "Continuous Conduction Mode" "Zero Current Detection" Mode Page 14 of 16 R2J20655BNP Preliminary THWN & THDN This device has two level thermal detection, one is thermal warning and the other is thermal shutdown function. This Thermal Warning feature is the indication of the high temperature status. THWN is an open drain logic output signal and need to connect a pull-up resistor (ex.51 k) to THWN for Systems with the thermal warning implementation. When the chip temperature of the internal driver IC becomes over 115°C, Thermal warning function operates. This signal is only indication for the system controller and does not disable DrMOS operation. When thermal warning function is not used, keep this pin open. "H" THWN output Logic Level "L" Thermal warning Normal operating 100 TIC (°C) 115 Figure 4 THWN Trigger Temperature THDN is an internal thermal shutdown signal when driver IC becomes over 150°C. This function makes High Side MOS FET and Low Side MOS FET turn off for the device protection from abnormal high temperature situation and at the same time DISBL# pin is pulled low internally to give notice to the system controller. Once thermal shutdown function operates, driver IC keeps DISBL# pin pulled low until VCIN becomes under UVL level (or under supervisor shutdown level). Figure 5 shows the example of two types of DISBL# connection with the system controller signal. Driver IC Temp. < 150°C > 150°C Driver Chip Status Enable (GL, GH = "Active") Shutdown (GL, GH = "L") 5V To Internal Logic 10 k DISBL# 10 k DISBL# 2 μA To shutdown signal To Internal Logic 2 μA Thermal Shutdown Detection Figure 5.1 THDN Signal to the System Controller ON/OFF signal Thermal Shutdown Detection Figure 5.2 ON/OFF Signal from the System Controller MOS FET The MOS FETs incorporated in R2J20655BNP are highly suitable for synchronous-rectification buck conversion. For the high-side MOS FET, the drain is connected to the VIN pin and the source is connected to the VSWH pin. For the low-side MOS FET, the drain is connected to the VSWH pin and the source is connected to the PGND pin. R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 Page 15 of 16 R2J20655BNP Preliminary Package Dimensions JEITA Package Code P-HVQFN40-p-0606-0.50 RENESAS Code PVQN0040KE-A Previous Code — MASS[Typ.] — .1 39 ) B HE E B 1pin 40 40 2.2 C0.3 1.95 E /2 INDEX 1.95 4-C0.50 1pin 2.2 (0 D /2 2.2 4- HD/2 0.2 0.2 HD D A 0.7 0.2 Reference Symbol 2.05 X4 f S AB b x 20° S AB L1 S c2 y1 S A A2 0.69 20° 2.05 ZD e t S AB Lp A1 X4 ZE 1.95 2.2 HE/2 CAV No. Die No. 1.95 2-A section y S Dimension in Millimeters Min Nom Max D 5.95 6.00 6.05 5.95 6.00 6.05 E A2 0.87 0.89 0.91 f — — 0.20 A 0.865 0.91 0.95 A1 0.005 0.02 0.04 b 0.17 0.22 0.27 b1 0.16 0.20 0.24 — 0.50 — e Lp 0.40 0.50 0.60 x — — 0.05 y — — 0.05 y1 — — 0.20 t — — 0.20 HD 6.15 6.20 6.25 HE 6.15 6.20 6.25 ZD — 0.75 — ZE — 0.75 — L1 0.06 0.10 0.14 c1 0.17 0.20 0.23 c2 0.17 0.22 0.27 Ordering Information Part Name R2J20655BNP#G0 R07DS0548EJ0101 Rev.1.01 Sep 30, 2011 Quantity 2500 pcs Shipping Container Taping Reel Page 16 of 16 Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. 3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. 4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 5. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. 6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics 7. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc. "Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; safety equipment; and medical equipment not specifically designed for life support. "Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life. 8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges. 9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. 12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries. (Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics. http://www.renesas.com SALES OFFICES Refer to "http://www.renesas.com/" for the latest and detailed information. Renesas Electronics America Inc. 2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A. Tel: +1-408-588-6000, Fax: +1-408-588-6130 Renesas Electronics Canada Limited 1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada Tel: +1-905-898-5441, Fax: +1-905-898-3220 Renesas Electronics Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K Tel: +44-1628-585-100, Fax: +44-1628-585-900 Renesas Electronics Europe GmbH Arcadiastrasse 10, 40472 Düsseldorf, Germany Tel: +49-211-65030, Fax: +49-211-6503-1327 Renesas Electronics (China) Co., Ltd. 7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China Tel: +86-10-8235-1155, Fax: +86-10-8235-7679 Renesas Electronics (Shanghai) Co., Ltd. Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898 Renesas Electronics Hong Kong Limited Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong Tel: +852-2886-9318, Fax: +852 2886-9022/9044 Renesas Electronics Taiwan Co., Ltd. 13F, No. 363, Fu Shing North Road, Taipei, Taiwan Tel: +886-2-8175-9600, Fax: +886 2-8175-9670 Renesas Electronics Singapore Pte. Ltd. 1 harbourFront Avenue, #06-10, keppel Bay Tower, Singapore 098632 Tel: +65-6213-0200, Fax: +65-6278-8001 Renesas Electronics Malaysia Sdn.Bhd. Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: +60-3-7955-9390, Fax: +60-3-7955-9510 Renesas Electronics Korea Co., Ltd. 11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea Tel: +82-2-558-3737, Fax: +82-2-558-5141 © 2011 Renesas Electronics Corporation. All rights reserved. Colophon 1.1