Features • • • • • • • Low Quiescent Current, Low Drop Out Voltage Regulator 2.5V Fixed Output Voltage 3V to 5.5V Supply Operation 5 mA Maximum Load Current Power-down Mode Consumption Less Than 1 µA 0.35 µm CMOS Technology Typical Application: Real Time Clock (RTC), Backup Battery Supply in Mobile Terminals • Maximum Current Consumption 10 µA Description RE031 is a Low Drop Out (LDO) voltage regulator macrocell with a fixed 2.5V output voltage, rated for loads up to 5 mA. It is designed to be integrated with other analog cells, digital logic, microcontrollers, DSP cores and memory blocks into system-onchip products. The circuit consists of a PMOS pass device, an error amplifier and a feedback resistive network, sized to achieve the required closed loop gain. These blocks make up the regulating loop. An internal reference voltage (bandgap voltage) has been included. The target reference voltage is 1.2V, with a tolerance of 4%, delivered by an external trimming code. Current reference is generated inside the cell through a circuit supplied by VBAT. The remote sense terminal, VSAUVS, provides regulation at the load, by connecting it together with the output terminal, V SAUV,, near a critical point to improve the regulation performance (e.g., connecting them at the package pin by double bonding thus avoiding the bonding resistance influence). A capacitor of 2.2 µF connected from VSAUV to ground is needed as external compensation. Figure 1. Symbol(1) trimbg20[9:0] vbat2a BG020 Embedded ASIC Macrocell: Power Management for Mobile Terminals (PM) RE031 Fixed 2.5V 5 mA Low Quiescent Current LDO Voltage Regulator rst vsauv vbg20 vsauvs vsauvc Note: gnd2 1. Pin names are written as they appear on the user screen when the symbol is opened in the design tool environment. Rev. 2707B–PMGMT–03/03 1 Functional Diagram Figure 2. Functional Diagram VBAT2A TRIMBG20[9:0] BANDGAP and IBIAS Iref Pass Device Vref VSAUVC VSAUV RST GND2 GND2 VSAUVS VBG20 R1 R2 GND2 Pin Description Pin Name I/O Type Function Value VBAT2A Power supply External pad Power supply 3V to 5.5V VSAUV Analog output External pad Output voltage 2.4V to 2.6V VSAUVS Analog input External pad Sense voltage 2.4V to 2.6V VSAUVC Analog output Internal pin Output voltage 2.4V to 2.6V GND2 Ground Internal pin Ground 0 Digital bus Internal pin Bandgap Reference Trimming 0 to VSAUV RST Digital output Internal pin POR signal 0 to VSAUV VBG20 Analog output Internal pin Voltage reference 1.231V TRIMBG20 2 RE031 2.5V 5 mA LDO Voltage Regulator 2707B–PMGMT–03/03 RE031 2.5V 5 mA LDO Voltage Regulator Absolute Maximum Ratings* VIN .......................................................... -0.3V to 6.5V *NOTICE: Digital Signals......................................... -0.3V to 5.5V Output Current..................................Internally Limited Junction Temperature ..........................-20°C to 150°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Specifications(1) TA = -20°C to +85°C, supply voltage = 3V to 5.5V unless otherwise specified, output capacitance = 2.2 µF. Table 1. Electrical Characteristics Symbol Parameter VSAUVC Condition Min Typ Max Unit Auxiliary Operating Supply Voltage 2.4 2.5 2.6 V VSAUV Output Voltage 2.4 2.5 2.6 V ISAUV Output Current 5 mA IQQ Quiescent Current 10 µA ∆VDC Line Regulation ISAUV = 5 mA 12 mV ∆VTRAN Transient Line Regulation ISAUV = 5 mA rise time = fall time = 5 µs 37 mV ∆VDC Load Regulation 10% - 90% of max ISAUV 10 mV ∆VTRAN Transient Load Regulation 10% - 90% of max ISAUV rise time = fall time = 5 µs 5 mV @100 Hz -55 dB @1 kHz -35 dB @20 kHz -12 dB @100 kHz -12 dB @100 Hz -50 dB @1 kHz -35 dB @20 kHz -13 dB @100 kHz -13 dB @100 Hz -40 dB @1 kHz -35 dB @20 kHz -13 dB @100 kHz -10 dB 1051 µ VRMS VBAT = 3V Power Supply Rejection Ratio at Full Load PSRR VBAT = 4.25V VBAT = 5.5V VN Output Noise ISD Shut Down Current Note: Bandwidth = 10 Hz to 100 kHz; output current = 5 mA 1 µA 1. Obtained by considering the parasitics of a TFBGA100 Package. 3 2707B–PMGMT–03/03 Control Modes Trimming The bandgap inside RE031 has trimming capability, i.e., it is possible to compensate the bandgap resistance variations due to process gradients through the TRIMBG20[9:0] signal. In order to reduce the sensitivity of the bandgap voltage to resistance varitions, the trimming has been designed to compensate up to ±40% of resistance variations. Table 2. Truth Table Application Example Resistance Variation TRIMBG20[9:0] +35% to +40% 1001000000 +20% to +35% 0101000000 +5% to +25% 0011000000 -5% to +5% 0000000000 -15% to -5% 0001100000 -22.5% to -15% 0001010000 -27.5% to -22.5% 0001001000 -32.5% to -27.5% 0001000100 -35% to -32.5% 0001000010 -37.5% to -35% 0001000001 -40% to -37.5% 0001000000 A ceramic capacitor of 2.2 µF with ESR between 20 mΩ and 250 mΩ connected from VSAUV to ground is needed for external compensation. Description Min Typ Max Units Capacitor (CL) 1.8 2.2 2.6 µF Figure 3. Application Example Internal Voltage Reference VBAT2A Battery Pack TRIMBG20[9:0] Digital Core RST VSAUV VBG20 VSAUVC VSAUVS CL GND2 4 RE031 2.5V 5 mA LDO Voltage Regulator 2707B–PMGMT–03/03 RE031 2.5V 5 mA LDO Voltage Regulator Typical Performance Characteristics (Conditions specified on page 7.) S ta tic L o a d R e g u la tio n Static Line Regulation at Full Load V BA T= 3V V BA T= 5,5V Battery Voltage [V] T ra n s ie n t L o a d R e g u la tio n O u tp u t V o lta g e C h a n g e [m V ] Output Voltage Change [mV] IL [m A ] Transient Line Regulation at Full Load V BA T= 4,25V V BA T= 5,5V V BA T= 3V V BA T= 4,25V O u tp u tV o lta g e C h a n g e [m V ] Output Voltage Change [mV] Time [ms] T im e [m s] 5 2707B–PMGMT–03/03 Typical Performance Characteristics (Conditions specified on page 7.) P o w e r S u p p ly R e je c tio n R a tio a t F u ll L o a d P o w e r S u p p ly R e je c tio n R a tio a t F u ll L o a d V e rs u s B a tte ry V o lta g e in L o w P o w e r M o d e 3.0 3.5 4.0 4.5 5.0 5.5 0 V B AT= 5,5V V B AT= 4,25V -10 P S R R [d B ] P S R R [d B ] -20 -30 -40 freq= 1K Hz -60 B a tte ry V o lta g e [V ] F re q [H z ] L D O S ta rtu p a t F u ll L o a d fo r V b a t = 4 .2 5 V in L o w O u tp u t N o is e S p e c tru m a t F u ll L o a d a n d P ow er M ode V b a t=4 .2 5 V 1.0E -08 V B AT2 A µ # $ O u tp u t N o ise [V ^ 2/H z ] V o lta g e [V ] freq= 100K Hz freq= 100Hz -50 V B AT= 3V freq= 20K Hz V S AU V 1.0E -09 1.0E -10 1.0E -11 1.0E -12 1.0E -13 1.0E -14 10 100 1000 10000 100000 F re q [H z ] T im e [µs] 6 RE031 2.5V 5 mA LDO Voltage Regulator 2707B–PMGMT–03/03 RE031 2.5V 5 mA LDO Voltage Regulator Terminology Line Regulation Measures the maximum transient and DC variations of the output voltage of the LDO when the supply changes between two specified values with fixed load current; minimum rise time and fall time is 5 µs. Figure 4. Line Regulation 3.4V VBAT2A 3V 5 µs 5 µs VSAUV ∆VTRAN ∆VDC Load Regulation Measures the maximum transient and DC variations of the output voltage of the LDO when the load current changes between two specified values with fixed power supply; minimum rise time and fall time is 5 µs. Figure 5. Load Regulation 5 µs 5 µs 90% of max ISAUV ISAUV 10% of max ISAUV VSAUV ∆VTRAN ∆VDC 7 2707B–PMGMT–03/03 Atmel Headquarters Atmel Operations Corporate Headquarters Memory 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 487-2600 Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland TEL (41) 26-426-5555 FAX (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL (852) 2721-9778 FAX (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL (81) 3-3523-3551 FAX (81) 3-3523-7581 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany TEL (49) 71-31-67-0 FAX (49) 71-31-67-2340 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France TEL (33) 2-40-18-18-18 FAX (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France TEL (33) 4-76-58-30-00 FAX (33) 4-76-58-34-80 Zone Industrielle 13106 Rousset Cedex, France TEL (33) 4-42-53-60-00 FAX (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland TEL (44) 1355-803-000 FAX (44) 1355-242-743 e-mail [email protected] Web Site http://www.atmel.com © Atmel Corporation 2003. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ATMEL ®, the Atmel logo and combinations thereof are registered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Printed on recycled paper. 2707B–PMGMT–03/03 0M