RFMD RF2617

RF2617
10
3V CDMA/FM RECEIVE AGC AMPLIFIER
Typical Applications
• 3V CDMA/FM Cellular Systems
• General Purpose Linear IF Amplifier
• Supports Dual-Mode AMPS/CDMA
• Commercial and Consumer Systems
• Supports Dual-Mode TACS/CDMA
• Portable Battery Powered Equipment
Product Description
Si Bi-CMOS
GaAs HBT
GaAs MESFET
SiGe HBT
Si CMOS
0.0098
0.0040
0.012
0.008
0.196
0.189
0.025
0.0688
0.0532
0.2440
0.2284
8° MAX
0°MIN
0.050
0.016
0.0098
0.0075
NOTES:
1. Shaded lead is Pin 1.
2. All dimensions are excluding mold flash.
3. Lead coplanarity - 0.005 with respect to datum "A".
Optimum Technology Matching® Applied
üSi BJT
-A-
0.157
0.150
10
Package Style: SSOP-16
Features
IF AMPLIERS
The RF2617 is a complete AGC amplifier designed for
the receive section of 3V dual-mode CDMA/FM cellular
applications. It is designed to amplify IF signals while providing more than 90dB of gain control range. Noise Figure, IP3, and other specifications are designed to be
compatible with the IS-95 Interim Standard for CDMA cellular communications. This circuit is designed as part of
the RFMD CDMA Chip Set, consisting of a Transmit IF
AGC Amp, a Transmit Upconverter, a Receive LNA/Mixer,
and this Receive IF AGC Amp. The IC is manufactured on
an advanced high frequency Silicon Bipolar process, and
is packaged in a standard miniature 16-lead plastic SSOP
package.
• Supports Dual Mode Operation
GAIN
CONTROL
16 GC
• -48dB to +48dB Gain Control Range
15 VCC
• Single 3V Power Supply
14 VCC
• Digitally Selectable Inputs
FM+ 4
13 VCC
• -2dBm Input IP3
FM- 5
12 GND
GND 6
11 GND
CDMA+ 1
CDMA- 2
GND 3
IN
SEL.
IN SELECT 7
10 OUT+
NC 8
9 OUT-
Functional Block Diagram
Rev B4 010717
• 12MHz to 285MHz Operation
Ordering Information
RF2617
RF2617 PCBA
3V CDMA/FM Receive AGC Amplifier
Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
10-17
RF2617
Absolute Maximum Ratings
Parameter
Supply Voltage
Control Voltage
Input RF Power
Operating Ambient Temperature
Storage Temperature
Parameter
Value
Unit
-0.5 to +7.0
-0.5 to +5.0
+10
-40 to +85
-40 to +150
VDC
VDC
dBm
°C
°C
Specification
Min.
Typ.
Max.
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Unit
T=25°C, 85MHz, VCC =3.0V, ZS =500 Ω,
ZL =500Ω, 500Ω External CDMA Input Terminating Resistor, 500Ω External Output
Terminating Resistor (Effective ZS =333Ω,
Effective ZL =250Ω) (See application schematic).
Overall
Frequency Range
CDMA Maximum Gain
CDMA Minimum Gain
FM Maximum Gain
FM Minimum Gain
Gain Slope
Gain Control Voltage Range
Gain Control Input Impedance
Noise Figure
Input IP3
IF AMPLIERS
10
Stability (Max VSWR)
Condition
+45
+45
-44
-4
10:1
12 to 285
+48
-48
+49
-48
57
0 to 3
30
5
-40
-2
-45
-45
8
MHz
dB
dB
dB
dB
dB/V
VDC
kΩ
dB
dBm
dBm
VGC =2.4V
VGC =0.3V
VGC =2.4V
VGC =0.3V
Measured in 0.5V increments
Source impedance of 4.7kΩ
At maximum gain and 85MHz
At +40dB gain, referenced to 500Ω
At minimum gain, referenced to 500Ω
Spurious<-70dBm
IF Input
Input Impedance
Input Impedance
CDMA to FM Isolation
1
850
30
kΩ
Ω
dB
CDMA, differential
FM, single-ended
Power Supply
Voltage
Current Consumption
Current Consumption
10-18
2.7 to 3.3
13
14
15
16
V
mA
mA
Minimum gain, VCC =3.0V
Maximum gain, VCC =3.0V
Rev B4 010717
RF2617
Function
CDMA+
2
3
CDMAGND
4
FM+
5
6
7
FMGND
IN SELECT
8
NC
9
OUT-
10
11
12
13
OUT+
GND
GND
VCC
14
15
16
VCC
VCC
GC
Description
CDMA balanced input pin. This pin is internally DC-biased and should
be DC-blocked if connected to a device with a DC level other than VCC
present. A DC to connection to VCC is acceptable. For single-ended
input operation, one pin is used as an input and the other CDMA input
is AC-coupled to ground. The balanced input impedance is 1kΩ, while
the single-ended input impedance is 500Ω.
Same as pin 2, except complementary input.
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
FM balanced input pin. This pin is internally DC-biased and should be
DC-blocked if connected to a device with DC present. For single-ended
input operation, one pin is used as an input and the other FM input is
AC-coupled to ground. The balanced input impedance is 1.7kΩ, while
the single-ended input impedance is 850Ω.
Same as pin 4, except complementary input.
Interface Schematic
BIAS
700 Ω
700 Ω
CDMA+
CDMA-
See pin 1.
BIAS
650 Ω
650 Ω
FM+
FM-
See pin 4.
Same as pin 3.
Selects which IF input (CDMA or FM) is used. This is a digitally controlled input. A logic "high" selects the CDMA input amplifier. A logic
"low" selects the FM input amplifier. The threshold voltage is approximately 1.3V.
No connection pin. This pin is internally biased and should not be connected to any external circuitry, including ground or VCC.
20 kΩ
IN SELECT
Balanced output pin. This is an open-collector output, designed to
operate into a 250Ω balanced load. The load sets the operating impedOUT+
ance, but an external choke or matching inductor to VCC must also be
supplied in order to correctly bias this output. This bias inductor is typically incorporated in the matching network between the output and next
stage. Because this pin is biased to VCC, a DC-blocking capacitor must
be used if the next stage’s input has a DC path to ground.
Same as pin 9, except complementary output.
See pin 9.
OUT-
10
IF AMPLIERS
Pin
1
Same as pin 3.
Same as pin 3.
Supply Voltage pin. External bypassing is required. The trace length
between the pin and the bypass capacitors should be minimized. The
ground side of the bypass capacitors should connect immediately to
ground plane.
Same as pin 13.
Same as pin 13.
Analog gain adjustment for all amplifiers. Valid control ranges are from
0V to 3.0V. Maximum gain is selected with 3.0V. Minimum gain is
selected with 0V. These voltages are only valid for a 4.7kΩ DC source
impedance.
VCC
12.7 kΩ
23.5 kΩ
15 kΩ
Rev B4 010717
10-19
RF2617
Application Schematic
Measurement
Reference Plane
ZS=500 Ω
Z S, EFF=333 Ω
CDMA IF Filter
CDMA+
R1
1 kΩ
CDMA-
GAIN
CONTROL
1
FM IF Filter
Z IN=1 kΩ
3
Z IN=850 Ω
FM IN
GC
15
2
Z IN, EFF=500 Ω
4.7 kΩ
16
IN
SEL.
10 nF
14
10 nF
4
13
5
12
6
11
7
10
NC 8
9
10 nF
ZS=850 Ω
IF IN
SELECT
ZLOAD,EFF=250 Ω
VCC
C1
L1
C2
ZLOAD=500 Ω
OUT+
R2
500 Ω
C2
C2
OUT-
C1
L1
VCC
Measurement
Reference Plane
R1 sets the CDMA balanced input impedance. The effective input impedance is then 500 Ω.
R2 sets the balanced output impedance to 500 Ω. L1 and C2 serve dual purposes. L1 serves
as an output bias choke, and C2 serves as a series DC block. In addition, the values of L1
and C2 may be chosen to form an impedance matching network of the load impedance is not
500 Ω. Otherwise, the values of L1 and C1 are chosen to form a parallel-resonant tank circuit
at the IF when the load impedance is 500 Ω.
ZOUT=500 Ω
IF AMPLIERS
10
10 nF
10-20
Rev B4 010717
RF2617
Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
L2
390 nH
J1
CDMA
50 Ω µstrip
L1
390 nH
C1
10 nF
T1
C3
15 pF
C2
10 nF
R1
1 kΩ
GAIN
CONTROL
1
C4
15 pF
J2
FM
L3
330 nH
3
C5
10 nF
C7
10 nF
P2-1
C8
10 nF
P1
P1-1
P1-3
GC
2
GND
3
VCC
P2-1
NC
1
SELECT
2
GND
2617400-
IN
SEL.
P1-1
C14
10 nF
P1-3
14
4
13
5
12
6
11
7
10
8
P2
1
15
2
C6
10 pF
50 Ω µstrip
R3
4.7 kΩ
16
9
C13
10 nF
C12
15 pF
T2
R2
500 Ω
C11
15 pF
L4
390 nH
L5
390 nH
C9
10 nF
C10
10 nF
50 Ω µstrip
J3
OUT
P1-3
3
IF AMPLIERS
10
Rev B4 010717
10-21
RF2617
Evaluation Board Layout
IF AMPLIERS
10
10-22
Rev B4 010717
RF2617
Gain versus Gain Control Voltage
Gain versus Gain Control Voltage
(VCC=2.7 V, 85 MHz)
(VCC=3.0 V, 85 MHz)
60.0
50.0
50.0
40.0
40.0
30.0
30.0
20.0
20.0
10.0
10.0
Gain (dB)
Gain (dB)
60.0
0.0
-10.0
-20.0
0.0
-10.0
-20.0
-30.0
-30.0
-30 C
-40.0
-40.0
-30 C
-50.0
+25 C
+25 C
-50.0
+80 C
+80 C
-60.0
-60.0
0.0
0.5
1.0
1.5
2.0
2.5
0.0
0.5
1.0
GC (V)
2.0
2.5
Input IP3 versus Gain
Gain versus Gain Control Voltage
(VCC=3.3 V, 85 MHz)
60.0
1.5
GC (V)
(VCC=2.7 V, 85 MHz)
10.0
-30 C
50.0
+25 C
0.0
40.0
+80 C
30.0
-10.0
IIP3 (dBm)
Gain (dB)
20.0
10.0
0.0
-10.0
-20.0
-30.0
10
-20.0
-40.0
-40.0
-30 C
-50.0
+25 C
-50.0
+80 C
-60.0
0.0
0.5
1.0
1.5
2.0
-60.0
-60.0
2.5
-40.0
-20.0
GC (V)
Input IP3 versus Gain
20.0
40.0
(VCC=3.3 V, 85 MHz)
10.0
-30 C
-30 C
+25 C
+25 C
0.0
0.0
+80 C
+80 C
-10.0
IIP3 (dBm)
IIP3 (dBm)
-10.0
-20.0
-30.0
-20.0
-30.0
-40.0
-40.0
-50.0
-50.0
-60.0
-60.0
60.0
Input IP3 versus Gain
(VCC=3.0 V, 85 MHz)
10.0
0.0
Gain (dBm)
-40.0
-20.0
0.0
Gain (dBm)
Rev B4 010717
20.0
40.0
60.0
-60.0
-60.0
-40.0
-20.0
0.0
20.0
40.0
60.0
Gain (dBm)
10-23
IF AMPLIERS
-30.0
RF2617
Output IP3 versus Gain
Output IP3 versus Gain
(VCC=2.7 V, 85 MHz)
(VCC=3.0 V, 85 MHz)
10.0
0.0
0.0
-10.0
-10.0
OIP3 (dBm)
OIP3 (dBm)
10.0
-20.0
-30.0
-40.0
-20.0
-30.0
-40.0
-30 C
-50.0
-30 C
-50.0
+25 C
+25 C
+80 C
-60.0
-60.0
-40.0
-20.0
0.0
20.0
40.0
+80 C
-60.0
-60.0
60.0
-40.0
-20.0
Gain (dBm)
Output IP3 versus Gain
20.0
40.0
60.0
Noise Figure versus Gain
(VCC=3.3 V, 85 MHz)
10.0
0.0
Gain (dBm)
(VCC=2.7 V, 85 MHz)
60.0
-30 C
+25 C
0.0
50.0
+80 C
-10.0
10
-20.0
NF (dB)
OIP3 (dBm)
40.0
-30.0
30.0
20.0
IF AMPLIERS
-40.0
-30 C
-50.0
10.0
+25 C
+80 C
-60.0
-60.0
-40.0
-20.0
0.0
20.0
40.0
0.0
-60.0
60.0
-40.0
-20.0
Gain (dBm)
Noise Figure versus Gain
20.0
40.0
(VCC=3.3 V, 85 MHz)
60.0
-30 C
-30 C
+25 C
50.0
+25 C
50.0
+80 C
30.0
30.0
20.0
20.0
10.0
10.0
-40.0
-20.0
0.0
Gain (dB)
10-24
+80 C
40.0
NF (dB)
NF (dB)
40.0
0.0
-60.0
60.0
Noise Figure versus Gain
(VCC=3.0 V, 85 MHz)
60.0
0.0
Gain (dB)
20.0
40.0
60.0
0.0
-60.0
-40.0
-20.0
0.0
20.0
40.0
60.0
Gain (dB)
Rev B4 010717