ETC RT9174

RT9174
Preliminary
Triple Linear Regulator Controllers
General Description
Features
The RT9174 is a triple linear regulator controller
designed for motherboard application.
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Integrated Three Linear Controllers in a SOP-8
Package
Driving NPN or NMOSFET
Sourcing ( > 100mA) and Sinking ( > 5mA) Driver
Tri-State Output Driver
Low Internal 0.8V Reference
Adjustable Output Voltage Setting
High Output Stability
VDDQ 1.5/3.3V Automatic Changing for AGP
Wide 3V ~ 8V Input Voltage Range
Current Limiting and Thermal Protection
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The regulators are intended to regulate the
computer system AGP (2X/4X) power, the 2.5V
clock power, and the 1.8V power for North/South
Bridge core voltage and/or cache memory circuits.
All controllers can drive NPN or NMOSFET pass
transistor. A special scheme empoly driver voltage
could be higher than VDD when driving NMOSFET
through the 12V power.
The RT9174 future a small SOP-8 package for
saving board area. It also builds in current limiting
and thermal shutdown protection function.
Ordering Information
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Applications
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Mother Boards Power Supply
Graphic Cards
Pin Configurations
RT9174C S
Part Number
Package type
S : SOP-8
RT9174CS
(Plastic SOP-8)
Operating temperature range
C: Commercial standard
Pin Configurations
TOP VIEW
VDD 1
8
DRI3
DRI1 2
7
FB3
FB1 3
6
DRI2
5
FB2
GND
4
Function Block Diagram
OC
+
Thermal
Limit
VDD
_
+
+
DRI1
DRI2
_
OC
FB2
_
OC
+
+
_
FB1
DRI3
_
_
+
GND
0.8V
1.3V
FB3
Reference
DS9174-00 April 2001
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RT9174
Preliminary
Pin Description
Pin Name
Pin Function
VDD
Power Supply Input
DRI1
Regulator 1 Driver Output
FB1
Regulator 1 Feedback Non-inverting Input
GND
Ground
DRI2
Regulator 2 Driver Output
FB2
Regulator 2 Feedback Non-inverting Input
DRI3
Regulator 3 Driver Output
FB3
Regulator 3 Feedback Non-inverting Input
Typical Application Circuit
5V
C1
1µF
12V
C5
0.1µF
3.3V
R1
5K
1
3.3V
2
Q1
PHD45N03LT
V DDQ
1.5/ 3.3V
C2 +
1000µF
R2
4.3K
R3
4.99K
C6
10nF
VDD
DRI3
DRI1
FB3
7
3 FB1
DRI2
6
4 GND
FB2
5
D1
R6
424
Q2
2SD1802
RT9174
R4
250
R5
200
1N4148
3.3V
Q3
2SD1802
8
+
V O2
1.8V
C3
470µF
R7
200
+
V O3
2.5V
C4
470µF
#TYPEDET
R8
1K
VDDQ = 3.3V if FB1 >1.3V
#TYPEDET = 0V →VDDQ = 1.5V
#TYPEDET = Open →VDDQ = 3.3V
Fig 1. Triple LDOs with VDDQ for M/B Application
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DS9174-00 April 2001
RT9174
Preliminary
5V
C1
1µF
12V
R10
Q3
MMBT3904
1K
C5
0.1µF
R1
5K
1
3.3V
2
Q1
PHD45N03LT
4
1.5/ 3.3V
DRI3
DRI1
FB3
C6
10nF
R2
4.3K
GND
7
DRI2
6
FB2
5
2SD1802
V TT
R4
113
+
R5
200
R11
374
1N4148
3.3V
3.3V
Q2
RT9174
D1
R3
4.99K
C8
0.01µF
8
VDD
3 FB1
VDDQ
+
R9
1K
V TTPG
C3
470µF
R6
3K
C7
1µF
R12
8.2K
#TYPEDET
R8
1K
VTTSEL
Q4
2N7002
VDDQ = 3.3V if FB1 >1.3V
#TYPEDET = 0V →VDDQ = 1.5V
#TYPEDET = Open →VDDQ = 3.3V
VTTSEL = 0V →VTT = 1.25V
VTTSEL = 5V →VTT = 1.5V
Fig 2. Dual LDOs with VTTPG for VRM8.5 Application
12V
R9
1.2K
C5
0.1µF
7.5V
R1
5K
3.3V
C1
1µF
R8
3K
Q3
PHD45N03LT
V O3
1
5V
2
Q1
PHD45N03LT
V O1
3.3V
R2
624
C2 +
1000µF
R3
200
VDD
DRI3
DRI1
FB3
8
R6
424 +
7
3 FB1
DRI2
6
Q2
4 GND
FB2
5
PHD45N03LT V
O2
RT9174
R4
250
R5
200
R7
200
2.5V
C4
470µF
1.8V
+
C3
470µF
Fig 3. Triple LDOs Driving MOS Application
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RT9174
Preliminary
Absolute Maximum Ratings
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Input Voltage VDD
Feedback FB1/FB2/FB3
Driver DRI1/DRI2/DRI3
Power Dissipation, PD @ TA = 25°C
SOP-8
Package Thermal Resistance
SOP-8, θJA
Operating Junction Temperature Range
Storage Temperature Range
8V
-0.3 ~ 8V
-0.3 ~ 12V
0.625W
160°C/W
-40°C ~ 125°C
65°C ~ 150°C
Electrical Characteristics
(VDD = 5V, CIN = 1µF, TA = 25°C, unless otherwise specified)
Parameter
Supply Current
Symbol
IDD
Feedback Reference Voltage VREF
Line Regulation
∆VLINE
Load Regulation
∆VLOAD
Driving Capability
Driver Current Limiting
Driver Tri-State Threshold
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Typ
Max
Units
ICL
VTS
POR
Min
0.8
2
mA
0.8
0.82
V
VDD = 4V~7V
2
10
mV
Source 100mA, DRI1/DRI2/DRI3 = 2.5V
5
10
Sink 5mA, DRI1/DRI2/DRI3 = 2.5V
10
15
No Load
No Load
Sourcing, DRI1/DRI2/DRI3 = 2.5V
IO
Thermal Limit
Power On Reset Voltage
Test Conditions
Sink DRI1/DRI2/DRI3 = 2.5V
0.78
100
mA
5
Sourcing, DRI1/DRI2/DRI3 = 2.5V
300
700
Sink DRI1/DRI2/DRI3 = 2.5V
40
150
1.35
2.0
Sweep FB1/FB2/FB3 to Driver Output Off
1.0
mV
mA
V
150
°C
2.4
V
DS9174-00 April 2001
RT9174
Preliminary
Typical Operating Charateristics
Driver Sourcing vs Drop Out
Reference vs Tempature
0.82
300
VDD = 5V
250
-20°C
25°C
200
85°C
0.81
Sourcing(mA)
Reference (Volt)
VDD = 5V
0.80
150
100
0.79
50
0
0.78
-50
-10
30
70
110
0
150
1
Temperature (° C)
2
3
4
5
VDD - VDRI1,2,3 (Volt)
Driver Sinking vs VOUT
Supply Current vs Temperature
1.4
50
VDD = 5V
85°C
1.2
Sinking (mA)
IQ(mA)
40
25°C
1
-20°C
0.8
-20°C
25°C
85°C
30
20
0.6
10
0.4
3
4
5
6
7
0
8
1
2
VDD (Volt)
3
4
5
VOUT (Volt)
Tri-Sate Vth vs Temperature
Short Current vs Temperature
1.6
400
VDD = 5V
VDD = 5V
350
Short Current (mA)
Vth(Volt)
1.4
1.2
1.0
300
250
200
150
0.8
100
-50
-10
DS9174-00 April 2001
30
70
Temperature( ° C)
110
150
-50
-20
10
40
70
Temperature (° C)
100
130
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RT9174
Preliminary
Applications Information
Capacitors Selection
Layout Considerations
A 0.1µF minimum capacitor is recommended
between VDD and ground to increase stability. The
linear controllers use dominant pole compensation
integrated into the error amplifier and are sensitive to
output capacitor selection. When driving external
pass transistor, normally a minimum 470µF capacitor
must be placed at output for stability and good
transient response. When using internal pass
transistor, just need 10µF capacitor for stable.
There are two critical layout considerations. One is
the divider resistors should be located to RT9174 as
possible to avoid inducing any noise. The second is
COUT should be put at near the pass transistor to
avoid oscillation.
V IN
DRI1
VDD RT9174 DRI2
DRI3
V DD
1µF
Pass Transistor Selection
FB1
FB2
FB3
V OUT
R1
The RT9174 are designed specifically to driver
external NPN or NMOSFET pass transistor for up to
5A output current. The driver could deliver more
100mA when driving NPN transistor and sinking for a
pull up resistor load when driving a NMOSFET.
+
COUT
R2
As close as to RT9174
Fig 4
Typically pass transistor with NPN hfe > 50 at Imax or
NMOSFET Rds-on 100mΩ are suitable in most
application.
Output Voltage Setting
The RT9174 develop a 0.8V reference voltage,
especially suit for low voltage application. As shown
in Fig. 4, the output voltage could be easy set by R1
& R2 resistor. The divided resistor must keep below
1KΩ for quick response and stability.
Tri-state Operation
A special Tri-state design is empolyed in the RT9174
for AGP 2X/4X power supply. Typical application
shown the detail circuit. In AGP 2X SELECT = open,
FB1 will be pulled up over 1.3V through R8 to trip the
Tri-state threshold. R8 has to meet the following
relationship:
R8 < 0.75 (V33 - 1.3) ×R2,
if
R3 + R2
× 0.8 = 1.5 .
R3
When in AGP 4X SELECT = GND, VDDQ will work in
normal 1.5V setting.
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DS9174-00 April 2001
RT9174
Preliminary
Package Information
H
A
M
J B
F
C
D
I
Dimensions In Millimeters
Symbol
Dimensions In Inches
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
3.988
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.508
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.178
0.254
0.007
0.010
I
0.102
0.254
0.004
0.010
J
5.791
6.198
0.228
0.244
M
0.406
1.270
0.016
0.050
8-Lead SOP Plastic Package
DS9174-00 April 2001
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RT9174
Preliminary
RICHTEK TECHNOLOGY CORP.
RICHTEK TECHNOLOGY CORP.
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)89191466 Fax: (8862)89191465
Email: [email protected]
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DS9174-00 April 2001