Si9182
Vishay Siliconix
Micropower 250-mA CMOS LDO Regulator
With Error Flag/Power-On-Reset
FEATURES
Low 105-mV Dropout at 250-mA Load
Guaranteed 250-mA Output Current
500-mA Peak Output Current Capability
Uses Low ESR Ceramic Output Capacitor
Fast Load and Line Transient Response
Only 100-mV(rms) Noise With Noise Bypass
Capacitor
D 1-mA Maximum Shutdown Current
D Built-in Short Circuit and Thermal Protection
D Out-Of-Regulation Error Flag (Power Good or POR)
D Fixed 1.215-V, 1.5-V, 1.8-V, 2.0-V, 2.5-V, 2.8-V,
2.85-V, 2.9-V, 3.0-V, 3.3-V, 5.0-V, or Adjustable
Output Voltage Options
D Other Output Voltages Available by Special Order
D
D
D
D
D
D
APPLICATIONS
D Cellular Phones
D Laptop and Palm Computers
D PDA, Digital Still Cameras
DESCRIPTION
The Si9182 is a 250-mA CMOS LDO (low dropout) voltage
regulator. The device features ultra low ground current and
dropout voltage to prolong battery life in portable electronics.
The Si9182 offers line/load transient response and ripple
rejection superior to that of bipolar or BiCMOS LDO regulators.
The device is designed to maintain regulation while delivering
500-mA peak current. This is useful for systems that have high
surge current upon turn-on. The Si9182 is designed to drive
the lower cost ceramic, as well as tantalum, output capacitors.
The device is guaranteed stable from maximum load current
down to 0-mA load. In addition, an external noise bypass
capacitor connected to the device’s CNOISE pin will lower the
LDO’s output noise for low noise applications.
The Si9182 also includes an out-of-regulation error flag. When
the output voltage is 5% below its nominal output voltage, the
error flag output goes low. If a capacitor is connected to the
device’s delay pin, the error flag output pin will generate a
delayed power-on-reset signal.
The Si9182 is available in both standard and lead (Pb)-free
MSOP-8 packages and is specified to operate over the
industrial temperature range of −40 _C to 85 _C.
TYPICAL APPLICATIONS CIRCUITS
VIN
1
CNOISE
SD
8
1
CNOISE
SD
8
2
DELAY
ERROR
7
2
DELAY
ERROR
7
3
GND
SENSE/ADJ
6
3
GND
SENSE/ADJ
6
4
VIN
VOUT
5
4
VIN
VOUT
5
2.2 mF
GND
VOUT
VIN
2.2 mF
GND
2.2 mF
Si9182
FIGURE 1. Fixed Output
0.1 mF
VIN
2.2 mF
GND
Si9182
VOUT
2.2 mF
FIGURE 2. Adjustable Output
0.1 mF
1
CNOISE
SD
8
2
DELAY
ERROR
7
3
GND
4
VIN
SENSE/ADJ
6
VOUT
5
Si9182
ON/OFF
POR
1 MW
VOUT
2.2 mF
FIGURE 3. Low Noise, Full Features Application
Document Number: 71150
S-41221—Rev. F, 28-Jun-04
www.vishay.com
1
Si9182
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V
SD Input Voltage, VSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VIN
Output Current, IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VO(nom) + 0.3 V
Maximum Junction Temperature, TJ(max) . . . . . . . . . . . . . . . . . . . . . . . 150_C
Storage Temperature, TSTG . . . . . . . . . . . . . . . . . . . . . . . . . . −55_C to 150_C
ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Power Dissipation (Package)a
8-Pin MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 666 mW
Thermal Impedance (QJA)
8-Pin MSOPb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 6.6 mW/_C above TA = 25_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 V to 6 V
Output Voltage, VOUT (Adjustable Version) . . . . . . . . . . . . . . . . . . 1.5 V to 5 V
SD Input Voltage, VSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VIN
Operating Ambient Temperature, TA . . . . . . . . . . . . . . . . . . . . −40_C to 85_C
Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . −40_C to 125_C
CIN = 2.2 mF, COUT = 2.2 mF (ceramic, X5R or X7R type) , CNOISE = 0.1 mF (ceramic)
COUT Range = 1 mF to 10 mF ("10%, x5R or x7R type)
CIN w COUT
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
Output Voltage Range
Adjustable Version
Output Voltage Accuracy
(Fixed Versions)
VOUT
Feedback Voltage (ADJ Version)
VADJ
DVOUT
VIN
100
VOUT(nom)
Line Regulation (ADJ Version)
Dropout Voltaged
(@VOUT w 2 V)
VIN − VOUT
2
Unit
V
5
1.5
Full
−2.5
2.5
Room
1.191
Full
1.179
1.251
From VIN = VOUT(nom) + 1 V
to VOUT(nom) + 2 V
Full
−0.18
0.18
From VIN = 5.5 V to 6 V
Full
−0.18
0.18
VOUT = 1.5 V, From VIN = 2.5 V to 3.5 V
Full
−0.18
0.18
VOUT = 5 V, From VIN = 5.5 V to 6 V
Full
−0.18
0.18
IOUT = 10 mA
Room
5
20
IOUT = 200 mA
Room
85
180
Room
105
275
IOUT = 250 mA
IOUT = 200 mA
IOUT = 250 mA
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Maxb
1.5
IOUT = 250 mA
IGND
Typc
−1.5
IOUT = 0 mA
Ground Pin Current
Minb
Full
IOUT = 200 mA
Dropout Voltaged
(@VOUT t 2 V, VIN w 2 V)
Tempa
Room
1 mA v IOUT v 250 mA
Line Regulation
(Except 5-V Version)
Line Regulation (5-V Version)
VIN = VOUT(nom) + 1 V
V, IOUT = 1 mA
A
CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V
Limits
−40 to 85_C
1.215
Full
1.239
400
Room
170
250
Room
210
300
Full
150
Room
1000
Full
Full
V
%/V
mV
450
Room
Room
% VO(nom)
O(
)
1500
mA
m
1200
1900
Document Number: 71150
S-41221—Rev. F, 28-Jun-04
Si9182
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Limits
−40 to 85_C
VIN = VOUT(nom) + 1 V
V, IOUT = 1 mA
A
CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V
Tempa
IIN(off)
VSD = 0 V
Room
IADJ
ADJ = 1.2 V
Room
Peak Output Current
IO(peak)
VOUT w 0.95 x VOUT(nom), tpw = 2 ms
Room
Output Noise Voltage
eN
Parameter
Shutdown Supply Current
ADJ Pin Current
Ripple
pp Rejection
j
Symbol
DVOUT/DVIN
Minb
Typc
Maxb
Unit
0.1
1
mA
5
100
nA
500
mA
BW = 50 Hz to 100 kHz
IOUT = 150 mA
w/o CNOISE
Room
200
CNOISE = 0.1 mF
Room
100
f = 1 kHz
Room
60
IOUT = 150 mA
f = 10 kHz
Room
60
f = 100 kHz
Room
40
mV (rms)
dB
Dynamic Line Regulation
DVO(line)
VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V
tR/tF = 5 ms, IOUT = 250 mA
Room
10
Dynamic Load Regulation
DVO(load)
IOUT : 1 mA to 150 mA, tR/tF = 2 ms
Room
30
w/o CNOISE Cap
Room
5
ms
CNOISE = 0.1 mF
Room
2
mS
VOUT Turn-On-Time
Turn On Time
tON
VIN = 4.3 V
VOUT = 3.3 V
mV
Thermal Shutdown
Thermal Shutdown Junction Temp
tJ(s/d)
Room
165
Thermal Hysteresis
tHYST
Room
20
Short Circuit Current
ISC
VOUT = 0 V
Room
800
VIH
High = Regulator ON (Rising)
Full
VIL
Low = Regulator OFF (Falling)
Full
IIH
VSD = 0 V, Regulator OFF
Room
0.01
IIL
VSD = 6 V, Regulator ON
Room
1.0
Full
100
0.01
2
0.95 x
VOUT
0.97 x
VOUT
V
3.0
mA
_C
mA
Shutdown Input
SD Input Voltage
SD Input Currente
Shutdown Hysteresis
VHYST
1.5
VIN
V
0.4
mA
mV
Error Output
Output High Leakage
Output Low
Voltageg
Power_Good Trip Thresholdf, h
(Rising)
IOFF
ERROR = VOUT(nom)
Full
VOL
ISINK = 2 mA
Full
VTH
Full
Hysteresis f
VHYST
Room
Delay Pin Current Source
IDELAY
Room
mA
0.4
0.93 x
VOUT
2% x
VOUT
1.2
2.2
Notes
a. Room = 25_C, Full = −40 to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT w 2 V are measured at
VOUT = 3.3 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 V.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V
differential, provided that VIN does not not drop below 2.0 V.
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f.
VOUT is defined as the output voltage of the DUT at 1 mA.
g. The Error Output (Low) function is guaranteed from VOUT = 2.0 V to VOUT = 5.0 V.
h. The Power_Good trip threshold function is guaranteed from VOUT = 1.5 V to VOUT = 5.0 V and VIN w 2.0 V.
Document Number: 71150
S-41221—Rev. F, 28-Jun-04
www.vishay.com
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Si9182
Vishay Siliconix
TIMING WAVEFORMS
VIN
tON
VNOM
0.95 VNOM
VOUT
ERROR
tDELAY
FIGURE 4. Timing Diagram for Power-Up
PIN CONFIGURATION
MSOP-8
CNOISE
1
8
DELAY
2
7
ERROR
SD
GND
3
6
SENSE or ADJ
VIN
4
5
VOUT
Top View
PIN DESCRIPTION
Pin Number
Function
1
CNOISE
Noise bypass pin. For low noise applications, a 0.01-mF or larger ceramic capacitor should be connected from this pin
to ground.
2
DELAY
Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (Pin 7) output.
Refer to Figure 4.
3
GND
4
VIN
5
VOUT
6
SENSE or ADJ
For fixed output voltage versions, this pin should be connected to VOUT (Pin 5). For adjustable output voltage version,
this voltage feedback pin sets the output voltage via an external resistor divider.
7
ERROR
This open drain output is an error flag output which goes low when VOUT drops 5% below its nominal voltage. This pin
also provides a power-on-reset signal if a capacitor is connected to the DELAY pin.
8
SD
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4
Name
Ground pin. Local ground for CNOISE and COUT.
Input supply pin. Bypass this pin with a 2.2-mF ceramic or tantalum capacitor to ground.
Output voltage. Connect COUT between this pin and ground.
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused.
Document Number: 71150
S-41221—Rev. F, 28-Jun-04
Si9182
Vishay Siliconix
ORDERING INFORMATION
Standard
Part Number
Lead (Pb)-Free
Part Number
Marking
Voltage
Si9182DH-12-T1
Si9182DH-12-T1—E3
8212
1.215 V
Si9182DH-15-T1
Si9182DH-15-T1—E3
8215
1.5 V
Si9182DH-18-T1
Si9182DH-18-T1—E3
8218
1.8 V
Si9182DH-20-T1
Si9182DH-20-T1—E3
8220
2.0 V
Si9182DH-25-T1
Si9182DH-25-T1—E3
8225
2.5 V
Si9182DH-28-T1
Si9182DH-28-T1—E3
8228
2.8 V
Si9182DH-285-T1
Si9182DH-285-T1—E3
822A
2.85 V
Si9182DH-29-T1
Si9182DH-29-T1—E3
8229
2.9 V
Si9182DH-30-T1
Si9182DH-30-T1—E3
8230
3.0 V
Si9182DH-33-T1
Si9182DH-33-T1—E3
8233
3.3 V
Si9182DH-50-T1
Si9182DH-50-T1—E3
8250
5.0 V
Si9182DH-AD-T1
Si9182DH-AD-T1—E3
82AD
Adjustable
Temperature
Range
Package
−40 to 85_C
MSOP-8
* Additional voltage options are available.
Eval Kit
Temperature Range
Board Type
Si9182DB
−40 to 85_C
Surface Mount
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Dropout Voltage vs. Load Current
Dropout Characteristic
250
3.5
VOUT = 3.3 V
3.0
200
RLOAD = 16.5 W
150
V OUT (V)
V DROP (mV)
2.5
100
2.0
1.5
1.0
50
0.5
0
0.0
0
100
200
300
ILOAD (mA)
400
500
0
1
Dropout Voltage vs. Temperature
180
4
5
6
200
IOUT = 250 mA
120
IOUT = 200 mA
90
60
Dropout Voltage (mV)
175
VOUT = 3.3 V
V DROP (mV)
3
VIN (V)
Dropout Voltage vs. VOUT
225
150
150
IOUT = 250 mA
125
100
IOUT = 200 mA
75
50
30
0
−50
2
IOUT = 10 mA
IOUT = 0 mA
−25
Document Number: 71150
S-41221—Rev. F, 28-Jun-04
0
25
50
75
100
Junction Temperature (_C)
125
150
25
0
1.0
IOUT = 10 mA
1.5
2.0
2.5
3.0
VOUT
3.5
4.0
4.5
5.0
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Si9182
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Normalized Output Voltage vs. Load Current
Normalized VOUT vs. Temperature
−0.0
0.30
IOUT = 0 mA
−0.2
0.00
IOUT = 100 mA
−0.4
V OUT (%)
Output Voltage (%)
0.15
−0.15
−0.30
−0.6
IOUT = 200 mA
−0.8
−0.45
IOUT = 250 mA
−1.0
−0.60
−0.75
0
50
100
150
200
250
−1.2
−40
300
−20
0
Load Current (mA)
20
40
60
80
100
120
140
Junction Temperature (_C)
GND Current vs. Load Current
No Load GND Pin Current vs. Input Voltage
0.0
300
VOUT = 5 V
250
−0.3
I GND ( mA)
I GND ( mA)
200
−0.6
25_C
−0.9
85_C
150
25_C
100
−1.2
−40_C
50
−1.5
0
0
50
100
150
200
250
0
1
2
3
Load Current (mA)
Power Supply Rejection
0
1500
GND Pin Current vs. Temperature and Load
IOUT = 200 mA
900
600
300
100
1000
10000
Frequency (Hz)
6
7
1200
−60
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6
IOUT = 250 mA
−40
−80
10
5
VOUT = 5 V
CIN = 10 mF
COUT = 2.2 mF
ILOAD = 150 mA
I GND ( mA)
Gain (dB)
−20
4
Input Voltage (V)
100000
1000000
0
−40
IOUT = 0 mA
−20
0
20
40
60
80
100
120
140
JunctionTemperature (_C)
Document Number: 71150
S-41221—Rev. F, 28-Jun-04
Si9182
Vishay Siliconix
TYPICAL WAVEFORMS
Load Transient Response-1
Load Transient Response-2
VOUT
10 mV/div
VOUT
10 mV/div
ILOAD
100 mA/div
ILOAD
100 mA/div
5.00 ms/div
VOUT = 3.3 V
COUT = 2.2 mF
ILOAD = 1 to 150 mA
trise = 2 msec
5.00 ms/div
Load Transient Response-3
VOUT = 3.3 V
COUT = 2.2 mF
ILOAD = 150 to 1 mA
tfall = 2 msec
Load Transient Response-4
VOUT
10 mV/div
VOUT
10 mV/div
ILOAD
100 mA/div
ILOAD
100 mA/div
5.00 ms/div
VOUT = 3.3 V
COUT = 1.0 mF
ILOAD = 1 to 150 mA
trise = 2 msec
5.00 ms/div
LineTransient Response-1
VOUT = 3.3 V
COUT = 1.0 mF
ILOAD = 150 to 1 mA
tfall = 2 msec
LineTransient Respons-2
VOUT
1 V/div
VIN
2 V/div
VOUT
10 mV/div
5.00 ms/div
Document Number: 71150
S-41221—Rev. F, 28-Jun-04
VOUT
10 mV/div
VINSTEP = 4.3 to 5.3 V
VOUT = 3.3 V
COUT = 2.2 mF
CIN = 10 mF
ILOAD = 250 mA
trise = 5 msec
5.00 ms/div
VINSTEP = 5.3 to 4.3 V
VOUT = 3.3 V
COUT = 2.2 mF
CIN = 10 mF
ILOAD = 250 mA
tfall = 5 msec
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Si9182
Vishay Siliconix
TYPICAL WAVEFORMS
Turn-On Sequence
Turn-Off Sequence
VIN
CH-3 2 V/div
VIN 2 V/div
VOUT
CH-1 2 V/div
VOUT 2 V/div
Cdelay
CH-4 2 V/div
Cdelay 2 V/div
ERROR 2 V/div
10.00 ms/div
ERROR
CH-2 2 V/div
5.00 ms/div
VIN = 4.2 V
VOUT = 3.3 V
Cdelay = 0.1 mF
CNOISE = 0.1 mF
ILOAD = 250 mA
Output Noise
VIN = 4.2 V
VOUT = 3.3 V
Cdelay = 0.1 mF
CNOISE = 0.1 mF
ILOAD = 250 mA
Noise Spectrum
10.0
mVń ǸHz
500 mV/div
0.01
1 ms/div
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8
VIN = 4.2 V
VOUT = 3.3 V
IOUT = 150 mA
CNOISE = 0.1 mF
BW = 10 Hz to 1 MHz
100 Hz
VIN = 4.1 V
VOUT = 3.3 V/10 mA
CNOISE = 0.1 mF
1 MHz
Document Number: 71150
S-41221—Rev. F, 28-Jun-04
Si9182
Vishay Siliconix
BLOCK DIAGRAMS
Switches shown for device in normal operating mode (SD = HIGH)
6
SENSE
1
CNOISE
4
VIN
CIN
2.2 mF
8
SD
ON
+
−
RFB2
OFF
3
VOUT
COUT
2.2 mF
2
+
−
REXT
CDELAY
0.1 mF
+
1.215 V
VREF
5
2 mA
+
RFB1
GND
To VIN
60 mV
6 MW
−
ERROR
7
+
−
FIGURE 5. 250-mA CMOS LDO Regulator (Fixed Output)
6
ADJ
1
CNOISE
4
VIN
CIN
2.2 mF
R2
VADJ
8
SD
R1
ON
+
−
OFF
6 MW
To VIN
60 mV
2
+
−
GND
3
+
−
VOUT
COUT
2.2 mF
+
1.215 V
VREF
5
2 mA
REXT
CDELAY
0.1 mF
−
7
ERROR
+
FIGURE 6. 250-mA CMOS LDO Regulator (Adjustable Output)
Document Number: 71150
S-41221—Rev. F, 28-Jun-04
www.vishay.com
9
Si9182
Vishay Siliconix
DETAILED DESCRIPTION
The Si9182 is a low drop out, low quiescent current, and very
linear regulator family with very fast transient response. It is
primarily designed for battery powered applications where
battery run time is at a premium. The low quiescent current
allows extended standby time while low drop out voltage
enables the system to fully utilize battery power before
recharge. The Si9182 is a very fast regulator with bandwidth
exceeding 50 kHz while maintaining low quiescent current at
light load conditions. With this bandwidth, the Si9182 is the
fastest LDO available today. The Si9182 is stable with any
output capacitor type from 1 mF to 10.0 mF. However, X5R or
X7R ceramic capacitors are recommended for best output
noise and transient performance.
VIN
VIN is the input supply pin. The bypass capacitor for this pin
is not critical as long as the input supply has low enough source
impedance. For practical circuits, a 1.0-mF or larger ceramic
capacitor is recommended. When the source impedance is
not low enough and/or the source is several inches from the
Si9182, then a larger input bypass capacitor is needed. It is
required that the equivalent impedance (source impedance,
wire, and trace impedance in parallel with input bypass
capacitor impedance) must be smaller than the input
impedance of the Si9182 for stable operation. When the
source impedance, wire, and trace impedance are unknown,
it is recommended that an input bypass capacitor be used of
a value that is equal to or greater than the output capacitor.
VOUT
VOUT is the output voltage of the regulator. Connect a bypass
capacitor from VOUT to ground. The output capacitor can be
any value from 1.0 mF to 10.0 mF. A ceramic capacitor with
X5R or X7R dielectric type is recommended for best output
noise, line transient, and load transient performance.
The formula below calculates the value of R1, given the
desired output voltage and the R2 value,
R1 +
ǒV OUT * VADJǓR2
VADJ
(1)
VADJ is nominally 1.215 V.
SHUTDOWN (SD)
SD controls the turning on and off of the Si9182. VOUT is
guaranteed to be on when the SD pin voltage equals or is
greater than 1.5 V. VOUT is guaranteed to be off when theSD
pin voltage equals or is less than 0.4 V. During shutdown
mode, the Si9182 will draw less than 2-mA current from the
source. To automatically turn on VOUT whenever the input is
applied, tie the SD pin to VIN.
ERROR
ERROR is an open drain output that goes low when VOUT is
less than 5% of its normal value. As with any open drain output,
an external pull up resistor is needed. When a capacitor is
connected from DELAY to GROUND, the error signal transition
from low to high is delayed (see Delay section). This delayed
error signal can be used as the power-on reset signal for the
application system. (Refer to Figure 4.)
The ERROR pin is disconnected if not used.
DELAY
A capacitor from DELAY to GROUND sets the time delay for
ERROR going from low to high state. The time delay can be
calculated using the following formula:
GND
Ground is the common ground connection for VIN and VOUT.
It is also the local ground connection for CNOISE, DELAY,
SENSE or ADJ, and SD.
SENSE or ADJ
SENSE is used to sense the output voltage. Connect SENSE
to VOUT for the fixed voltage version. For the adjustable output
version, use a resistor divider R1 and R2, connect R1 from
VOUT to ADJ and R2 from ADJ to ground. R2 should be in the
25-kW to 150-kW range for low power consumption, while
maintaining adequate noise immunity.
www.vishay.com
10
Tdelay +
ǒVADJǓCdelay
(2)
Idelay
The DELAY pin should be an open circuit if not used.
CNOISE
For low noise application, connect a high frequency ceramic
capacitor from CNOISE to ground. A 0.01-mF or a 0.1-mF X5R
or X7R is recommended.
Document Number: 71150
S-41221—Rev. F, 28-Jun-04