Si9185
Vishay Siliconix
Micropower 500-mA CMOS LDO Regulator
With Error Flag/Power-On-Reset
FEATURES
D
D
D
D
D
D
D
D
D
D
D Other Output Voltages Available by Special Order
D 1.1-W Power Dissipation
D Thin, Thermally Enhanced MLP33 PowerPAKt
Package
Input Voltage 2 V to 6 V
Low 150-mV Dropout at 500-mA Load
Guaranteed 500-mA Output Current
Uses Low ESR Ceramic Output Capacitor
Fast Load and Line Transient Response
Only 100-mV(rms) Noise With Noise Bypass Capacitor
1-mA Maximum Shutdown Current
Built-in Short Circuit and Thermal Protection
Out-Of-Regulation Error Flag (Power Good or POR)
Fixed 1.215-V, 1.5-V, 1.8-V, 2.0-V, 2.5-V, 2.8-V, 2.9-V,
3.0-V, 3.3-V, 5.0-V, or Adjustable Output Voltage
Options
APPLICATIONS
D
D
D
D
Laptop and Palm Computers
Desktop Computers
Cellular Phones
PDA, Digital Still Cameras
DESCRIPTION
The Si9185 is a 500-mA CMOS LDO (low dropout) voltage
regulator. The device features ultra low ground current and
dropout voltage to prolong battery life in portable electronics.
The Si9185 offers line/load transient response and ripple
rejection superior to that of bipolar or BiCMOS LDO regulators,
and is designed to drive lower cost ceramic, as well as
tantalum, output capacitors. An external noise bypass
capacitor connected to the device’s CNOISE pin will lower the
LDO’s output noise for low noise applications. The Si9185 also
includes an out-of-regulation error flag. If a capacitor is
connected to the device’s delay pin, the error flag output pin will
generate a delayed power-on-reset signal. The device is
guaranteed stable from maximum load current down to 0-mA
load.
The Si9185 is available in a MLP33 PowerPAK package. This
allows enhanced heat transfer to the PC board. The Si9185 is
specified to operate over the industrial temperature range of
–40_C to +85_C.
TYPICAL APPLICATIONS CIRCUITS
VIN
1
CNOISE
SD
8
1
CNOISE
SD
8
2
DELAY
ERROR
7
2
DELAY
ERROR
7
3
GND
SENSE/ADJ
6
3
GND
SENSE/ADJ
6
4
VIN
VOUT
5
4
VIN
VOUT
5
2.2 mF
GND
VOUT
VIN
2.2 mF
GND
2.2 mF
Si9185
FIGURE 1. Fixed Output
0.1 mF
VIN
2.2 mF
GND
Si9185
VOUT
2.2 mF
FIGURE 2. Adjustable Output
0.1 mF
1
CNOISE
SD
8
2
DELAY
ERROR
7
3
GND
4
VIN
SENSE/ADJ
6
VOUT
5
Si9185
ON/OFF
POR
1 MW
VOUT
2.2 mF
FIGURE 3. Low Noise, Full Features Application
Document Number: 71765
S-20641—Rev. B, 06-May-02
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Si9185
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V
Power Dissipationb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 W
SD Input Voltage, VSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VIN
Thermal Impedance (QJA)a
(RQ ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50_C/W
JA
(RQ ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4_C/W
Jc
Notes
a. Device mounted with all leads soldered or welded to PC board. (PC
board—2” x 2”, 4-layer, FR4, 0.25 square inch spreading copper)
b. Derate 20 mW/_C above TA = 25_C
Output Current, IOUT . . . . . . . . 500 mA Continuous, Short Circuit Protected
Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VO(nom) + 0.3 V
Maximum Junction Temperature, TJ(max) . . . . . . . . . . . . . . . . . . . . . . . 150_C
Storage Temperature, TSTG . . . . . . . . . . . . . . . . . . . . . . . . . . –55_C to 150_C
ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 V to 6 V
Output Voltage, VOUT (Adjustable Version) . . . . . . . . . . . . . . . 1.215 V to 5 V
R2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 kW to 150 kW
Operating Ambient Temperature, TA . . . . . . . . . . . . . . . . . . . . –40_C to 85_C
Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . –40_C to 125_C
CIN = 2.2 mF, COUT = 2.2 mF (ceramic, X5R or X7R type) , CNOISE = 0.1 mF (ceramic)
COUT Range = 1 mF to 10 mF ("10%, x5R or x7R type)
CIN w COUT
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
Output Voltage Range
Adjustable Version
Output Voltage Accuracy
(Fixed Versions)
VOUT
Feedback Voltage (ADJ Version)
VADJ
Line Regulation
(VADJ v VOUT v 4 V)
DVOUT
V IN
Line Regulation (4 V VOUT v 5 V)
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2
VIN = VOUT(nom) + 1 V, IOUT = 1 mA
CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V
1 mA v IOUT v 500 mA
100
From VIN = VOUT + 1 V
to VOUT + 2 V
Limits
–40 to 85_C
Tempa
Minb
Typc
Maxb
Unit
V
Full
1.215
5
Room
–1.5
1.5
Full
–2.5
2.5
Room
1.191
Full
1.179
1.251
Full
–0.18
0.18
1.215
% VO(nom)
1.239
V
%/V
VOUT
From VIN = 5.5 V to 6 V
Full
–0.18
0.18
Document Number: 71765
S-20641—Rev. B, 06-May-02
Si9185
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
Dropout Voltaged
(@VOUT(nom) w 2 V)
VIN – VOUT
VIN = VOUT(nom) + 1 V, IOUT = 1 mA
CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V
Tempa
IOUT = 10 mA
Room
5
20
IOUT = 200 mA
Room
145
215
Room
320
480
IOUT = 500 mA
IOUT = 500 mA
VIN – VOUT
IOUT = 500 mA
VIN – VOUT
IOUT = 500 mA
VIN – VOUT
IOUT = 500 mA
IGND
115
175
Room
250
400
IOUT = 200 mA
Room
90
135
Room
200
300
Shutdown Supply Current
Room
60
100
Room
150
210
300
Room
170
250
Room
415
625
825
Room
150
Room
1000
Full
1500
Full
4000
VSD = 0 V
Room
0.1
1
IADJ
ADJ = 1.2 V
Room
5
100
Peak Output Current
IO(peak)
VOUT w 0.95 x VOUT(nom), tpw = 2 ms
Room
Output Noise Voltage
eN
Ripple Rejection
DVOUT/DVIN
BW = 50 Hz to 100 kHz
IOUT = 150 mA
600
mA
nA
mA
w/o CNOISE
Room
200
CNOISE = 0.1 mF
Room
100
f = 1 kHz
Room
60
f = 10 kHz
Room
60
f = 100 kHz
Room
40
IOUT = 150 mA
mA
m
2500
IIN(off)
ADJ Pin Current
mV
400
Room
IOUT = 500 mA
Unit
480
Full
IOUT = 0 mA
Ground Pin Current
Room
Full
IOUT = 200 mA
Dropout Voltaged
(@VOUT(nom) t 2 V, VIN w 2 V)
Maxb
600
Full
IOUT = 200 mA
Dropout Voltaged
(@VOUT(nom) w 5 V)
Typc
Full
IOUT = 200 mA
Dropout Voltaged
(@VOUT(nom) w 3.3 V)
Minb
Full
IOUT = 200 mA
Dropout Voltaged
(@VOUT(nom) w 2.5 V)
Limits
–40 to 85_C
m (rms)
mV
dB
Dynamic Line Regulation
DVO(line)
VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V
tR/tF = 5 ms, IOUT = 500 mA
Room
10
Dynamic Load Regulation
DVO(load)
IOUT : 1 mA to 150 mA, tR/tF = 2 ms
Room
30
w/o CNOISE Cap
Room
5
ms
CNOISE = 0.1 mF
Room
2
mS
VOUT Turn-On-Time
tON
VIN = 4.3 V
VOUT = 3.3 V
mV
Thermal Shutdown
Thermal Shutdown Junction Temp
tJ(s/d)
Room
165
Thermal Hysteresis
tHYST
Room
20
Short Circuit Current
ISC
VOUT = 0 V
Room
800
VIH
High = Regulator ON (Rising)
Full
VIL
Low = Regulator OFF (Falling)
Full
_
_C
mA
Shutdown Input
SD Input Voltage
Document Number: 71765
S-20641—Rev. B, 06-May-02
1.5
VIN
0.4
V
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Si9185
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Parameter
SD Input Currente
Shutdown Hysteresis
Limits
–40 to 85_C
Symbol
VIN = VOUT(nom) + 1 V, IOUT = 1 mA
CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V
Tempa
IIH
VSD = 0 V, Regulator OFF
Room
0.01
IIL
VSD = 6 V, Regulator ON
Room
1.0
Full
100
0.01
2
0.95 x
VOUT
0.97 x
VOUT
V
3.0
mA
VHYST
Minb
Typc
Maxb
Unit
m
mA
mV
Error Output
Output High Leakage
Output Low
Voltageg
Out-of-Regulation Error Flag
Threshold Voltage (rising) g
IOFF
ERROR = VOUT(nom)
Full
VOL
ISINK = 2 mA
Full
VTH
Full
Hysteresis g
VHYST
Room
Delay Pin Current Source
IDELAY
Room
mA
0.4
0.93 x
VOUT
2% x
VOUT
1.2
2.2
Notes
a. Room = 25_C, Full = –40 to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT w 2 V are measured at
VOUT = 3.3 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 V.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V
differential, provided that VIN does not not drop below 2.0 V. When VOUT(nom) is less than 2.0 V, the output will be in regulation when 2.0 V – VOUT(nom) is
greater than the dropout voltage specified.
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f.
VOUT is defined as the output voltage of the DUT at 1 mA.
g. The Error Output (Low) function is guaranteed for VIN w2.0 V.
TIMING WAVEFORMS
VIN
tON
VNOM
0.95 VNOM
VOUT
ERROR
tDELAY
FIGURE 4. Timing Diagram for Power-Up
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Document Number: 71765
S-20641—Rev. B, 06-May-02
Si9185
Vishay Siliconix
PIN CONFIGURATION
MLP33 PowerPAK
MLP33 PowerPAK
CNOISE
1
8
SD
DELAY
2
7
ERROR
GND
3
6
SENSE or ADJ
VIN
4
5
VOUT
SD
8
1
CNOISE
ERROR
7
2
DELAY
SENSE or ADJ
6
3
GND
VOUT
5
4
VIN
Exposed Pad
Top View
Bottom View
PIN DESCRIPTION
Pin Number
Name
Function
1
CNOISE
Noise bypass pin. For low noise applications, a 0.01-mF or larger ceramic capacitor should be connected
from this pin to ground.
2
DELAY
Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (Pin
7) output. Refer to Figure 4.
3
GND
4
VIN
5
VOUT
6
SENSE or ADJ
For fixed output voltage versions, this pin should be connected to VOUT (Pin 5). For adjustable output
voltage version, this voltage feedback pin sets the output voltage via an external resistor divider.
7
ERROR
This open drain output is an error flag output which goes low when VOUT drops 5% below its nominal
voltage. This pin also provides a power-on-reset signal if a capacitor is connected to the DELAY pin.
8
SD
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused.
Ground pin. Local ground for CNOISE and COUT.
Input supply pin. Bypass this pin with a 2.2-mF ceramic or tantalum capacitor to ground.
Output voltage. Connect COUT between this pin and ground.
Exposed Pad
The die substrate is attached to the exposed pad and must be electrically connected to GND.
ORDERING INFORMATION
Part Number
Marking
Voltage
Si9185DMP-12-T1
8512
1.215 V
Si9185DMP-15-T1
8515
1.50 V
Si9185DMP-18-T1
8518
1.80 V
Si9185DMP-20-T1
8520
2.00 V
Si9185DMP-25-T1
8525
2.50 V
Si9185DMP-28-T1
8528
2.80 V
Si9185DMP-29-T1
8529
2.90 V
Si9185DMP-30-T1
8530
3.00 V
Si9185DMP-33-T1
8533
3.30 V
Si9185DMP-50-T1
8550
5.00 V
Temperature
Package
–40 to 85
85_C
C
MLP33
PowerPAK
Si9185DMP-AD-T1
85AD
Adjustable
Additional voltage options are available.
Document Number: 71765
S-20641—Rev. B, 06-May-02
Eval Kit
Temperature Range
Board Type
Si9185DB
–40 to 85_C
Surface Mount
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Si9185
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Dropout Voltage vs. Load Current
Dropout Characteristic
300
3.5
VOUT = 3.0 V
250
3.0
RLOAD = 16.5 W
200
V OUT (V)
V DROP (mV)
2.5
150
2.0
1.5
100
1.0
50
0.5
0
0.0
0
100
200
300
400
500
600
0
1
2
3
ILOAD (mA)
5
6
VIN (V)
Dropout Voltage vs. Temperature
Dropout Voltage vs. VOUT
300
400
IOUT = 500 mA
350
250
VOUT = 3.0 V
150
IOUT = 200 mA
100
Dropout Voltage (mV)
300
200
V DROP (mV)
4
250
IOUT = 500 mA
200
IOUT = 200 mA
150
100
50
50
0
–50
IOUT = 10 mA
IOUT = 0 mA
–25
0
25
50
75
100
125
0
1.0
150
IOUT = 10 mA
1.5
2.0
2.5
Junction Temperature (_C)
3.0
3.5
4.0
4.5
5.0
VOUT
Normalized Output Voltage vs. Load Current
Normalized VOUT vs. Temperature
0.30
0.2
0.15
–0.0
0.00
–0.2
V OUT (%)
Output Voltage (%)
IOUT = 1 mA
–0.15
–0.30
IOUT = 200 mA
–0.4
IOUT = 500 mA
–0.6
–0.45
–0.8
–0.60
–0.75
0
50
100 150 200 250 300 350 400 450 500
Load Current (mA)
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6
–1.0
–40
–20
0
20
40
60
80
100
120
140
Junction Temperature (_C)
Document Number: 71765
S-20641—Rev. B, 06-May-02
Si9185
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
GND Current vs. Load Current
No Load GND Pin Current vs. Input Voltage
0.0
300
VOUT = 5 V
250
–0.5
I GND ( mA)
I GND ( mA)
200
–1.0
25_C
–1.5
85_C
150
25_C
100
–40_C
–2.0
50
–2.5
0
0
50
100 150 200 250 300 350 400 450 500
0
1
2
3
Load Current (mA)
4
5
6
7
Input Voltage (V)
Power Supply Rejection
GND Pin Current vs. Temperature and Load
2500
0
CIN = 10 mF
COUT = 2.2 mF
ILOAD = 150 mA
VOUT = 5 V
IOUT = 500 mA
2000
I GND ( mA)
Gain (dB)
–20
–40
1500
IOUT = 200 mA
1000
–60
500
IOUT = 0 mA
–80
10
100
1000
10000
Frequency (Hz)
Document Number: 71765
S-20641—Rev. B, 06-May-02
100000
1000000
0
–40
–20
0
20
40
60
80
100
120
140
JunctionTemperature (_C)
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Si9185
Vishay Siliconix
TYPICAL WAVEFORMS
Load Transient Response-1
Load Transient Response-2
VOUT
10 mV/div
VOUT
10 mV/div
ILOAD
100 mA/div
ILOAD
100 mA/div
5.00 ms/div
VIN = 4.3 V, CIN = 2.2 mF
VOUT = 3.3 V, COUT = 2.2 mF
ILOAD = 1 to 150 mA
trise = 2 msec
5.00 ms/div
Load Transient Response-3
VIN = 4.3 V, CIN = 2.2 mF
VOUT = 3.3 V, COUT = 2.2 mF
ILOAD = 1 to 150 mA
trise = 2 msec
Load Transient Response-4
VOUT
10 mV/div
VOUT
10 mV/div
ILOAD
100 mA/div
ILOAD
100 mA/div
5.00 ms/div
VIN = 4.3 V, CIN = 2.2 mF
VOUT = 3.3 V, COUT = 1.0 mF
ILOAD = 1 to 150 mA
trise = 2 msec
5.00 ms/div
Load Transient Response-5
ILOAD
200 mA/div
ILOAD
200 mA/div
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Load Transient Respons-6
VOUT
20 mV/div
VOUT
20 mV/div
10 ms/div
VIN = 4.3 V, CIN = 2.2 mF
VOUT = 3.3 V, COUT = 1.0 mF
ILOAD = 1 to 150 mA
trise = 2 msec
VIN = 4.3 V, CIN = 10 mF
VOUT = 3.3 V, COUT = 10 mF
ILOAD = 1 to 500 mA
trise = 2 msec
10 ms/div
VIN = 4.3 V, CIN = 10 mF
VOUT = 3.3 V, COUT = 10 mF
ILOAD = 1 to 500 mA
trise = 2 msec
Document Number: 71765
S-20641—Rev. B, 06-May-02
Si9185
Vishay Siliconix
TYPICAL WAVEFORMS
Line Transient Response-1
Line Transient Respons-2
VOUT
1 V/div
VIN
2 V/div
VOUT
10 mV/div
5.00 ms/div
5.00 ms/div
VINSTEP = 4.3 to 5.3 V
VOUT = 3.3 V
COUT = 2.2 mF
CIN = 10 mF
ILOAD = 500 mA
trise = 5 msec
Turn-On Sequence
VINSTEP = 5.3 to 4.3 V
VOUT = 3.3 V
COUT = 2.2 mF
CIN = 10 mF
ILOAD = 500 mA
tfall = 5 msec
Turn-Off Sequence
VIN
CH-3 2 V/div
VIN 2 V/div
VOUT
CH-1 2 V/div
VOUT 2 V/div
Cdelay
CH-4 2 V/div
Cdelay 2 V/div
ERROR 2 V/div
10.00 ms/div
ERROR
CH-2 2 V/div
5.00 ms/div
VIN = 4.2 V
VOUT = 3.3 V
Cdelay = 0.1 mF
CNOISE = 0.1 mF
ILOAD = 350 mA
Output Noise
VIN = 4.2 V
VOUT = 3.3 V
Cdelay = 0.1 mF
CNOISE = 0.1 mF
ILOAD = 350 mA
Noise Spectrum
10.0
mVń ǸHz
500 mV/div
0.01
1 ms/div
Document Number: 71765
S-20641—Rev. B, 06-May-02
VIN = 4.2 V
VOUT = 3.3 V
IOUT = 150 mA
CNOISE = 0.1 mF
BW = 10 Hz to 1 MHz
100 Hz
VIN = 4.1 V
VOUT = 3.3 V/10 mA
CNOISE = 0.1 mF
1 MHz
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Si9185
Vishay Siliconix
BLOCK DIAGRAM
VIN
SENSE
CNOISE
6
1
4
8
SD
+
–
RFB2
To VIN
60 mV
6 MW
RFB1
5
VOUT
2 mA
+
2
+
–
DELAY
7
ERROR
+
3
1.215 V
VREF
–
+
–
GND
FIGURE 5.
DETAILED DESCRIPTION
The Si9185 is a low drop out, low quiescent current, and very
linear regulator family with very fast transient response. It is
primarily designed for battery powered applications where
battery run time is at a premium. The low quiescent current
allows extended standby time while low drop out voltage
enables the system to fully utilize battery power before
recharge. The Si9185 is a very fast regulator with bandwidth
exceeding 50 kHz while maintaining low quiescent current at
light load conditions. With this bandwidth, the Si9185 is the
fastest LDO available today. The Si9185 is stable with any
output capacitor type from 1 mF to 10.0 mF. However, X5R or
X7R ceramic capacitors are recommended for best output
noise and transient performance.
VIN
VIN is the input supply pin. The bypass capacitor for this pin
is not critical as long as the input supply has low enough source
impedance. For practical circuits, a 1.0-mF or larger ceramic
capacitor is recommended. When the source impedance is
not low enough and/or the source is several inches from the
Si9185, then a larger input bypass capacitor is needed. It is
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10
required that the equivalent impedance (source impedance,
wire, and trace impedance in parallel with input bypass
capacitor impedance) must be smaller than the input
impedance of the Si9185 for stable operation. When the
source impedance, wire, and trace impedance are unknown,
it is recommended that an input bypass capacitor be used of
a value that is equal to or greater than the output capacitor.
VOUT
VOUT is the output voltage of the regulator. Connect a bypass
capacitor from VOUT to ground. The output capacitor can be
any value from 1.0 mF to 10.0 mF. A ceramic capacitor with
X5R or X7R dielectric type is recommended for best output
noise, line transient, and load transient performance.
GND
Ground is the common ground connection for VIN and VOUT.
It is also the local ground connection for CNOISE, DELAY,
SENSE or ADJ, and SD.
Document Number: 71765
S-20641—Rev. B, 06-May-02
Si9185
Vishay Siliconix
SENSE or ADJ
Safe Operating Area
SENSE is used to sense the output voltage. Connect SENSE
to VOUT for the fixed voltage version. For the adjustable output
version, use a resistor divider R1 and R2, connect R1 from
VOUT to ADJ and R2 from ADJ to ground. R2 should be in the
25-kW to 150-kW range for low power consumption, while
maintaining adequate noise immunity.
The ability of the Si9185 to supply current is ultimately
dependent on the junction temperature of the pass device.
Junction temperature is in turn dependent on power
dissipation in the pass device, the thermal resistance of the
package and the circuit board, and the ambient temperature.
The power dissipation is defined as
PD = (VIN – VOUT) * IOUT .
The formula below calculates the value of R1, given the
desired output voltage and the R2 value,
R1 +
Junction temperature is defined as
TJ = TA + ((PD * (RθJC + RθCA)).
ǒV OUT * VADJǓR2
VADJ
VADJ is nominally 1.215 V.
(1)
SHUTDOWN (SD)
To calculate the limits of performance, these equations must
be rewritten.
Allowable power dissipation is calculated using the equation
SD controls the turning on and off of the Si9185. VOUT is
guaranteed to be on when the SD pin voltage equals or is
greater than 1.5 V. VOUT is guaranteed to be off when theSD
pin voltage equals or is less than 0.4 V. During shutdown
mode, the Si9185 will draw less than 2-mA current from the
source. To automatically turn on VOUT whenever the input is
applied, tie the SD pin to VIN.
PD = (TJ – TA )/ (RθJC + RθCA)
While allowable output current is calculated using the equation
IOUT = (TJ – TA )/ (RθJC + RθCA) * (VIN – VOUT).
Ratings of the Si9185 that must be observed are
TJmax = 125 _C, TAmax = 85 _C, (VIN – VOUT)max = 5.3 V, RθJC
= 4 _C/W.
ERROR
ERROR is an open drain output that goes low when VOUT is
less than 5% of its normal value. As with any open drain output,
an external pull up resistor is needed. When a capacitor is
connected from DELAY to GROUND, the error signal transition
from low to high is delayed (see Delay section). This delayed
error signal can be used as the power-on reset signal for the
application system. (Refer to Figure 4.)
The value of RθCA is dependent on the PC board used. The
value of RθCA for the board used in device characterization is
approximately 46 _C/W.
Figure 6 shows the performance limits graphically for the
Si9185 mounted on the circuit board used for thermal
characterization.
The ERROR pin is disconnected if not used.
0.6
DELAY
0.5
Tdelay +
ǒVADJǓCdelay
Idelay
(2)
TA = 0_C
0.4
I OUT (A)
A capacitor from DELAY to GROUND sets the time delay for
ERROR going from low to high state. The time delay can be
calculated using the following formula:
TA = 25_C
0.3
TA = 50_C
0.2
TA = 70_C
TA = 85_C
The DELAY pin should be an open circuit if not used.
0.1
(VIN – VOUT)MAX = 5.3 V
CNOISE
0.0
0
For low noise application, connect a high frequency ceramic
capacitor from CNOISE to ground. A 0.01-mF or a 0.1-mF X5R
or X7R is recommended.
Document Number: 71765
S-20641—Rev. B, 06-May-02
1
2
3
4
5
6
VIN – VOUT (V)
Figure 6.
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11
Si9185
Vishay Siliconix
PCB Footprint and Layout Considerations
The Si9185 comes in the MLP33 PowerPAK package with an
exposed pad on the bottom to provide a low thermal
impedance path into the PC board. When the PC board layout
is designed, a copper plane, referred to as spreading copper,
is recommended to be placed under the package to which the
exposed pad is soldered. This spreading copper is the path for
the heat to move away from the package into the PC board.
With the Si9185 mounted on a four layer board measuring 2”
2”, a spreading copper area of 0.25 square inches will yield an
Rqja of 50_C/W. This allows for power dissipation in excess of
1 watt in an 80_C ambient environment.
1.425
0.056
0.906
0.026
0.650
0.026
0.325
0.013
2.245
0.088
0.396
0.016
1.426
0.056
mm
inches
2.852
0.112
Figure 7. MLP33 PowerPAK Pad Pattern
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12
Document Number: 71765
S-20641—Rev. B, 06-May-02