SN54HC4060, SN74HC4060 14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS SCLS161B – DECEMBER 1982 – REVISED MAY 1997 Allow Design of Either RC or Crystal Oscillator Circuits Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs D SN54HC4060 . . . J OR W PACKAGE SN74HC4060 . . . D OR N PACKAGE (TOP VIEW) QL QM QN QF QE QG QD GND description The SN54HC4060 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74HC4060 is characterized for operation from –40°C to 85°C. 3 7 5 4 1 + 6 14 CT 13 9 CT=0 11 15 1 2 13 CLKI 3 10 & 11 3 14 4 13 5 12 6 11 7 10 8 9 VCC QJ QH QI CLR CLKI CLKO CLKO QN QF NC QE QG 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 QH QI NC CLR CLKI QD GND NC CLKO CLKO RCTR14 12 15 SN54HC4060 . . . FK PACKAGE (TOP VIEW) logic symbol† CLR 16 2 QM QL The ’HC4060 consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal-oscillator circuits. A high-to-low transition on the clock (CLKI) input increments the counter. A high level at the clear (CLR) input disables the oscillator (CLKO goes high and CLKO goes low) and resets the counter to zero (all Q outputs low). 1 NC VCC QJ D Z1 9 QD NC – No internal connection QE QF QG QH QI QJ QL QM QN CLKO CLKO † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, N, and W packages. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54HC4060, SN74HC4060 14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS SCLS161B – DECEMBER 1982 – REVISED MAY 1997 logic diagram (positive logic) R R T CLR R T R T 4 6 QF QG R T 14 R T 13 QH T R T 15 QI QJ R T T 1 2 3 QL QM QN 12 R R T 9 CLKI R 11 10 R T R T R T T CLKO CLKO Pin numbers shown are for the D, J, N, and W packages. 7 5 QD QE absolute maximum ratings over operating free-air temperature range† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54HC4060, SN74HC4060 14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS SCLS161B – DECEMBER 1982 – REVISED MAY 1997 recommended operating conditions SN54HC4060 VCC VIH Supply voltage VCC = 2 V VCC = 4.5 V High-level input voltage VCC = 6 V VCC = 2 V VIL VI VO Low-level input voltage Input voltage Output voltage Input transition (rise and fall) time TA Operating free-air temperature NOM MAX 2 5 6 VCC = 2 V VCC = 4.5 V VCC = 6 V MIN NOM MAX 2 5 6 1.5 1.5 3.15 3.15 4.2 VCC = 4.5 V VCC = 6 V tt SN74HC4060 MIN UNIT V V 4.2 0 0.5 0 0.5 0 1.35 0 1.35 0 1.8 0 1.8 0 0 0 VCC VCC 0 VCC VCC 0 1000 0 1000 0 500 0 500 0 400 0 400 –55 125 –40 85 V V V ns °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = 25°C TYP MAX SN54HC4060 MIN MAX SN74HC4060 MIN MAX UNIT 2V 1.9 1.998 1.9 1.9 IOH = –20 µA 4.5 V 4.4 4.499 4.4 4.4 6V 5.9 5.999 5.9 5.9 Q outputs VI = VIH or VIL IOH = –4 mA IOH = –5.2 mA 4.5 V 3.98 4.3 3.7 3.84 6V 5.48 5.8 5.2 5.34 2V 0.002 0.1 0.1 0.1 All outputs VI = VIH or VIL IOL = 20 µA 4.5 V 0.001 0.1 0.1 0.1 6V 0.001 0.1 0.1 0.1 4.5 V 0.17 0.26 0.4 0.33 6V 0.15 0.26 0.4 0.33 6V ±0.1 ±100 ±1000 ±1000 nA 8 160 80 µA 3 10 10 10 pF VOH VOL Q outputs Ci MIN VI = VIH or VIL All outputs II ICC VCC VI = VIH or VIL VI = VCC or 0 VI = VCC or 0, IOL = 4 mA IOL = 5.2 mA IO = 0 6V 2 V to 6 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V V 3 SN54HC4060, SN74HC4060 14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS SCLS161B – DECEMBER 1982 – REVISED MAY 1997 timing requirements over recommended operating free-air temperature range (unless otherwise noted) VCC fclock Clock frequency CLKI high or low tw Pulse duration CLR high Setup time, CLR inactive before CLKI↓ ↓ tsu TA = 25°C MIN MAX SN54HC4060 SN74HC4060 MIN MAX MIN MAX 2V 0 5.5 0 3.7 0 4.3 4.5 V 0 28 0 19 0 22 6V 0 33 0 22 0 25 2V 90 135 115 4.5 V 18 27 23 6V 15 23 20 2V 90 135 115 4.5 V 18 27 23 6V 15 23 20 2V 160 240 200 4.5 V 32 48 40 6V 27 41 34 UNIT MHz ns ns switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax tpd CLKI tPHL CLR tt QD Any Q Any VCC TA = 25°C MIN TYP MAX SN54HC4060 MIN MAX SN74HC4060 MIN 2V 5.5 10 3.7 4.3 4.5 V 28 45 19 22 6V 33 53 22 MAX UNIT MHz 25 2V 240 490 735 615 4.5 V 58 98 147 123 6V 42 83 125 105 2V 66 140 210 175 4.5 V 18 28 42 35 6V 14 24 36 30 2V 28 75 110 95 4.5 V 8 15 22 19 6V 6 30 19 16 ns ns ns operating characteristics, TA = 25°C PARAMETER Cpd 4 TEST CONDITIONS Power dissipation capacitance No load POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYP 88 UNIT pF SN54HC4060, SN74HC4060 14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS SCLS161B – DECEMBER 1982 – REVISED MAY 1997 PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point Reference Input 0V CL = 50 pF (see Note A) tsu Data Input LOAD CIRCUIT Input 50% 0V tPLH In-Phase Output 90% 50% 10% 90% tPHL 90% VCC 50% 10% 0 V 90% tr tf VOLTAGE WAVEFORMS SETUP AND INPUT RISE AND FALL TIMES tPHL 90% tr Out-of-Phase Output 50% 10% VCC 50% VCC 50% VOH 50% 10% VOL tf tf 50% 10% 50% 50% 0V tPLH 50% 10% VCC High-Level Pulse VOH 90% VOL tr tw VCC Low-Level Pulse VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES 50% 50% 0V VOLTAGE WAVEFORMS PULSE DURATIONS NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. For clock inputs, fmax is measured when the input duty cycle is 50%. D. The outputs are measured one at a time with one input transition per measurement. E. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54HC4060, SN74HC4060 14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS SCLS161B – DECEMBER 1982 – REVISED MAY 1997 CONNECTING AN RC OSCILLATOR CIRCUIT TO THE ’HC4060 The ’HC4060 consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal-oscillator circuits. When an RC oscillator circuit is implemented, two resistors and a capacitor are required. The components are attached to the terminals as shown below: 1 2 16 15 3 4 14 13 5 6 12 11 7 10 8 9 R2 R1 C To determine the values of capacitance and resistance necessary to obtain a specific oscillator frequency (f), use this formula: f + 2(R1)(C)ǒ 1 0.405 R2 R1 R2 ) ) 0.693Ǔ If R2 > > R1 (i.e., R2 = 10R1), the above formula simplifies to: f 6 + 0.455 RC POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated