MOTOROLA SN54LS251

SN54/74LS251
8-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
The TTL/MSI SN74LS251 is a high speed 8-Input Digital Multiplexer. It
provides, in one package, the ability to select one bit of data from up to eight
sources. The LS251 can be used as a universal function generator to
generate any logic function of four variables. Both assertion and negation
outputs are provided.
•
•
•
•
•
8-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
LOW POWER SCHOTTKY
Schottky Process for High Speed
Multifunction Capability
On-Chip Select Logic Decoding
Inverting and Non-Inverting 3-State Outputs
Input Clamp Diodes Limit High Speed Termination Effects
J SUFFIX
CERAMIC
CASE 620-09
CONNECTION DIAGRAM DIP (TOP VIEW)
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
PIN NAMES
16
LOADING (Note a)
Select Inputs
Output Enable (Active LOW) Inputs
Multiplexer Inputs
Multiplexer Output
Complementary Multiplexer Output
1
LOW
HIGH
S0–S2
E0
I0–I7
Z
Z
0.5 U.L.
0.5 U.L.
0.5 U.L.
65 U.L.
65 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
15 U.L.
15 U.L.
ORDERING INFORMATION
SN54LSXXXJ
Ceramic
SN74LSXXXN Plastic
SN74LSXXXDW SOIC
NOTES:
a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
LOGIC DIAGRAM
D SUFFIX
SOIC
CASE 751B-03
FAST AND LS TTL DATA
5-410
SN54/74LS251
FUNCTIONAL DESCRIPTION
The LS251 is a logical implementation of a single pole,
8-position switch with the switch position controlled by the
state of three Select inputs, S0, S 1, S2. Both assertion and
negation outputs are provided. The Output Enable input (EO)
is active LOW. When it is activated, the logic function provided
at the output is:
Z = EO ⋅ (I0 ⋅ S0 ⋅ S1 ⋅ S2 + I1 ⋅ S0 ⋅ S1 ⋅ S2 + I2 ⋅ S0 ⋅ S1 ⋅
Z = EO ⋅ S2 + I3 ⋅ S0 ⋅ S1⋅ S2 + I4 ⋅ S0 ⋅ S1 ⋅ S2 + I5 ⋅ S0 ⋅
Z = EO ⋅ S1 ⋅ S2 + I6 ⋅ S0 ⋅ S1 ⋅ S2 + I7 ⋅ S0 ⋅ S1 ⋅ S2).
When the Output Enable is HIGH, both outputs are in the
high impedance (high Z) state. This feature allows multiplexer
expansion by tying the outputs of up to 128 devices together.
When the outputs of the 3-state devices are tied together, all
but one device must be in the high impedance state to avoid
high currents that would exceed the maximum ratings. The
Output Enable signals should be designed to ensure there is
no overlap in the active LOW portion of the enable voltage.
TRUTH TABLE
E0
S2
S1
S0
I0
I1
I2
I3
I4
I5
I6
I7
Z
Z
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
H
(Z)
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
(Z)
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
(Z) = High impedance (Off)
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
4.75
5.0
5.25
V
0
25
70
°C
VCC
Supply Voltage
TA
Operating Ambient Temperature Range
IOH
Output Current — High
– 2.6
mA
IOL
Output Current — Low
24
mA
FAST AND LS TTL DATA
5-411
SN54/74LS251
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Min
Parameter
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIK
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
IOZH
Typ
Max
Unit
2.0
0.8
– 0.65
2.4
– 1.5
3.1
Test Conditions
V
Guaranteed Input HIGH Voltage for
All Inputs
V
Guaranteed Input LOW Voltage for
All Inputs
V
VCC = MIN, IIN = – 18 mA
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
0.25
0.4
V
IOL = 12 mA
0.35
0.5
V
IOL = 24 mA
Output Off Current HIGH
20
µA
VCC = MAX, VOUT = 2.7 V
IOZL
Output Off Current LOW
– 20
µA
VCC = MAX, VOUT = 0.4 V
20
IIH
Input HIGH Current
µA
VCC = MAX, VIN = 2.7 V
0.1
mA
VCC = MAX, VIN = 7.0 V
IIL
Input LOW Current
IOS
Short Circuit Current (Note 1)
ICC
Power Supply Current
– 30
– 0.4
mA
VCC = MAX, VIN = 0.4 V
– 130
mA
VCC = MAX
10
mA
VCC = MAX, VE = 0 V
12
mA
VCC = MAX, VE = 4.5 V
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
tPLH
tPHL
Propagation Delay,
Select to Z Output
20
21
33
33
ns
Figure 1
tPLH
tPHL
Propagation Delay,
Select to Z Output
29
28
45
45
ns
Figure 2
tPLH
tPHL
Propagation Delay,
Data to Z Output
10
9.0
15
15
ns
Figure 1
tPLH
tPHL
Propagation Delay,
Data to Z Output
17
18
28
28
ns
Figures 2
tPZH
tPZL
Output Enable Time
to Z Output
17
24
27
40
ns
Figures 4, 5
tPZH
tPZL
Output Enable Time
to Z Output
30
26
45
40
ns
Figures 3, 5
tPHZ
tPLZ
Output Disable Time
to Z Output
37
15
55
25
ns
Figures 3, 5
tPHZ
tPLZ
Output Disable Time
to Z Output
30
15
45
25
ns
Figures 4, 5
FAST AND LS TTL DATA
5-412
CL = 15 pF,
RL = 2.0 kΩ
CL = 5.0 pF,
RL = 667 kΩ
SN54/74LS251
3-STATE AC WAVEFORMS
Figure 2
Figure 1
≈ ≥ ≈ Figure 3
Figure 4
AC LOAD CIRCUIT
SWITCH POSITIONS
SYMBOL
Ω
* Includes Jig and Probe Capacitance.
Figure 5
FAST AND LS TTL DATA
5-413
SW1
SW2
tPZH
Open
Closed
tPZL
Closed
Open
tPLZ
Closed
Closed
tPHZ
Closed
Closed
Case 751B-03 D Suffix
16-Pin Plastic
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FAST AND LS TTL DATA
5-414
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◊
FAST AND LS TTL DATA
5-415