SN54/74LS153 DUAL 4-INPUT MULTIPLEXER The LSTTL / MSI SN54 / 74LS153 is a very high speed Dual 4-Input Multiplexer with common select inputs and individual enable inputs for each section. It can select two bits of data from four sources. The two buffered outputs present data in the true (non-inverted) form. In addition to multiplexer operation, the LS153 can generate any two functions of three variables. The LS153 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families. • • • • DUAL 4-INPUT MULTIPLEXER Multifunction Capability Non-Inverting Outputs Separate Enable for Each Multiplexer Input Clamp Diodes Limit High Speed Termination Effects LOW POWER SCHOTTKY CONNECTION DIAGRAM DIP (TOP VIEW) J SUFFIX CERAMIC CASE 620-09 16 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 N SUFFIX PLASTIC CASE 648-08 16 1 PIN NAMES LOADING (Note a) Common Select Input Enable (Active LOW) Input Multiplexer Inputs Multiplexer Output (Note b) S0 E I0, I1 Z HIGH LOW 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. 16 1 NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD LOGIC DIAGRAM LOGIC SYMBOL Ceramic Plastic SOIC D SUFFIX SOIC CASE 751B-03 FAST AND LS TTL DATA 5-257 SN54/74LS153 FUNCTIONAL DESCRIPTION Za = Ea ⋅ (I0a ⋅ S1 ⋅ S0 + I1a ⋅ S1 ⋅ S0 + I2a ⋅ S1 ⋅ S0 + I3a ⋅ S1 ⋅ S0) The LS153 is a Dual 4-input Multiplexer fabricated with Low Power, Schottky barrier diode process for high speed. It can select two bits of data from up to four sources under the control of the common Select Inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW Enables (Ea, E b) which can be used to strobe the outputs independently. When the Enables (Ea, Eb) are HIGH, the corresponding outputs (Za, Zb) are forced LOW. The LS153 is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the two Select Inputs. The logic equations for the outputs are shown below. Zb = Eb ⋅ (I0b ⋅ S1 ⋅ S0 + I1b ⋅ S1 ⋅ S0 + I2b ⋅ S1 ⋅ S0 + I3b ⋅ S1 ⋅ S0) The LS153 can be used to move data from a group of registers to a common output bus. The particular register from which the data came would be determined by the state of the Select Inputs. A less obvious application is a function generator. The LS153 can generate two functions of three variables. This is useful for implementing highly irregular random logic. TRUTH TABLE SELECT INPUTS INPUTS (a or b) OUTPUT S0 S1 E I0 I1 I2 I3 Z X L L H H L L H H X L L L L H H H H H L L L L L L L L X L H X X X X X X X X X L H X X X X X X X X X L H X X X X X X X X X L H L L H L H L H L H H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage 54 74 4.5 4.75 5.0 5.0 5.5 5.25 V TA Operating Ambient Temperature Range 54 74 – 55 0 25 25 125 70 °C IOH Output Current — High 54, 74 – 0.4 mA IOL Output Current — Low 54 74 4.0 8.0 mA FAST AND LS TTL DATA 5-258 SN54/74LS153 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage Min Typ Max Unit 2.0 54 VOL Output LOW Voltage IIH Input HIGH Current IIL Input LOW Current IOS Short Circuit Current (Note 1) ICC Power Supply Current V Guaranteed Input LOW Voltage for All Inputs 0.8 – 0.65 Output HIGH Voltage V 0.7 74 VOH Test Conditions Guaranteed Input HIGH Voltage for All Inputs V VCC = MIN, IIN = – 18 mA 54 2.5 3.5 – 1.5 V 74 2.7 3.5 V VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table VCC = VCC MIN, VIN = VIL or VIH per Truth Table 54, 74 0.25 0.4 V IOL = 4.0 mA 74 0.35 0.5 V IOL = 8.0 mA 20 µA VCC = MAX, VIN = 2.7 V 0.1 mA VCC = MAX, VIN = 7.0 V – 0.4 mA VCC = MAX, VIN = 0.4 V – 100 mA VCC = MAX 10 mA VCC = MAX – 20 Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C) Limits Symbol Parameter Min Typ Max Unit Test Conditions tPLH tPHL Propagation Delay Data to Output 10 17 15 26 ns Figure 2 tPLH tPHL Propagation Delay Select to Output 19 25 29 38 ns Figure 1 tPLH tPHL Propagation Delay Enable to Output 16 21 24 32 ns Figure 2 VCC = 5.0 V CL = 15 pF AC WAVEFORMS Figure 1 Figure 2 FAST AND LS TTL DATA 5-259 Case 751B-03 D Suffix 16-Pin Plastic SO-16 -A- "! ! " " ! " # 1 %# ) ! !" $ !" 8 C -T- D M K " ! #! J F ! Case 648-08 N Suffix 16-Pin Plastic R X 45° G " ! ) #! P ! " " 9 -B- ! 16 & ! ! ° ° ° ° ( ( ( ( "! ! " " ! ! ' " " ! ' ! " # & -A- 16 9 1 8 ! ! $ ! B # ) " ! " # ) !" $ !" ) F L C S -T- K H G M J D " Case 620-09 J Suffix 16-Pin Ceramic Dual In-Line -A- ! ! ! ! ° ° ° ° "! ! " 16 " ) " L K M N J G D " $ " $ ! " " ! ! FAST AND LS TTL DATA 5-260 & # ) !" $ !" ) -T $ " " C F & 8 E ! ! ! " " -B1 & 9 * * ! ! ! ! * * ! ° ° ! ° ° Motorola reserves the right to make changes without further notice to any products herein. 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ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. ◊ FAST AND LS TTL DATA 5-261