SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 D Auto-powerdown Plus D Operate With 3-V to 5.5-V VCC Supply D Always-Active Noninverting Receiver D D D D D D D DB, DW, OR PW PACKAGE (TOP VIEW) C2 + GND C2− V− DOUT1 DOUT2 DOUT3 RIN1 RIN2 DOUT4 RIN3 DOUT5 FORCEON FORCEOFF Output (ROUT1B) Support Operation From 250 kbit/s to 1 Mbit/s Low Standby Current . . . 1 µA Typ External Capacitors . . . 4 × 0.1 µF Accept 5-V Logic Input With 3.3-V Supply Inter-Operable With SN65C3243, SN75C3243 RS-232 Bus-Pin ESD Protection Exceeds ±15-kV Using Human-Body Model (HBM) Applications − Battery-Powered Systems, PDAs, Notebooks, Sub-Notebooks, Laptops, Palmtop PCs, Hand-Held Equipment, Modems, and Printers 1 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 C1+ V+ VCC C1− DIN1 DIN2 DIN3 ROUT1 ROUT2 DIN4 ROUT3 DIN5 ROUT1B INVALID description/ordering information The ’C3238 devices consist of five line drivers, three line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. In addition, these devices include an always-active noninverting output (ROUT1B), which allows applications using the ring indicator to transmit data while the device is powered down. These devices operate at data signaling rates up to 1 Mbit/s and at an increased slew-rate range of 24 V/µs to 150 V/µs. ORDERING INFORMATION SOIC (DW) −0°C 70°C −0 C to 70 C SSOP (DB) TSSOP (PW) SOIC (DW) −40°C 85°C −40 C to 85 C ORDERABLE PART NUMBER PACKAGE† TA SSOP (DB) TSSOP (PW) Tube of 20 SN75C3238DW Reel of 1000 SN75C3238DWR Reel of 2000 SN75C3238DBR Tube of 50 SN75C3238PW Reel of 2000 SN75C3238PWR Tube of 20 SN65C3238DW Reel of 1000 SN65C3238DWR Reel of 2000 SN65C3238DBR Tube of 50 SN65C3238PW Reel of 2000 SN65C3238PWR TOP-SIDE MARKING 75C3238 75C3238 CA3238 65C3238 65C3238 CB3238 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated !"#$%! & '("")% $& ! *(+,'$%! -$%) "!-('%& '!!"# %! &*)''$%!& *)" %.) %)"#& ! )/$& &%"(#)%& &%$-$"- 0$""$%1 "!-('%! *"!')&&2 -!)& !% )')&&$",1 ',(-) %)&%2 ! $,, *$"$#)%)"& POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 description/ordering information (continued) Flexible control options for power management are featured when the serial-port and driver inputs are inactive. The auto-powerdown plus feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if the device does not sense valid signal transitions on all receiver and driver inputs for 30 s, the built-in charge-pump and drivers are powered down, reducing the supply current to 1 µA. By disconnecting the serial port or placing the peripheral drivers off, auto-powerdown plus will occur if there is no activity in the logic levels for the driver inputs. Auto-powerdown plus can be disabled when FORCEON and FORCEOFF are high. With auto-powerdown plus enabled, the device automatically activates once a valid signal is applied to any receiver or driver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than −2.7 V or has been between −0.3 V and 0.3 V for less than 30 µs. INVALID is low (invalid data) if all receiver input voltages are between −0.3 V and 0.3 V for more than 30 µs. Refer to Figure 5 for receiver input levels. Function Tables EACH DRIVER INPUTS OUTPUT DRIVER STATUS DIN FORCEON FORCEOFF TIME ELAPSED SINCE LAST RIN OR DIN TRANSITION X X L X Z Powered off Normal operation with auto-powerdown plus disabled DOUT L H H X H H H H X L L L H <30 s H H L H <30 s L L L H >30 s Z H L H >30 s Z Normal operation with auto-powerdown plus enabled Powered off by auto-powerdown plus feature H = high level, L = low level, X = irrelevant, Z = high impedance EACH RECEIVER INPUTS OUTPUTS RIN2 RIN1, RIN3−RIN5 FORCEOFF TIME ELAPSED SINCE LAST RIN OR DIN TRANSITION L X L H X L L L L H H L ROUT1B ROUT X L Z X H Z H <30 s L H H <30 s L L H <30 s H H H H H <30 s H L Open Open H >30 s L H RECEIVER STATUS Powered off while ROUT1B is active Normal operation with auto-powerdown plus disabled/enabled H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 logic diagram (positive logic) DIN1 DIN2 DIN3 DIN4 DIN5 FORCEOFF FORCEON ROUT1B ROUT1 ROUT2 ROUT3 24 5 23 6 22 7 19 10 17 12 DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 14 13 Auto-powerdown Plus 15 INVALID 16 21 8 20 9 18 11 RIN1 RIN2 RIN3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Positive output supply voltage range, V+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V Negative output supply voltage range, V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to −7 V Supply voltage difference, V+ − V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V Input voltage range, VI: Driver (FORCEOFF, FORCEON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 V to 25 V Output voltage range, VO: Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 13.2 V to 13.2 V Receiver (INVALID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V Package thermal impedance, θJA (see Notes 2 and 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 62°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . 62°C/W Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to network GND. 2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4 and Figure 6) Supply voltage VIH Driver and control high-level input voltage DIN, FORCEOFF, FORCEON VIL VI Driver and control low-level input voltage DIN, FORCEOFF, FORCEON Driver and control input voltage DIN, FORCEOFF, FORCEON VI Receiver input voltage TA Operating free-air temperature MIN NOM MAX VCC = 3.3 V VCC = 5 V VCC = 3.3 V 3 3.3 3.6 4.5 5 5.5 VCC = 5 V 2.4 UNIT V 2 V 0.8 V 0 5.5 V V −25 25 SN75C3238 0 70 SN65C3238 −40 85 °C NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 6) PARAMETER II ICC Input leakage current Supply current TEST CONDITIONS FORCEOFF, FORCEON MIN TYP‡ MAX ±0.01 ±1 µA 0.5 2 mA Auto-powerdown plus disabled No load, FORCEOFF and FORCEON at VCC Powered off No load, FORCEOFF at GND 1 10 Auto-powerdown plus enabled No load, FORCEOFF at VCC, FORCEON at GND, All RIN are open or grounded 1 10 UNIT µA ‡ All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 6) PARAMETER TEST CONDITIONS MIN TYP† VOH VOL High-level output voltage All DOUT at RL = 3 kΩ to GND 5 5.4 Low-level output voltage All DOUT at RL = 3 kΩ to GND −5 −5.4 IIH IIL High-level input current VI = VCC VI at GND Low-level input current ±0.01 IOS Short-circuit output current‡ VCC = 3.6 V, VCC = 5.5 V, ro Output resistance VCC, V+, and V− = 0 V, VO = 0 V VO = 0 V VO = ±2 V VO = ±12 V, 300 MAX UNIT V V ±1 µA ±0.01 ±1 µA ±35 ±60 ±40 ±90 mA Ω 10M ±25 VCC = 3 V to 3.6 V µA VO = ±10 V, VCC = 4.5 V to 5.5 V ±25 † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. ‡ Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one output should be shorted at a time. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. Ioff Output leakage current FORCEOFF = GND switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 6) PARAMETER Maximum data rate (see Figure 1) TEST CONDITIONS kΩ RL = 3 kΩ, One DOUT switching MIN CL = 1000 pF CL = 250 pF, CL = 1000 pF, TYP† MAX UNIT 250 VCC = 3 V to 4.5 V VCC = 4.5 V to 5.5 V tsk(p) Pulse skew§ CL = 150 pF to 2500 pF, RL = 3 kΩ to 7 kΩ, See Figure 2 SR(tr) Slew rate, transition region (see Figure 1) CL = 150 pF to 1000 pF, RL = 3 kΩ to 7 kΩ, VCC = 3.3 V 1000 kbit/s 1000 25 18 ns 150 V/µs † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. § Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 RECEIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 6) PARAMETER VOH VOL MIN TYP† VCC − 0.6 V VCC − 0.1 V TEST CONDITIONS High-level output voltage IOH = −1 mA IOL = 1.6 mA Low-level output voltage VIT+ Positive-going input threshold voltage VCC = 3.3 V VCC = 5 V VIT− Negative-going input threshold voltage VCC = 3.3 V VCC = 5 V Vhys Ioff Input hysteresis (VIT+ − VIT−) MAX V 0.4 1.5 2.4 1.8 2.4 0.6 1.2 0.8 1.5 FORCEOFF = 0 V ±0.05 V V V 0.3 Output leakage current (except ROUT1B) UNIT V ±10 µA ri Input resistance VI = ±3 V to ±25 V 3 5 7 kΩ † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4) PARAMETER TEST CONDITIONS tPLH tPHL Propagation delay time, low- to high-level output ten tdis Output enable time Propagation delay time, high- to low-level output Output disable time Pulse skew‡ CL = 150 pF, See Figure 3 CL = 150 pF, RL = 3 kΩ, kΩ See Figure 4 MIN TYP† MAX UNIT 150 ns 150 ns 200 ns 200 ns tsk(p) See Figure 3 50 ns † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. ‡ Pulse skew is defined as |tPLH − tPHL| of each channel of the same device. NOTE 4: Testing supply conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.15 V; C1−C4 = 0.22 µF at VCC = 3.3 V ± 0.3 V; and C1 = 0.047 µF and C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 AUTO-POWERDOWN PLUS SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER TEST CONDITIONS TYP† MIN VT+(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC VT−(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC −2.7 VT(invalid) Receiver input threshold for INVALID low-level output voltage FORCEON = GND, FORCEOFF = VCC −0.3 VOH INVALID high-level output voltage IOH = −1 mA, FORCEON = GND, FORCEOFF = VCC VOL INVALID low-level output voltage IOL = 1.6 mA, FORCEON = GND, FORCEOFF = VCC MAX 2.7 UNIT V V 0.3 VCC − 0.6 V V 0.4 V † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER tvalid tinvalid MIN TYP† MAX UNIT Propagation delay time, low- to high-level output 0.1 µs Propagation delay time, high- to low-level output 50 µs 25 µs ten Supply enable time tdis Receiver or driver edge to auto-powerdown plus † All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. POST OFFICE BOX 655303 15 • DALLAS, TEXAS 75265 30 60 s 7 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 PARAMETER MEASUREMENT INFORMATION 3V Generator (see Note B) Input RS-232 Output 50 Ω RL tTHL CL (see Note A) 3V FORCEOFF TEST CIRCUIT 0V Output 6V SR(tr) + t THL or t TLH tTLH VOH 3V 3V −3 V −3 V VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 1 Mbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 1. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 1.5 V 1.5 V 0V CL (see Note A) tPHL tPLH VOH 3V FORCEOFF 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 1 Mbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 2. Driver Pulse Skew 3 V or 0 V FORCEON 3V Input 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω 3V FORCEOFF tPHL CL (see Note A) tPLH VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 3. Receiver Propagation Delay Times 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 PARAMETER MEASUREMENT INFORMATION 3V Input 3 V or 0 V FORCEON VCC S1 1.5 V GND 1.5 V 0V tPZH (S1 at GND) tPHZ (S1 at GND) RL VOH Output RS-232 Input 50% Output CL (see Note A) FORCEOFF Generator (see Note B) 50 Ω 0.3 V tPZL (S1 at VCC) tPLZ (S1 at VCC) 0.3 V Output 50% VOL TEST CIRCUIT NOTES: A. B. C. D. VOLTAGE WAVEFORMS CL includes probe and jig capacitance. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. tPLZ and tPHZ are the same as tdis. tPZL and tPZH are the same as ten. Figure 4. Receiver Enable and Disable Times POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 PARAMETER MEASUREMENT INFORMATION ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ Valid RS-232 Level, INVALID High ROUT Generator (see Note B) 2.7 V 50 Ω Indeterminate 0.3 V 0V −0.3 V Indeterminate Autopowerdown plus INVALID −2.7 V CL = 30 pF (see Note A) Valid RS-232 Level, INVALID High † Auto-powerdown plus disables drivers and reduces supply current to 1 µA. FORCEOFF FORCEON If Signal Remains Within This Region For More Than 30 µs, INVALID Is Low† DIN DOUT TEST CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 5 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Receiver Input 3V 2.7 V 0V 0V −2.7 V −3 V tinvalid tvalid INVALID Output Driver Input 50% VCC 50% 0V 3 V to 5 V 50% 50% 0V ≈5.5 V Driver Output ≈−5.5 V tdis ten tdis V+ V+ V+ −0.3 V Supply Voltages V− +0.3 V V− V− Voltage Waveforms and Timing Diagrams Figure 5. INVALID Propagation Delay Times and Supply Enabling Time 10 ten POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SLLS352F − JUNE 1999 − REVISED OCTOBER 2004 APPLICATION INFORMATION CBYPASS = 0.1 µF + − 1 2 + C2 V+ 28 27 + GND − − 3 4 + − C1+ C2+ C2− VCC V− C1− C4 DOUT1 DOUT2 DOUT3 RIN1 C3† + − 26 C1 25 5 24 6 23 7 22 8 21 9 20 DIN1 DIN2 DIN3 ROUT1 Serial Port RIN2 ROUT2 Logic I/Os 5 kΩ DOUT4 RIN3 10 19 11 18 DIN4 ROUT3 5 kΩ DOUT5 12 17 16 DIN5 ROUT1B 5 kΩ FORCEON FORCEOFF Autopowerdown Plus 13 14 15 INVALID † C3 can be connected to VCC or GND. NOTE A: Resistor values shown are nominal. VCC vs CAPACITOR VALUES VCC 3.3 V ± 0.15 V 3.3 V ± 0.3 V 5 V ± 0.5 V 3 V to 5.5 V C1 C2, C3, and C4 0.1 µF 0.22 µF 0.047 µ F 0.22 µF 0.1 µF 0.22 µF 0.33 µF 1 µF Figure 6. Typical Operating Circuit and Capacitor Values POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 PACKAGE OPTION ADDENDUM www.ti.com 28-May-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN65C3238DB PREVIEW SSOP DB 28 SN65C3238DBR ACTIVE SSOP DB SN65C3238DBRE4 ACTIVE SSOP SN65C3238DBRG4 ACTIVE SN65C3238DW 50 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238DWE4 ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238DWG4 ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238DWR ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238DWRE4 ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238DWRG4 ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238PW ACTIVE TSSOP PW 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238PWE4 ACTIVE TSSOP PW 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238PWG4 ACTIVE TSSOP PW 28 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238PWR ACTIVE TSSOP PW 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238PWRE4 ACTIVE TSSOP PW 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65C3238PWRG4 ACTIVE TSSOP PW 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75C3238DB PREVIEW SSOP DB 28 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75C3238DBR ACTIVE SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75C3238DBRE4 ACTIVE SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75C3238DBRG4 ACTIVE SSOP DB 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75C3238DW ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75C3238DWE4 ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75C3238DWG4 ACTIVE SOIC DW 28 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75C3238DWR ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75C3238DWRE4 ACTIVE SOIC DW 28 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 50 Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 28-May-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN75C3238DWRG4 ACTIVE SOIC DW 28 SN75C3238PW ACTIVE TSSOP PW 28 50 SN75C3238PWE4 ACTIVE TSSOP PW 28 SN75C3238PWG4 ACTIVE TSSOP PW 28 SN75C3238PWR ACTIVE TSSOP PW SN75C3238PWRE4 ACTIVE TSSOP SN75C3238PWRG4 ACTIVE TSSOP 1000 Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) CU NIPDAU Level-1-260C-UNLIM Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PW 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PW 28 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 16-Jul-2007 TAPE AND REEL INFORMATION Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com Device 16-Jul-2007 Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65C3238DBR DB 28 MLA 330 16 8.2 10.5 2.5 12 16 Q1 SN65C3238DWR DW 28 TAI 330 32 11.35 18.67 3.1 16 32 Q1 SN65C3238PWR PW 28 TAI 330 16 6.9 10.2 1.8 12 16 Q1 SN65C3238PWR PW 28 MLA 330 16 7.1 10.4 1.6 12 16 Q1 SN75C3238DBR DB 28 MLA 330 16 8.2 10.5 2.5 12 16 Q1 SN75C3238DWR DW 28 TAI 330 32 11.35 18.67 3.1 16 32 Q1 SN75C3238PWR PW 28 TAI 330 16 6.9 10.2 1.8 12 16 Q1 SN75C3238PWR PW 28 MLA 330 16 7.1 10.4 1.6 12 16 Q1 TAPE AND REEL BOX INFORMATION Device Package Pins Site Length (mm) Width (mm) Height (mm) SN65C3238DBR DB 28 MLA 346.0 346.0 33.0 SN65C3238DWR DW 28 TAI 346.0 346.0 49.0 SN65C3238PWR PW 28 TAI 346.0 346.0 33.0 SN65C3238PWR PW 28 MLA 346.0 346.0 33.0 SN75C3238DBR DB 28 MLA 346.0 346.0 33.0 SN75C3238DWR DW 28 TAI 346.0 346.0 49.0 SN75C3238PWR PW 28 TAI 346.0 346.0 33.0 SN75C3238PWR PW 28 MLA 346.0 346.0 33.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 16-Jul-2007 Pack Materials-Page 3 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. 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