TI SN75188

 SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004
D Meet or Exceed the Requirements of ANSI
D
D
D
D
D
SN55188 . . . J OR W PACKAGE
SN75188 . . . D, N, OR NS PACKAGE
MC1488 . . . N PACKAGE
(TOP VIEW)
TIA / EIA-232-E and ITU Recommendation
V.28
Current-Limited Output: 10 mA Typical
Power-Off Output Impedance: 300 Ω
Minimum
Slew Rate Control by Load Capacitor
Flexible Supply-Voltage Range
Input Compatible With Most TTL Circuits
VCC −
1A
1Y
2A
2B
2Y
GND
description/ordering information
The MC1488, SN55188, and SN75188 are
monolithic quadruple line drivers designed to
interface data terminal equipment with data
communications equipment in conformance with
ANSI TIA/EIA-232-E, using a diode in series with
each supply-voltage terminal as shown under
typical applications.
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC +
4B
4A
4Y
3B
3A
3Y
1A
VCC −
NC
V CC+
4B
SN55188 . . . FK PACKAGE
(TOP VIEW)
3
1Y
NC
2A
NC
2B
2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3B
2Y
GND
NC
3Y
3A
The SN55188 is characterized for operation over
the full military temperature range of − 55°C to
125°C. The MC1488 and SN75188 are
characterized for operation from 0°C to 70°C.
4
NC − No internal connection
ORDERING INFORMATION
PDIP (N)
0°C
0
C to 70
70°C
C
SOIC (D)
SOP (NS)
−55°C to 125°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
Tube of 25
MC1488N
MC1488N
Tube of 25
SN75188N
SN75188N
Tube of 50
SN75188D
Reel of 2500
SN75188DR
Reel of 2000
SN75188NSR
SN75188
SN55188J
SN55188J
SNJ55188J
SNJ55188J
SNJ55188W
SNJ55188W
CDIP (J)
Tube of 25
CFP (W)
Tube of 150
SN75188
LCCC (FK)
Tube of 55
SNJ55188FK
SNJ55188FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2004, Texas Instruments Incorporated
!"# $"%&! '#(
'"! ! $#!! $# )# # #* "#
'' +,( '"! $!#- '# #!#&, !&"'#
#- && $##(
$'"! !$& ./.00 && $## # ##'
"&# )#+# #'( && )# $'"! $'"!
$!#- '# #!#&, !&"'# #- && $##(
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004
FUNCTION TABLE
(drivers 2−4)
A
B
H
H
L
L
X
H
X
L
H
Y
H = high level, L = low level,
X = irrelevant
logic diagram (positive logic)
1A
2A
2B
3A
3B
4A
4B
3
2
4
6
5
9
8
10
12
11
13
1Y
2Y
3Y
4Y
Positive logic
Y = A (driver 1)
Y = AB or A + B (drivers 2 thru 4)
schematic (each driver)
To Other
Drivers
VCC +
8.2 kΩ
6.2 kΩ
A
Input(s)
B
70 Ω
300 Ω
3.6 kΩ
GND
To
Other
Drivers
10 kΩ
3.7 kΩ
VCC −
To Other Drivers
Resistor values shown are nominal.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
70 Ω
Output
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VCC + at (or below) 25°C free-air temperature (see Notes 1 and 2) . . . . . . . . . . . . . . . . . 15 V
Supply voltage, VCC − at (or below) 25°C free-air temperature (see Notes 1 and 2) . . . . . . . . . . . . . . . . −15 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V to 7 V
Output voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V to 15 V
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Package thermal impedance, θJA (see Notes 3 and 4): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Case temperature for 60 seconds, FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or W package . . . . . . . . . . . . . . . . 300°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. For operation above 25°C free-air temperature, refer to the maximum supply voltage curve, Figure 6. In the J package, SN55188
chips are alloy mounted.
3. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Selecting the maximum of 150°C can affect reliability.
4. The package thermal impedance is calculated in accordance with JESD 51-7.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25
25°C
C
POWER RATING
DERATING FACTOR
ABOVE TA = 25
25°C
C
TA = 70
70°C
C
POWER RATING
TA = 125
125°C
C
POWER RATING
FK
1375 mW
11.0 mW/°C
880 mW
275 mW
J
1375 mW
11.0 mW/°C
880 mW
275 mW
W
1000 mW
8.0 mW/°C
640 mW
200 mW
recommended operating conditions
SN55188
VCC + Supply voltage
VCC − Supply voltage
VIH
VIL
High-level input voltage
TA
Operating free-air temperature
MC1488, SN75188
NOM
MAX
MIN
NOM
MAX
7.5
9
15
7.5
9
15
V
−7.5
−9
−15
−7.5
−9
−15
V
1.9
Low-level input voltage
1.9
0.8
−55
POST OFFICE BOX 655303
UNIT
MIN
• DALLAS, TEXAS 75265
125
0
V
0.8
V
70
°C
3
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004
electrical characteristics over operating free-air temperature range, VCC ± = ±9 V (unless otherwise
noted)
PARAMETER
VOH
VOL
IIH
IIL
High-level output voltage
Low-level output voltage
VIL = 0.8 V,
RL = 3 kΩ
VIH = 1.9 V,
RL = 3 kΩ
MIN
SN55188
TYP†
MAX
MC1488, SN75188
MIN TYP†
MAX
VCC + = 9 V,
VCC − = − 9 V
6
7
6
7
VCC + = 13.2 V,
VCC − = − 13.2 V
9
10.5
9
10.5
UNIT
V
VCC + = 9 V,
VCC − = − 9 V
−7‡
−6
−7
−6
−10.5‡
−9
−10.5
−9
10
µA
−1
−1.6
−1
−1.6
mA
V
VCC + = 13.2 V,
VCC − = − 13.2 V
Low-level input current
VI = 5 V
VI = 0
IOS(H)
Short-circuit output
current at high level§
VI = 0.8 V,
VO = 0
−4.6
−9
−13.5
−6
−9
−12
mA
IOS(L)
Short-circuit output
current at low level§
VI = 1.9 V,
VO = 0
4.6
9
13.5
6
9
12
mA
ro
Output resistance,
power off
VCC + = 0,
VO = − 2 V to 2 V
VCC − = 0,
300
VCC + = 9 V,
No load
All inputs at 1.9 V
15
20
15
All inputs at 0.8 V
4.5
6
4.5
6
VCC + = 12 V,
No load
All inputs at 1.9 V
19
25
19
25
All inputs at 0.8 V
5.5
7
5.5
7
VCC + = 15 V,
No load, TA = 25°C
All inputs at 1.9 V
34
34
All inputs at 0.8 V
12
12
VCC − = − 9 V,
No load
All inputs at 1.9 V
VCC − = − 12 V,
No load
All inputs at 1.9 V
All inputs at 0.8 V
−0.5
−0.015
VCC − = − 15 V,
No load, TA = 25°C
All inputs at 1.9 V
−34
−34
All inputs at 0.8 V
−2.5
−2.5
VCC + = 9 V,
No load
VCC − = − 9 V,
333
333
VCC + = 12 V,
No load
VCC − = − 12 V,
576
576
ICC +
ICC −
PD
High-level input current
TEST CONDITIONS
Supply current from
VCC +
Supply current from ICC −
Total power dissipation
10
Ω
300
−13
All inputs at 0.8 V
−17
−13
−0.5
−18
−23
20
mA
−17
−0.015
−18
−23
mA
mW
† All typical values are at TA = 25°C.
‡ The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for logic voltage
levels only, e.g., if − 6 V is a maximum, the typical value is a more negative voltage.
§ Not more than one output should be shorted at a time.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004
switching characteristics, VCC± = ±9 V, TA = 25°C
PARAMETER
tPLH
tPHL
tTLH
tTHL
TEST CONDITIONS
MIN
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
Transition time, low- to high-level output†
RL = 3 kΩ,
See Figure 1
CL = 15 pF,
Transition time, high- to low-level output†
Transition time, low- to high-level output‡
tTLH
RL = 3 kΩ to 7 kΩ,
CL = 2500 pF,
See Figure 1
tTHL
Transition time, high- to low-level output‡
† Measured between 10% and 90% points of output waveform
‡ Measured between 3 V and − 3 V points on the output waveform (TIA / EIA-232-E conditions)
TYP
MAX
UNIT
220
350
ns
100
175
ns
55
100
ns
45
75
ns
2.5
µs
3.0
µs
PARAMETER MEASUREMENT INFORMATION
3V
Input
Input
1.5 V
1.5 V
tPHL
Pulse
Generator
(see Note A)
Output
RL
90%
Output
CL
(see Note B)
tTHL
TEST CIRCUIT
tPLH
50%
10%
50%
10%
90%
0V
VOH
VOL
tTLH
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tw = 0.5 µs, PRR ≤ 1 MHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 1. Test Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004
TYPICAL CHARACTERISTICS†
OUPUT CURRENT
vs
OUTPUT VOLTAGE
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VOLTAGE TRANSFER CHARACTERISTICS
12
9
16
VCC + = 9 V, VCC − = − 9 V
12
6
IOI −
O Output Current − mA
VO
VO − Output Voltage − V
20
VCC + = 12 V, VCC − = − 12 V
VCC + = 6 V, VCC − = − 6 V
3
0
−3
ÎÎÎ
ÎÎÎ
−6
−12
0
VCC + = 9 V
VCC − = − 9 V
TA = 25°C
8
4
0
−4
VOH(VI = 0.8 V)
−16
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
VI − Input Voltage − V
2
−20
−16
−12
16
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÎÎÎÎÎ
ÁÁÁÁ
ÎÎÎÎÎ
1000
VCC + = 9 V
VCC − = − 9 V
RL = ∞
TA = 25°C
IOS(L) (VI = 1.9 V)
6
3
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÁÁ
ÁÁ
0
VCC + = 9 V
VCC − = − 9 V
VO = 0
SR − Slew Rate − V/ µs
IIOS
OS − Short-Circuit Output Current − mA
12
SLEW RATE
vs
LOAD CAPACITANCE
12
100
10
−6
IOS(H) (VI = 0.8 V)
−9
−12
−100 −75 −50 −25
0
25
50
75 100 125 150
1
10
TA − Free-Air Temperature − °C
100
Figure 5
† Data for temperatures below 0°C and above 70°C are applicable to SN55188 circuit only.
POST OFFICE BOX 655303
1000
CL − Load Capacitance − pF
Figure 4
6
−8
−4
0
4
8
VO − Output Voltage − V
Figure 3
SHORT-CIRCUT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
−3
ÎÎÎÎ
ÎÎÎÎ
3-kΩ
Load Line
−8
Figure 2
9
VOL(VI = 1.9 V)
−12
RL = 3 kΩ
TA = 25°C
−9
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ ÎÎÎÎÎ
• DALLAS, TEXAS 75265
10000
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004
THERMAL INFORMATION†
MAXIMUM SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE
VCC − Maximum Supply Voltage − V
16
14
12
10
8
6
4
2
RL ≥ 3 kΩ (from each output to GND)
0
−75
−50
−25
0
25
50
75 100
TA − Free-Air Temperature − °C
125
Figure 6
† Data for temperatures below 0°C and above 70°C are applicable to the SN55188 circuit only.
APPLICATION INFORMATION
VCC + = 12 V
VCC − = − 12 V
Output to RTL
−0.7 V to 3.7 V
1/4 SN55188
or SN75188
Output
3V
Input From
TTL or DTL
Output to DTL
−0.7 V to 5.7 V
1/4 SN55188
or SN75188
VCC +
’188
VCC +
’188
± 15 V
VCC −
5V
VCC −
Output to HNIL
−0.7 V to 10 V
1/4 SN55188
or SN75188
Output to MOS
−10 V to 0 V
1 kΩ
1/4 SN55188
or SN75188
10 kΩ
−12 V
Figure 7. Logic Translator Applications
POST OFFICE BOX 655303
Diodes placed in series with the VCC+ and VCC − leads protect
the SN55188/SN75188 in the fault condition in which the device
outputs are shorted to ± 15 V, and the power supplies are at low
voltage and provide low-impedance paths to ground.
Figure 8. Power-Supply Protection to Meet
Power-Off Fault Conditions of
ANSI TIA / EIA-232-E
• DALLAS, TEXAS 75265
7
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-86889012A
ACTIVE
LCCC
FK
20
1
TBD
5962-8688901CA
ACTIVE
CDIP
J
14
1
TBD
5962-8688901DA
ACTIVE
CFP
W
14
1
MC1488N
ACTIVE
PDIP
N
14
25
MC1488NE4
ACTIVE
PDIP
N
14
25
SN55188J
ACTIVE
CDIP
J
14
SN75188D
ACTIVE
SOIC
D
SN75188DE4
ACTIVE
SOIC
SN75188DR
ACTIVE
SN75188DRE4
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
TBD
A42 SNPB
N / A for Pkg Type
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
1
TBD
A42 SNPB
N / A for Pkg Type
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75188N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75188NE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN75188NSR
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75188NSRE4
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SNJ55188FK
ACTIVE
LCCC
FK
20
1
TBD
SNJ55188J
ACTIVE
CDIP
J
14
1
TBD
A42 SNPB
N / A for Pkg Type
SNJ55188W
ACTIVE
CFP
W
14
1
TBD
A42 SNPB
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Low Power Wireless www.ti.com/lpw
Mailing Address:
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright  2006, Texas Instruments Incorporated