TI UA9636ACJG

uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
D
D
D
D
D
D
D OR P PACKAGE
(TOP VIEW)
Meets or Exceeds the Requirements of
ANSI Standards EIA/TIA-423-B and -232-E
and ITU Recommendations V.10 and V.28
Output Slew Rate Control
Output Short-Circuit-Current Limiting
Wide Supply Voltage Range
8-Pin Package
Designed to Be Interchangeable With
National DS9636A
W-S
1A
2A
GND
1
8
2
7
3
6
4
5
VCC+
1Y
2Y
VCC –
description
The uA9636AC is a dual, single-ended line driver designed to meet ANSI Standards EIA/TIA-423-B and
EIA/TIA-232-E and ITU Recommendations V.10 and V.28. The slew rates of both amplifiers are controlled by
a single external resistor, R(WS), connected between the wave-shape-control (W-S) terminal and GND. Output
current limiting is provided. Inputs are compatible with TTL and CMOS and are diode protected against negative
transients. This device operates from ± 12 V and is supplied in an 8-pin package.
The uA9636AC is characterized for operation from 0°C to 70°C.
logic symbol†
W-S
1
logic diagram
1A 2
[Slew-Rate]
W-S
1A
2A
2
7
3
6
1Y
2A
7
1Y
1
3
6
2Y
2Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
TYPICAL OF ALL OUTPUTS
VCC +
VCC +
Current
Source
Current
Source
Input
Output
VCC ±
VCC ±
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Positive supply voltage range, VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC – to 15 V
Negative supply voltage range, VCC – . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to – 15 V
Output voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 15 V
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 150 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to the network ground terminal.
DISSIPATION RATING TABLE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
D
725 mW
5.8 mW/°C
464 mW
P
1000 mW
8.0 mW/°C
640 mW
PACKAGE
recommended operating conditions
Positive supply voltage, VCC +
Negative supply voltage, VCC –
High-level input voltage, VIH
MIN
NOM
MAX
UNIT
10.8
12
13.2
V
– 10.8
– 12
– 13.2
V
2
Low-level input voltage, VIL
Wave-shaping resistor, R(WS)
Operating free-air temperature, TA
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
V
0.8
V
10
1000
kΩ
0
70
°C
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
electrical characteristics over recommended ranges of free-air temperature, supply voltage, and
wave-shaping resistance (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
Input clamp voltage
II = – 15 mA
VOH
High-level output voltage
VI = 0.8 V
VI = 2 V
High level input current
High-level
IIL
IO
Low-level input current
Output current (power off)
UNIT
– 1.5
V
5
5.6
6
5
5.6
6
4
– 6‡
5.4
6
– 5.7
–5
– 5.6
–5
– 5.4
–4
RL = 3 kΩ to GND
RL = 450 Ω to GND
IIH
MAX
– 1.1
RL = 3 kΩ to GND
RL = ∞
Low-level output voltage
TYP†
RL = ∞
RL = 450 Ω to GND
VOL
MIN
– 6‡
– 6‡
VI = 2.4 V
VI = 5.5 V
10
100
VI = 0.4 V
VCC ± = 0,
– 20
VO = ± 6 V
V
V
µA
– 80
µA
± 100
µA
IOS
Short circut output current§
Short-circut
VI = 2 V
VI = 0
15
25
150
– 15
– 40
– 150
rO
Output resistance
RL = 450 Ω
25
50
Ω
ICC +
Positive supply current
VCC = ± 12 V,,
R(WS) = 100 kΩ,
VI = 0,,
Output open
13
18
mA
ICC –
Negative supply current
VCC = ± 12 V,
R(WS) = 100 kΩ,
VI = 0,
Output open
– 13
– 18
mA
mA
† All typical values are at VCC = ± 12 V, TA = 25°C.
‡ The algebraic convention, in which the less-positive (more-negative) limit is designated as minimum, is used in this data sheet for logic voltage
levels, e.g., when – 5 V is the maximum, the minimum is a more-negative voltage.
§ Not more than one output should be shorted to ground at a time.
switching characteristics, VCC ± = ±12 V, TA = 25°C (see Figure 1)
PARAMETER
TEST CONDITIONS
R(WS) = 10 kΩ
tTLH
tTHL
Transition time,
time lowlow to high-level
high level output
Transition time,
time highhigh to low-level
low level output
RL = 450 kΩ
kΩ,
RL = 450 kΩ
kΩ,
CL = 30 pF
CL = 30 pF
POST OFFICE BOX 655303
MIN
TYP
MAX
0.8
1.1
1.4
R(WS) = 100 kΩ
8
11
14
R(WS) = 500 kΩ
40
55
70
R(WS) = 1 MΩ
80
110
140
R(WS) = 10 kΩ
0.8
1.1
1.4
R(WS) = 100 kΩ
8
11
14
R(WS) = 500 kΩ
40
55
70
R(WS) = 1 MΩ
80
110
140
• DALLAS, TEXAS 75265
UNIT
µs
µs
3
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
PARAMETER MEASUREMENT INFORMATION
VCC +
3V
Input
(see Note B)
Input
0V
Output
50 Ω
RL
R(WS)
CL = 30 pF
(see Note A)
Output
VOH
90%
90%
10%
10%
VOL
tTHL
VCC ±
tTLH
VOLTAGE WAVEFORMS
TEST CIRCUIT
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω, PRR ≤ 1 kHz,
duty cycle = 50%.
Figure 1. Test Circuit and Voltage Waveforms
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
12
8
200
VCC ± = ± 12 V
R(WS) = 100 kΩ
TA = 25°C
6
4
TA = 70°C
2
TA = 0°C
0
TA = 25°C
–2
100
TA = 70°C
50
0
– 50
TA = 0°C
– 100
TA = 25°C
–4
– 150
–6
– 200
TA = 70°C
–8
0
0.4
0.8
1.2
1.6
2
– 250
–2
–1
VI – Input Voltage – V
0
1
2
3
4
5
VI – Input Voltage – V
Figure 2
4
TA = 0°C
150
IIII – Input Current – µ
VO – Output Voltage – V
VO
250
VCC ± = ± 12 V
R(WS) = 100 kΩ
RL = 450 Ω
10
ÁÁ
ÁÁ
INPUT CURRENT
vs
INPUT VOLTAGE
Figure 3
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
6
7
8
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
TYPICAL CHARACTERISTICS
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
(POWER ON)
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
(POWER OFF)
50
60
20
VI = 2 V
10
0
– 10
– 20
VI = 0
20
0
– 20
– 40
– 60
– 40
– 80
– 50
– 10 – 8
–6
–4
–2
0
2
4
6
8
"
VCC = 0
VI = 0
TA = 25°C
40
– 30
– 100
– 10 – 8
10
–6
–4
VO – Output Voltage – V
–2
0
2
4
6
8
10
VO – Output Voltage – V
Figure 4
Figure 5
TRANSITION TIME
vs
WAVE-SHAPING RESISTANCE
1000
700
t TLH, t TLH – Transition Time – µ s
I O – Output Current – mA
30
80
I O – Output Current – µ A
40
100
VCC ± = ± 12 V
R(WS) = 100 kΩ
TA = 25°C
400
TA = 0°C
200
TA = 70°C
100
70
40
20
10
7
4
2
1
0.01
0.04
0.1
0.4
1
4
10
R(WS) – Wave-Shaping Resistance – MΩ
Figure 6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
uA9636AC
DUAL LINE DRIVER WITH ADJUSTABLE SLEW RATE
SLLS110B – OCTOBER 1980 – REVISED MAY 1995
APPLICATION INFORMATION
Twisted Pair
or
Flat Cable
12 V
uA9636A
uA9637A
R(WS)
– 12 V
Figure 7. EIA/TIA-423-B System Application
6
5V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
23-Apr-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
UA9636ACD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
UA9636ACDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
UA9636ACDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
UA9636ACDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
UA9636ACDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
UA9636ACDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
UA9636ACJG
OBSOLETE
CDIP
JG
8
TBD
Call TI
UA9636ACP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
UA9636ACPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
Lead/Ball Finish
MSL Peak Temp (3)
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
UA9636ACDR
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
6.4
5.2
2.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
UA9636ACDR
SOIC
D
8
2500
340.5
338.1
20.6
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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