SS6550 Low-Noise Synchronous PWM Step-Down DC/DC Converter n l l l l l l l l l n Greater than 95% efficiency. Guaranteed output current of 800mA. 100% duty cycle in dropout. Fixed 500 KHz or adjustable frequency sychronous PWM operation. Very low quiescent current of 35µA (typ.). Adjustable output voltage from 0.75V to VIN, ranging from 2.5V to 5.5V. Accurate reference: 0.75V (±1.2%). Synchronizable external switching frequency up to 1MHz. Small 8-Pin MSOP package. APPLICATIONS l l l l l l l l n n FEATURES PDAs. Handy-terminals. WLAN cards Cellular phones. CPU I/O supplies. Cordless phones. Notebook chipset supplies. Battery-operated devices (3 or 1 Li-Ion/NiMH/ NiCd Cells). TYPICAL APPLICATION CIRCUIT VIN= 2.5V to 5.5V 1 2 BP + CIN 10µF VIN BP 3 4 CBP 0.1µF SHDN LX DESCRIPTION The SS6550 is a low-noise pulse-widthmodulated (PWM) DC/DC step-down converter, which can power logic circuits and transmitters in small wireless systems such as communicating PDAs, cellular phones and handy-terminals. The device features an internal synchronous rectifier for high conversion efficiency. Excellent noise characteristics and fixed-frequency operation provide easy post-filtering. The SS6550 is ideally suited for Li-Ion battery applications. It is also suitable for +3V or +5V fixed input applications. The device operates in one of the following four modes. Forced PWM mode operates at a fixed frequency regardless of the load. Synchronizable PWM mode allows the synchronization of an external switching frequency and minimizes harmonics. PWM/PFM Mode extends battery life by switching to a PFM pulse-skipping mode under light loads. Shutdown mode places the device in standby, reducing supply current to under 0.1µA. The SS6550 can deliver over 800mA of output current. The output voltage can be adjusted from 0.75V to VIN with the input range of +2.5V to +5.5V. Other features of the SS6550 include low quiescent current, low dropout voltage, and a ±1.2% accuracy 0.75V reference. It is available in a space-saving 8-pin MSOP package. GND 7 * 10µF SYNC/ 6 MODE 1N5819 RT Optional FB 5 VOUT = 1.8V L1 8 R1 560K www.SiliconStandard.com 15P + SS6550 R2 400K Rev.2.01 6/06/2003 CF CO1 33µF CO2 4.7µF 1 of 13 SS6550 n ORDERING INFORMATION PIN CONFIGURATION SS6550CXXX PACKING TYPE TR: TAPE & REEL TB: TUBE PACKAGE TYPE O: MSOP8 TOP VIEW VIN 1 8 BP 2 7 GND SHDN 3 FB 4 LX 6 SYNC/MODE 5 RT Example: SS6550COTR à in MSOP package in tape & reel n ABSOLUTE MAXIMUM RATINGS VIN, BP, SHDN, SYNC/MODE, RT to GND -0.3 to +6V .-0.3 to 0.3V BP to VIN LX to GND -0.3 to (VIN+0.3V) FB to GND -0.3 to (VBP+0.3V) Operating Temperature Range -40°C ~ 85°C Storage Temperature Range Rev.2.01 6/06/2003 - 40°C ~ 150°C www.SiliconStandard.com 2 of 13 SS6550 n ELECTRICAL CHARACTERISTICS (VIN=+3.6V, TA=+25°C, SYNC/MODE =GND, SHDN =IN, unless otherwise specified.) PARAMETER Input Voltage Range SYMBOL CONDITIONS VIN Output Adjustment Range VOUT Feedback Voltage VFB (Note 1) Load Regulation P-channel On-Resistance IFB Threshold 50 nA VIN = 3.6V 0.32 0.65 VIN = 2.5V 0.38 Ω VIN = 3.6V 0.32 0.65 VIN = 2.5V 0.38 Ω 1.2 1.55 A 35 70 µA 0.1 1 µA -20 0.1 20 µA 400 500 600 KHz 1000 KHz 0.85 SYNC/MODE = GND, VFB = 1.4V, LX unconnected SHDN = LX = GND, includes LX leakage current VIN = 5.5V, VLX = 0 or 5.5V f OSC 500 dutyMAX UVLO 100 VIN rising, typical hysteresis is 85mV SHDN , SYNC/MODE, LIM Logic Input Low VIL SHDN , SYNC/MODE, LIM Pulse Width Note 1: Rev.2.01 6/06/2003 V 0.75 0.01 VIH SYNC/MODE Minimum 0.765 -50 Logic Input High Logic Input Current V %/A SYNC Capture Range Undervoltage Lockout VIN -1.3 Threshold Maximum Duty Cycle VREF IOUT = 0 to 800mA P-channel Current-Limit Oscillator Frequency 5.5 % N-channel On-Resistance NRDS(ON) ILX = 100mA LX Leakage Current UNITS +1 PRDS(ON) ILX = 100mA Shutdown Supply Current MAX Duty Cycle = 100% to 23% VFB = 1.4V, Quiescent Current TYP 2.5 0.735 Line Regulation FB Input Current MIN SHDN , SYNC/MODE, LIM High or low 2.0 % 2.2 2.4 2 -1 500 V V 0.1 0.4 V 1 µA ns Specifications to -40°C are guaranteed by design, not production tested. www.SiliconStandard.com 3 of 13 SS6550 n TYPICAL PERFORMANCE CHARACTERISTICS (TA=25oC, VIN=3.6V, SYNC/MODE=GND, L = Coilcraft DS1608C-103, unless otherwise noted.) 90 100 VOUT=0.9 95 (%) 75 70 65 VIN=2.7V 90 VIN=2.7V Efficiency (%) 80 Efficiency 85 VIN=4.2V VIN=3.6V VIN=3.3V 85 80 75 70 VIN=4.2V VIN=3.3V VIN=3.6V 65 VOUT=1.5V 60 10 100 60 1000 10 Load Current (mA) Fig. 1 Load Current vs. Efficiency (VOUT=0.9V) Fig. 2 100 90 90 (%) 95 85 Efficiency (%) Efficiency 95 80 VIN=4.2V 75 VIN=3.6V VIN=3.3V VIN=3.3V 85 80 75 VIN=3.6V VOUT=2.5V 65 VOUT=1.8V 60 60 10 100 1000 10 Load Current (mA) Fig. 3 Load Current vs. Efficiency (VOUT=1.8V) Fig. 4 100 95 95 90 90 (%) 100 85 80 Efficiency (%) VIN=4.2V 70 65 Efficiency 10 100 VIN=2.7V 70 100 Load Current (mA) Load Current vs. Efficiency (VOUT=2.7V) VIN=4.2V 75 VIN=3.6V 70 100 1000 Load Current (mA) Load Current vs. Efficiency (VOUT=2.5V) VIN=3.6V 85 80 VIN=4.2V 75 70 VOUT=3.0V 65 65 60 VOUT=3.3V 60 10 100 1000 200 Load Current (mA) Fig. 5 Load Current vs. Efficiency (VOUT=3.0V) Rev.2.01 6/06/2003 Fig. 6 400 600 800 1000 Load Current (mA) Load Current vs. Efficiency (VOUT=3.3V) www.SiliconStandard.com 4 of 13 SS6550 n TYPICAL PERFORMANCE CHARACTERISTICS (continued) 100 0.765 0.760 Reference Voltage (V) W/ Schottky Diode Efficiency (%) 90 80 VIN=3.6V VOUT=1.8V 70 W/O Schottky Diode VIN=3.6V 0.755 0.750 0.745 0.740 0.735 0.730 60 10 100 0.725 -50 1000 -25 Load Current (mA) Fig. 7 Load Current vs. Efficiency (W/ or W/O Schottky Diode) Fig. 8 550 540 25 50 75 100 125 Temperature (°C) Reference Voltage vs. Temperature 550 540 VIN=3.6V 530 530 520 Frequency (KHz) Frequency (KHz) 0 510 500 490 480 520 510 500 490 480 470 470 460 460 450 -40 -20 0 20 40 60 80 100 450 120 2.0 2.5 3.0 Temperature (°C) Fig. 9 Oscillator Frequency vs. Temperature Fig. 10 3.5 4.0 4.5 5.0 5.5 6.0 Supply Voltage (V) Frequency vs. Input Voltage 1.82 0.44 0.42 Output Voltage (V) RDSON (mΩ) 1.80 Main Switch 0.40 0.38 0.36 0.34 0.32 VIN=3.6V 1.78 1.76 0.30 0.28 1.74 Synchronous Switch 0.26 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Supply Voltage (V) Fig. 11 Rev.2.01 6/06/2003 RDSON vs. Supply Voltage 5.5 6.0 1.72 1 10 Fig. 12 www.SiliconStandard.com 100 1000 Load Current (mA) Output Voltage vs. Load Current 5 of 13 SS6550 n TYPICAL PERFORMANCE CHARACTERISTICS (continued) 40.0 4.0 VOUT=3.3V 37.5 No Load Current (µA) Supply Current (mA) 3.5 3.0 VOUT=2.5V 2.5 2.0 1.5 VOUT=1.8V 1.0 35.0 32.5 30.0 27.5 VOUT=1.8V SYNC/PWM=GND R1=560K R2=400K 25.0 0.5 22.5 SYNC/PWM=IN 0.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Supply Voltage (V) Fig. 13 Supply Current vs. Supply Voltage 20.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Fig. 14 Supply Voltage (V) No Load Current vs. Supply Voltage Fig. 16 Start-up from Shutdown, RLOAD=3Ω 6.0 Operation Frequency (KHz) 1000 900 800 700 600 500 0 1000 Tuning Resistor (Ω) Fig. 15 Operation Frequency vs. Tuning Resistor VOUT=1.8V; ILOAD=50mA to 500mA; SYNC/MODE=GND VOUT=1.8V; I LOAD=50mA to 500mA; SYNC/MODE=IN Fig. 17 Load Transient Response Rev.2.01 6/06/2003 Fig. 18 www.SiliconStandard.com Load Transient Response 6 of 13 SS6550 n TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN=3.3V to 5V, IOUT=1.8V; ILOAD=200mA to 500mA; SYNC/MODE=IN Fig. 19 Line Transient Response Fig. 20 Short Circuit Protection VIN=3.6V; VOUT=1.8V; ILOAD=500mA to 500mA; SYNC/MODE=IN Fig. 21 Rev.2.01 6/06/2003 Switching Waveform www.SiliconStandard.com 7 of 13 SS6550 n BLOCK DIAGRAM BP Chip Supply 0.75V REF Current AMP . SHDN 10 VIN VIN + X5 5 S lope RT 500KHz O scillator Q1 x1 C urrent Limit Comparator Compensation Q1 X20 Frequency SYNC + Selection REF PWM Comparator P hase Compensation FB FB REF + Error AMP . LX A ntiShootThrough Control Logic + Q3 PWM/PFM Control Zero Cross Comparator REF n + + GND PFM Comparator PIN DESCRIPTIONS PIN 1: VIN- Supply voltage input. Input range from +2.5V to +5.5V. Bypass with a 10µF capacitor. PIN 2: BPSupply bypass pin, internally connected to VIN. Bypass with a 0.1µF capacitor. Do not connect to an external power source other than VIN. PIN 3: SHDN - Active-low, shutdown-control input. Reduces supply current to 0.1µA in shutdown. PIN 4: FBFeedback input. PIN 5: RTFrequency adjustable pin. Connect a resistor from this pin to GND to decrease the frequency. Rev.2.01 6/06/2003 PIN 6: SYNC/MODE- Oscillator sync and low-noise, mode-control Input. SYNC/MODE = VIN (Forced PWM mode) SYNC/MODE = GND (PWM/PFM mode) An external clock signal connected to this pin allows for LX switching synchronization. PIN 7: GND- Ground. PIN 8: LX- www.SiliconStandard.com Inductor connection to the drains of the internal power MOSFETs 8 of 13 SS6550 n APPLICATION INFORMATION through block. Similarly, when Q3 is on, Q2 will turn off. Introduction The SS6550 is a low-noise, pulse-width-modulated (PWM), DC/DC step-down converter. It features an internal synchronous rectifier, which eliminates the external Schottky diode. The SS6550 is suitable for Li-lon battery applications, or can be used with 3V or 5V fixed input voltages. It operates in one of the following four modes The SS6550 provides a current limit function by using a 5Ω resistor. When Q1 turns on, current flows through the 5Ω resistor and the current amplifier senses the voltage across the resistor and amplifies it. When the sensed voltage gets bigger than the reference voltage, the control logic shuts the device off. PWM/PFM Function 1. The SS6550 can operate in PWM mode with a fixed frequency, regardless of its load. 2. In synchronizable PWM mode, it allows an external switching frequency to control and minimize harmonics. 3. In idle mode (PWM/PFM), it can extend battery life by switching to PFM pulseskipping mode during light loads. 4. In shutdown mode, the device will stop working and the supply current will reduce to 0.1µA or less. The continuous output current of the SS6550 can be up to 800mA and the output voltage can be adjusted from 0.75V to VIN with an input range from 2.5V to 5.5V using a voltage divider. The SS6550 also features high efficiency, low dropout voltage, and a 0.75V reference with ±1.2% accuracy. It is available in a space-saving 8-pin MSOP package. When connecting the SYNC/MODE pin to VIN, the device is forced into the PWM (Pulse-Width-Modulated) mode with constant frequency. The advantage of constant frequency is that noise can be reduced easily without complex post-filtering. However, it has the disadvantage of low efficiency at light loading. Therefore, the SS6550 provides a function to solve this problem. When connecting the SYNC/MODE pin to GND, the device is able to get into PWM/PFM (PulseFrequency-Modulated) modes. Under a light load condition, the device shifts to PFM mode, which results in a higher efficiency. PWM mode is on under heavy loading and the noise is reduced. Frequency Synchronization Connecting an external clock signal to the SNYC/MODE pin can control the switching frequency. The acceptable range is from 500 kHz to 1 MHz. This mode exhibits low output ripple as well as low audio noise and reduces RF interference, while providing reasonable low current efficiency. Adjustable Switching Frequency Operation When powered on, the control logic block detects whether the SYNC/MODE pin is connected to VIN or GND to determine the operation function and gives a signal to the PWM/PFM control block to determine the proper comparator (ref. Block Diagram). The SS6550 works with an internal synchronous rectifier Q3, to increase efficiency. When the control logic block turns Q2 on, Q3 will turn off through the anti-shortRev.2.01 6/06/2003 The decrease of the switching frequency can also be controlled by connecting an external resistor from the RT pin to ground (ref. Fig. 15). In this mode, the PFM mode is disabled and the device operates with the adjusted frequency. This function is helpful in reducing high frequency harmonics and a post-filter can be easily designed for this function. However, there will be an increase in ripple voltage. www.SiliconStandard.com 9 of 13 SS6550 n APPLICATION INFORMATION (cont.) 100% Duty Cycle Operation External Schottky Diode When the input voltage approaches the output voltage, the converter continuously turns Q1 on. In this mode, the output voltage is equal to the input voltage minus the voltage-drop across Q1. The SS6550 has an internal synchronous rectifier, instead of the Schottky diode usually found in a buck converter. However, a blank period occurs at each switching cycle when both the main switch, Q2, and the synchronous rectifier, Q3, are off. This results in a decrease in efficiency. Therefore, an external Schottky diode is needed to reinforce the efficiency. Components Selection Inductor The inductor selection depends on the operating frequency of the SS6550. The internal switching frequency is 500 kHz, and the external synchronized frequency ranges from 500 kHz to 1 MHz. A higher frequency allows the use of smaller inductor and capacitor values. However, higher frequency also results in lower efficiency due to the internal switching loss. The ripple current ∆ IL is related to the inductor value. A lower inductor value creates a higher ripple current. A higher VIN or VOUT can also create the same result. The inductor value can be calculated from the following formula: VOUT 1 1 − V = ...(1) (f )(∆IL ) OUT VIN Users can define the acceptable ripple current to obtain a suitable inductor value. Output Capacitor The selection of output capacitor depends on the acceptable ripple voltage. Lower ripple voltage corresponds to lower ESR (equivalent-series-resistance) of the output capacitor. Typically, once the ESR is determined from the ripple voltage, the value of the capacitor is adequate for filtering. The formula for ripple voltage is: 1 ∆VOUT = ∆IL ESR + 8 fC OUT Since the diode conducts during the off time, the peak current and voltage of the converter must not exceed the diode ratings. The ratings of the diode can be calculated from the following formulae: VD,MAX (OFF ) = VIN ∆IL 2 − D × IOUT ID,MAX( ON) = IOUT,MAX + ID,avg ( ON) = IOUT − IIN = IOUT = (1 − D) × IOUT Adjustable Output Voltage The SS6550 presents a 0.75V reference voltage at the FB pin. The output voltage, ranging from 0.75V to VIN, can be set by connecting two external resistors, R1 and R2. VOUT can be calculated as: R1 VOUT = 0.75 V × (1 + ) R2 Applying a 15µF capacitor in parallel with R1 can prevent stray pickup. This should sit as close to the SS6550 as possible. However, the load transient response is degraded by this capacitor. For more reduction in the ripple voltage, a 15pF ceramic capacitor can be used in parallel with the output capacitor. Rev.2.01 6/06/2003 www.SiliconStandard.com 10 of 13 SS6550 n APPLICATION INFORMATION (cont.) L= Layout Consideration To ensure proper operation of the SS6550, the following points should be considered: 1. The input capacitor and VIN should be placed as close as possible to each other to avoid the AC current flow into the internal MOSFET. 2. The output loop, which consists of the inductor, Schottky diode and output capacitor, should be kept as small as possible. 3. The routes carrying large currents should be kept short and wide. 4. Logically the large current of the converter, when SS6550 is on or off, should flow in the same direction. 5. The FB pin should connect to the feedback resistors directly, and the route should be away from any noise source, such as the inductance of the LX line. 6. Grounding all components at the same point may effectively reduce the occurrence of loops. A stable ground plane is very important to obtain higher efficiency. When a ground plane is cut apart, it may cause disturbed signals and noise. If possible, two or three through-holes can ensure the stability of grounding. Fig.2 to 4 shows 1.8 V 1 .8 V 1 − = 8.23µH 500kHz × 250mA 4.2V Therefore, 10µH is appropriate for the inductor. The inductor, series number SLF6025-100M1R0 from TDK, with 57.3mΩ series resistance is recommended for the best efficiency. For the output capacitor, the ESR is more important than its capacitance. Assuming ripple voltage o f 100mV, then the ESR can be calculated as: ∆V 100mV ESR= = = 0.4Ω ∆I 250mA Therefore, a 33µF/10V capacitor, MCM series from NIPPON, is recommended. Schottky selection is calculated as following. VD,MAX ( OFF ) = VIN = 4.2 V ∆IL 2 250mA = 800mA + 2 ID,MAX(ON) = IOUT,MAX + = 925mA ID,avg( ON) = (1 − D) × IOUT 1 .8 ) × 800mA 4.2 = 457 .14mA = (1 − the layout diagrams of the SS6550. Example Here is an example to illustrate the components selection guide lines above. Let’s assume the SS6550 is to be used for a mobile phone application, which uses a 1-cell Li-Ion battery with 2.7V to 4.2V input voltage for the power source. The required load current is 800mA, and the output voltage is 1.8V. Substituting VOUT=1.8V, VIN=4.2V, ri p p l e =250mA, and f=500 kHz to equation (1) Rev.2.01 6/06/2003 According to the data above, the Schottky diode, SS12, from GS is recommended. For feedback resistors, choose R2=390kΩ, and then R1 can be calculated as follow: 1.8 V R1 = − 1 × 390kΩ = 546kΩ ; use 560kΩ 0 . 75 Fig. 22 shows this application circuit for the SS6550. www.SiliconStandard.com 11 of 13 SS6550 n APPLICATION INFORMATION (cont.) VIN 2.7V~5.5V 1 + C1 10µF C2 0.1µF 2 3 SW1 4 VIN BP LX GND SHDN L1 8 6 SW SYNC FB RT SS6550 VOUT 10µH 7 5 D1 SS12 Optional C5 15pF R1 C4 560K 33µF + C3 4.7µF RT R2 390K Fig. 22 SS6550 Application Circuit Rev.2.01 6/06/2003 www.SiliconStandard.com 12 of 13 SS6550 n PHYSICAL DIMENSIONS l MSOP 8 (unit: mm) D SYMBOL MIN MAX A 0.76 0.97 A1 -- 0.20 B 0.28 0.38 C 0.13 0.23 D 2.90 3.10 E 2.90 3.10 H E e e A A1 C B 0.65 H 4.80 5.00 L 0.40 0.66 L Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.01 6/06/2003 www.SiliconStandard.com 13 of 13