TC1313 500 mA Synchronous Buck Regulator, + 300 mA LDO Features Description • Dual-Output Regulator (500 mA Buck Regulator and 300 mA Low-Dropout Regulator (LDO)) • Total Device Quiescent Current = 57 µA (Typ.) • Independent Shutdown for Buck and LDO Outputs • Both Outputs Internally Compensated • Synchronous Buck Regulator: - Over 90% Typical Efficiency - 2.0 MHz Fixed-Frequency PWM (Heavy Load) - Low Output Noise - Automatic PWM-to-PFM mode transition - Adjustable (0.8V to 4.5V) and Standard Fixed-Output Voltages (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V) • Low-Dropout Regulator: - Low-Dropout Voltage = 137 mV Typ. @ 200 mA - Standard Fixed-Output Voltages (1.5V, 1.8V, 2.5V, 3.3V) • Small 10-pin 3X3 DFN or MSOP Package Options • Operating Junction Temperature Range: - -40°C to +125°C • Undervoltage Lockout (UVLO) • Output Short Circuit Protection • Overtemperature Protection The TC1313 combines a 500 mA synchronous buck regulator and 300 mA Low-Dropout Regulator (LDO) to provide a highly integrated solution for devices that require multiple supply voltages. The unique combination of an integrated buck switching regulator and lowdropout linear regulator provides the lowest system cost for dual-output voltage applications that require one lower processor core voltage and one higher bias voltage. Applications • • • • • Cellular Phones Portable Computers USB-Powered Devices Handheld Medical Instruments Organizers and PDAs The 500 mA synchronous buck regulator switches at a fixed frequency of 2.0 MHz when the load is heavy, providing a low-noise, small-size solution. When the load on the buck output is reduced to light levels, it changes operation to a Pulse Frequency Modulation (PFM) mode to minimize quiescent current draw from the battery. No intervention is necessary for smooth transition from one mode to another. The LDO provides a 300 mA auxiliary output that requires a single 1 µF ceramic output capacitor, minimizing board area and cost. The typical dropout voltage for the LDO output is 137 mV for a 200 mA load. The TC1313 is available in either the 10-pin DFN or MSOP package. Additional protection features include: UVLO, overtemperature and overcurrent protection on both outputs. For a complete listing of TC1313 standard parts, consult your Microchip representative. Package Type 10-Lead DFN SHDN2 1 VIN2 2 VOUT2 3 NC 4 AGND 5 10 PGND 9 LX 8 VIN1 7 SHDN1 6 VFB1/VOUT1 10-Lead MSOP SHDN2 1 VIN2 2 VOUT2 3 © 2005 Microchip Technology Inc. 10 PGND 9 LX 8 VIN1 NC 4 7 AGND 5 6 SHDN1 VFB1/VOUT1 DS21974A-page 1 TC1313 Functional Block Diagram UVLO Undervoltage Lockout (UVLO) VREF Synchronous Buck Regulator VIN1 PDRV VIN2 LX SHDN1 Driver Control NDRV PGND PGND PGND AGND VOUT1/VFB1 VREF UVLO VOUT2 LDO SHDN2 DS21974A-page 2 AGND © 2005 Microchip Technology Inc. TC1313 Typical Application Circuits TC1313 Fixed-Output Application 10-Lead MSOP 4.7 µH VIN 8 2.7V to 4.2V 4.7 µF 2 VIN1 VIN2 LX 7 SHDN1 1 SHDN2 VOUT2 4 NC 4.7 µF PGND 10 VOUT1 AGND VOUT1 1.5V @ 500 mA 9 6 3 5 VOUT2 1 µF 2.5V @ 300 mA TC1313 Adjustable-Output Application 10-Lead DFN 4.7 µH Input Voltage 4.5V to 5.5V *Optional Capacitor VIN2 4.7 µF 1.0 µF 8 VIN1 2 VIN2 LX 7 SHDN1 PGND 10 VOUT1 6 1 SHDN2 VOUT2 4 NC AGND VOUT1 9 4.7 µF VOUT2 3 5 Note 200 kΩ 1 µF 3.3V @ 300 mA 4.99 kΩ 2.1V @ 500 mA 33 pF 121 kΩ Note: Connect DFN package exposed pad to AGND. © 2005 Microchip Technology Inc. DS21974A-page 3 TC1313 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings † VIN - AGND ......................................................................6.0V All Other I/O .............................. (AGND - 0.3V) to (VIN + 0.3V) LX to PGND .............................................. -0.3V to (VIN + 0.3V) PGND to AGND................................................... -0.3V to +0.3V Output Short Circuit Current ................................. Continuous Power Dissipation (Note 7) ..........................Internally Limited Storage temperature .....................................-65°C to +150°C Ambient Temp. with Power Applied.................-40°C to +85°C Operating Junction Temperature...................-40°C to +125°C ESD protection on all pins (HBM) ....................................... 3 kV DC CHARACTERISTICS Electrical Characteristics: VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 µF, COUT2 = 1µF, L = 4.7 µH, VOUT1 (ADJ) = 1.8V, IOUT1 = 100 ma, IOUT2 = 0.1 mA TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. Parameters Sym Min Typ Max Units Conditions Input/Output Characteristics Input Voltage VIN 2.7 — 5.5 V Maximum Output Current IOUT1_MAX 500 — — mA Maximum Output Current IOUT2_MAX 300 — — mA Note 1 IIN_SHDN — 0.05 1 µA SHDN1 = SHDN2 = GND IQ — 57 100 µA SHDN1 = SHDN2 = VIN2 IOUT1 = 0 mA, IOUT2 = 0 mA Synchronous Buck IQ — 38 — µA SHDN1 = VIN, SHDN2 = GND LDO IQ — 44 — µA SHDN1 = GND, SHDN2 = VIN2 Shutdown Current Combined VIN1 and VIN2 Current Operating IQ Note 1, Note 2, Note 8 Note 1 Shutdown/UVLO/Thermal Shutdown Characteristics SHDN1,SHDN2, Logic Input Voltage Low VIL — — 15 %VIN VIN1 = VIN2 = 2.7V to 5.5V SHDN1,SHDN2, Logic Input Voltage High VIH 45 — — %VIN VIN1 = VIN2 = 2.7V to 5.5V SHDN1,SHDN2, Input Leakage Current IIN -1.0 ±0.01 1.0 µA VIN1 = VIN2 = 2.7V to 5.5V SHDNX = GND SHDNY = VIN Note 6, Note 7 Thermal Shutdown Thermal Shutdown Hysteresis Undervoltage Lockout (VOUT1 and VOUT2) Undervoltage Lockout Hysteresis Note 1: 2: 3: 4: 5: 6: 7: 8: TSHD — 165 — °C TSHD-HYS — 10 — °C UVLO 2.4 2.55 2.7 V UVLO-HYS — 200 — mV VIN1 Falling The Minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VRX + VDROPOUT, VRX = VR1 or VR2. VRX is the regulator output voltage setting. TCVOUT2 = ((VOUT2max – VOUT2min) * 106)/(VOUT2 * DT). Regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested over a load range from 0.1 mA to the maximum specified output current. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential. The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e. TA, TJ, θJA). Exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. The integrated MOSFET switches have an integral diode from the LX pin to VIN, and from LX to PGND. In cases where these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not able to limit the junction temperature for these cases. VIN1 and VIN2 are supplied by the same input source. DS21974A-page 4 © 2005 Microchip Technology Inc. TC1313 DC CHARACTERISTICS (CONTINUED) Electrical Characteristics: VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 µF, COUT2 = 1µF, L = 4.7 µH, VOUT1 (ADJ) = 1.8V, IOUT1 = 100 ma, IOUT2 = 0.1 mA TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. Parameters Sym Min Typ Max Units Conditions Synchronous Buck Regulator (VOUT1) Adjustable Output Voltage Range VOUT1 0.8 — 4.5 V Adjustable Reference Feedback Voltage (VFB1) VFB1 0.78 0.8 0.82 V Feedback Input Bias Current (IFB1) IVFB1 — -1.5 — nA Output Voltage Tolerance Fixed (VOUT1) VOUT1 -2.5 ±0.3 +2.5 % Line Regulation (VOUT1) VLINE-REG — 0.2 — %/V Load Regulation (VOUT1) VLOAD-REG — 0.2 — % Dropout Voltage VOUT1 VIN – VOUT1 — 280 — mV FOSC 1.6 2.0 2.4 MHz TSS — 0.5 — ms TR = 10% to 90% RDSon P-Channel RDSon-P — 450 650 mΩ IP = 100 mA RDSon N-Channel RDSon-N — 450 650 mΩ IN = 100 mA ILX -1.0 ±0.01 1.0 μA SHDN = 0V, VIN = 5.5V, LX = 0V, LX = 5.5V +ILX(MAX) — 700 — mA VOUT2 -2.5 ±0.3 +2.5 % Internal Oscillator Frequency Start Up Time LX Pin Leakage Current Positive Current Limit Threshold Note 2 VIN = VR+1V to 5.5V, ILOAD = 100 mA VIN = VR + 1.5V, ILOAD = 100 mA to 500 mA (Note 1) IOUT1 = 500 mA, VOUT1 = 3.3V (Note 5) LDO Output (VOUT2) Output Voltage Tolerance (VOUT2) Note 2 Temperature Coefficient TCVOUT — 25 — ppm/°C Line Regulation ΔVOUT2/ ΔVIN -0.2 ±0.02 +0.2 %/V Load Regulation, VOUT2 ≥ 2.5V ΔVOUT2/ IOUT2 -0.75 0.1 +0.75 % IOUT2 = 0.1 mA to 300 mA (Note 4) Load Regulation, VOUT2 < 2.5V ΔVOUT2/ IOUT2 -0.90 0.1 +0.90 % IOUT2 = 0.1 mA to 300 mA (Note 4) Dropout Voltage VOUT2 > 2.5V VIN – VOUT2 — 137 205 300 500 mV IOUT2 = 200 mA (Note 5) IOUT2 = 300 mA PSRR — 62 — dB f = 100 Hz, IOUT1 = IOUT2 = 50 mA, CIN = 0 µF eN — 1.8 — µV/(Hz)½ IOUTsc2 — 240 — mA Power Supply Rejection Ratio Output Noise Output Short Circuit Current (Average) Note 1: 2: 3: 4: 5: 6: 7: 8: Note 3 (VR+1V) ≤ VIN ≤ 5.5V f = 1 kHz, IOUT2 = 50 mA, SHDN1 = GND RLOAD2 ≤ 1Ω The Minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VRX + VDROPOUT, VRX = VR1 or VR2. VRX is the regulator output voltage setting. TCVOUT2 = ((VOUT2max – VOUT2min) * 106)/(VOUT2 * DT). Regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested over a load range from 0.1 mA to the maximum specified output current. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential. The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e. TA, TJ, θJA). Exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. The integrated MOSFET switches have an integral diode from the LX pin to VIN, and from LX to PGND. In cases where these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not able to limit the junction temperature for these cases. VIN1 and VIN2 are supplied by the same input source. © 2005 Microchip Technology Inc. DS21974A-page 5 TC1313 DC CHARACTERISTICS (CONTINUED) Electrical Characteristics: VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 µF, COUT2 = 1µF, L = 4.7 µH, VOUT1 (ADJ) = 1.8V, IOUT1 = 100 ma, IOUT2 = 0.1 mA TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. Parameters Sym Min Typ Max Units Wake-Up Time (From SHDN2 mode), (VOUT2) tWK — 31 100 µs IOUT1 = IOUT2 = 50 mA Settling Time (From SHDN2 mode), (VOUT2) tS — 100 — µs IOUT1 = IOUT2 = 50 mA Note 1: 2: 3: 4: 5: 6: 7: 8: Conditions The Minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VRX + VDROPOUT, VRX = VR1 or VR2. VRX is the regulator output voltage setting. TCVOUT2 = ((VOUT2max – VOUT2min) * 106)/(VOUT2 * DT). Regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested over a load range from 0.1 mA to the maximum specified output current. Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its nominal value measured at a 1V differential. The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e. TA, TJ, θJA). Exceeding the maximum allowable power dissipation causes the device to initiate thermal shutdown. The integrated MOSFET switches have an integral diode from the LX pin to VIN, and from LX to PGND. In cases where these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not able to limit the junction temperature for these cases. VIN1 and VIN2 are supplied by the same input source. TEMPERATURE SPECIFICATIONS Electrical Specifications: Unless otherwise indicated, all limits are specified for: VIN = +2.7V to +5.5V Parameters Sym Min Typ Max Units Conditions Operating Junction Temperature Range TJ -40 — +125 °C Storage Temperature Range TA -65 — +150 °C Maximum Junction Temperature TJ — — +150 °C Thermal Resistance, 10L-DFN θJA — 41 — °C/W Typical 4-layer board with Internal Ground Plane and 2 Vias in Thermal Pad Thermal Resistance, 10L-MSOP θJA — 113 — °C/W Typical 4-layer board with Internal Ground Plane Temperature Ranges Steady state Transient Thermal Package Resistances DS21974A-page 6 © 2005 Microchip Technology Inc. TC1313 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. IQ Switcher and LDO (µA) 66 64 SHDN1 = VIN2 SHDN2 = VIN2 VIN = 5.5V 62 60 VIN = 4.2V 58 56 VIN = 3.6V 54 VOUT1 Efficiency (%) Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 µF, COUT2 = 1 µF, L = 4.7 µH, VOUT1 (ADJ) = 1.8V, TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA = +25°C. Adjustable or fixedoutput voltage options can be used to generate the Typical Performance Characteristics. 52 -40 -25 -10 5 100 95 90 85 80 75 70 65 60 55 50 20 35 50 65 80 95 110 125 IOUT1 = 250 mA IOUT1 = 500 mA 2.7 3.05 3.4 Ambient Temperature (°C) 4.8 5.15 5.5 VOUT1 Efficiency(%) VIN = 4.2V 34 VIN = 3.6V 5 95 90 85 VIN1 = 3.6V 80 VIN1 = 4.2V 75 VIN1 = 3.0V 70 0.005 30 -40 -25 -10 SHDN1 = VIN2 SHDN2 = AGND VIN = 5.5V 32 20 35 50 65 80 95 110 125 0.104 0.203 0.302 FIGURE 2-2: IQ Switcher Current vs. Ambient Temperature. 100 SHDN1 = AGND SHDN2 = VIN2 VIN = 5.5V VIN = 4.2V 42 40 VIN = 3.6V 38 VOUT1 Efficiency(%) 95 44 0.5 FIGURE 2-5: VOUT1 Output Efficiency vs. IOUT1 (VOUT1 = 1.2V). 50 46 0.401 IOUT1 (A) Ambient Temperature (°C) IQ LDO (µA) 4.45 100 SHDN1 = VIN2 SHDN2 = AGND 36 48 4.1 FIGURE 2-4: VOUT1 Output Efficiency vs. Input Voltage (VOUT1 = 1.2V). 40 IQ Switcher (µA) 3.75 Input Voltage (V) FIGURE 2-1: IQ Switcher and LDO Current vs. Ambient Temperature. 38 SHDN1 = VIN2 SHDN2 = AGND IOUT1 = 100 mA SHDN1 = VIN2 SHDN2 = AGND IOUT1 = 100 mA 90 IOUT1 = 250 mA 85 80 IOUT1 = 500 mA 75 70 65 36 60 -40 -25 -10 5 20 35 50 65 80 95 110 125 Ambient Temperature (°C) FIGURE 2-3: Temperature. IQ LDO Current vs. Ambient © 2005 Microchip Technology Inc. 2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5 Input Voltage (V) FIGURE 2-6: VOUT1 Output Efficiency vs. Input Voltage (VOUT1 = 1.8V). DS21974A-page 7 TC1313 Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 µF, COUT2 = 1 µF, L = 4.7 µH, VOUT1 (ADJ) = 1.8V, TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA = +25°C. Adjustable or fixedoutput voltage options can be used to generate the Typical Performance Characteristics. 1.21 SHDN1 = VIN2 SHDN2 = AGND VIN = 3.0V 95 90 VIN = 4.2V 85 80 0.104 0.203 0.302 0.401 VIN1 = 3.6V 1.202 1.198 1.194 VIN = 3.6V 75 0.005 SHDN1 = VIN2 SHDN2 = AGND 1.206 VOUT1 (V) VOUT1 Efficiency(%) 100 1.19 0.005 0.5 0.104 IOUT1 (A) FIGURE 2-10: (VOUT1 = 1.2V). IOUT1 = 100 mA IOUT1 = 250 mA 88 IOUT1 = 500 mA 1.81 1.805 1.8 1.795 80 3.60 3.92 4.23 4.55 4.87 5.18 1.79 0.005 5.50 0.104 0.203 0.302 FIGURE 2-8: VOUT1 Output Efficiency vs. Input Voltage (VOUT1 = 3.3V). FIGURE 2-11: (VOUT1 = 1.8V). 3.4 VIN1 = 3.6V SHDN1 = VIN2 SHDN2 = AGND 3.36 VIN1 = 4.2V 75 VOUT1 (V) 90 SHDN1 = VIN2 SHDN2 = AGND 80 0.5 VOUT1 vs. IOUT1 95 85 0.401 IOUT1 (A) Input Voltage (V) VOUT1 Efficiency (%) 0.5 SHDN1 = VIN2 SHDN2 = AGND VIN1 = 3.6V 1.815 84 100 0.401 VOUT1 vs. IOUT1 1.82 SHDN1 = VIN2 SHDN2 = AGND VOUT1 (V) VOUT1 Efficiency (%) 100 92 0.302 IOUT1 (A) FIGURE 2-7: VOUT1 Output Efficiency vs. IOUT1 (VOUT1 = 1.8V). 96 0.203 VIN1 = 5.5V 70 VIN1 = 4.2V 3.32 3.28 3.24 65 60 0.005 0.104 0.203 0.302 0.401 0.5 3.2 0.005 0.104 IOUT1 (A) FIGURE 2-9: VOUT1 Output Efficiency vs. IOUT1 (VOUT1 = 3.3V). DS21974A-page 8 0.203 0.302 0.401 0.5 IOUT1 (A) FIGURE 2-12: (VOUT1 = 3.3V). VOUT1 vs. IOUT1 © 2005 Microchip Technology Inc. TC1313 SHDN1 = VIN2 SHDN2 = AGND 2.15 2.10 2.05 2.00 1.95 1.90 2.7 3.1 3.5 3.9 4.3 4.7 5.1 0.65 0.55 P-Channel 0.50 N-Channel 0.45 0.40 5.5 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 Input Voltage (V) FIGURE 2-13: vs. Input Voltage. FIGURE 2-16: vs. Input Voltage. VOUT1 Switch Resistance 0.70 SHDN1 = VIN2 SHDN2 = AGND 1.98 VIN1 = 3.6V Buck Regulator Switch Resistance (:) 1.96 1.94 1.92 P-Channel 0.60 N-Channel 0.55 0.50 SHDN1 = VIN2 SHDN2 = AGND 0.45 0.40 125 95 110 80 65 50 35 5 20 -10 -25 -40 1.90 0.65 -40 -25 -10 SHDN1 = VIN2 SHDN2 = AGND 0.815 20 35 50 65 80 95 110 125 VIN1 = 3.6V 0.810 0.805 0.800 0.795 FIGURE 2-17: VOUT1 Switch Resistance vs. Ambient Temperature. 0.4 VOUT1 Dropout Voltage (V) FIGURE 2-14: VOUT1 Switching Frequency vs. Ambient Temperature. 0.820 5 Ambient Temperature (°C) Ambient Temperature (°C) SHDN1 = VIN2 SHDN2 = AGND 0.35 0.3 0.25 0.2 VOUT1 = 3.3V IOUT1 = 500 mA 0.15 FIGURE 2-15: VOUT1 Adjustable Feedback Voltage vs. Ambient Temperature. © 2005 Microchip Technology Inc. 125 95 110 80 65 50 35 -10 -25 125 95 110 80 65 50 35 20 5 -10 -25 -40 Ambient Temperature (°C) -40 0.1 0.790 5 VOUT1 Frequency (MHz) Input Voltage (V) VOUT1 Switching Frequency 2.00 VOUT1 FB Voltage (V) SHDN1 = VIN2 SHDN2 = AGND VIN1 = 3.6V 0.60 20 VOUT1 Frequency (MHz) 2.20 VOUT1 Switch Resistance (:) Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 µF, COUT2 = 1 µF, L = 4.7 µH, VOUT1 (ADJ) = 1.8V, TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA = +25°C. Adjustable or fixedoutput voltage options can be used to generate the Typical Performance Characteristics. Ambient Temperature (°C) FIGURE 2-18: VOUT1 Dropout Voltage vs. Ambient Temperature. DS21974A-page 9 TC1313 Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 µF, COUT2 = 1 µF, L = 4.7 µH, VOUT1 (ADJ) = 1.8V, TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA = +25°C. Adjustable or fixedoutput voltage options can be used to generate the Typical Performance Characteristics. VOUT2 Output Voltage (V) 1.802 IOUT2 = 150 mA 1.800 SHDN1 = AGND SHDN2 = VIN2 TA = + 85°C 1.798 TA = + 25°C 1.796 TA = - 40°C 1.794 1.792 2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5 Input Voltage (V) FIGURE 2-19: VOUT1 and VOUT2 Heavy Load Switching Waveforms vs. Time. FIGURE 2-22: VOUT2 Output Voltage vs. Input Voltage (VOUT2 = 1.8V). VOUT2 Output Voltage (V) 2.508 SHDN1 = AGND SHDN2 = VIN2 IOUT2 = 150 mA 2.506 TA = + 85°C 2.504 2.502 TA = + 25°C 2.500 2.498 TA = - 40°C 2.496 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 Input Voltage (V) FIGURE 2-20: VOUT1 and VOUT2 Light Load Switching Waveforms vs. Time. IOUT2 = 150 mA 3.298 TA = + 85°C 1.49 1.488 TA = + 25°C SHDN1 = AGND SHDN2 = VIN2 1.486 TA = - 40°C 1.484 1.482 2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5 Input Voltage (V) FIGURE 2-21: VOUT2 Output Voltage vs. Input Voltage (VOUT2 = 1.5V). DS21974A-page 10 VOUT2 Output Voltage (V) 1.492 VOUT2 Output Voltage(V) FIGURE 2-23: VOUT2 Output Voltage vs. Input Voltage (VOUT2 = 2.5V). SHDN1 = AGND SHDN2 = VIN2 IOUT2 = 150 mA 3.297 TA = + 85°C 3.296 3.295 TA = + 25°C 3.294 TA = - 40°C 3.293 3.292 3.60 3.92 4.23 4.55 4.87 5.18 5.50 Input Voltage (V) FIGURE 2-24: VOUT2 Output Voltage vs. Input Voltage (VOUT2 = 3.3V). © 2005 Microchip Technology Inc. TC1313 SHDN1 = AGND SHDN2 = VIN2 0.25 IOUT2 = 300 mA 0.20 IOUT2 = 200 mA 0.15 0.10 0.05 0.1 VIN2 = 3.6V -0.1 -0.2 VOUT2 = 2.6V VOUT2 = 1.5V -0.3 FIGURE 2-25: VOUT2 Dropout Voltage vs. Ambient Temperature (VOUT2 = 2.5V). IOUT2 = 200 mA 125 95 110 80 65 50 0 -10 VOUT2 PSRR (dB) VOUT2 Dropout Voltage (V) 0.1 35 FIGURE 2-28: VOUT2 Load Regulation vs. Ambient Temperature. SHDN1 = AGND SHDN2 = VIN2 IOUT2 = 300 mA 5 Ambient Temperature (°C) 0.3 0.2 20 -10 -25 125 95 110 80 65 50 35 5 20 -10 -25 -40 -0.4 Ambient Temperature (°C) -20 -30 SHDN1 = GND VOUT2 = 1.5V IOUT2 = 30 mA CIN = 0 µF COUT2 = 1.0 µF -40 -50 COUT2 = 4.7 µF -60 -70 -80 0.01 0.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 0.1 FIGURE 2-26: VOUT2 Dropout Voltage vs. Ambient Temperature (VOUT2 = 3.3V). 0.000 VOUT2 = 3.3V SHDN1 = AGND SHDN2 = VIN2 -0.005 VOUT2 = 2.5V -0.015 -0.020 -0.025 VOUT2 = 1.5V -0.030 -0.035 -40 -25 -10 5 20 35 50 65 80 95 110 125 FIGURE 2-27: VOUT2 Line Regulation vs. Ambient Temperature. 1000 SHDN1 = AGND SHDN2 = VIN2 1 0.1 VIN = 3.6V VOUT2 = 2.5V IOUT2 = 50 mA 0.01 0.01 0.1 Ambient Temperature (°C) © 2005 Microchip Technology Inc. 100 10 IOUT2 = 100 µA -0.010 10 FIGURE 2-29: VOUT2 Power Supply Ripple Rejection vs. Frequency. VOUT2 Noise (μV/Hz) 0.005 1 Frequency (kHz) Ambient Temperature (°C) VOUT2 Line Regulation (%/V) SHDN1 = AGND SHDN2 = VIN2 VOUT2 = 3.3V 0.0 -40 VOUT2 Dropout Voltage (V) 0.30 VOUT2 Load Regulation (%) Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 µF, COUT2 = 1 µF, L = 4.7 µH, VOUT1 (ADJ) = 1.8V, TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA = +25°C. Adjustable or fixedoutput voltage options can be used to generate the Typical Performance Characteristics. 1 10 100 1000 10000 Frequency (kHz) FIGURE 2-30: VOUT2 Noise vs. Frequency. DS21974A-page 11 TC1313 Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 = CIN = 4.7 µF, COUT2 = 1 µF, L = 4.7 µH, VOUT1 (ADJ) = 1.8V, TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA = +25°C. Adjustable or fixedoutput voltage options can be used to generate the Typical Performance Characteristics. FIGURE 2-31: vs. Time. VOUT1 Load Step Response FIGURE 2-34: Waveforms. VOUT1 and VOUT2 Startup FIGURE 2-32: vs. Time. VOUT2 Load Step Response FIGURE 2-35: Waveforms. VOUT1 and VOUT2 Shutdown FIGURE 2-33: VOUT1 and VOUT2 Line Step Response vs. Time. DS21974A-page 12 © 2005 Microchip Technology Inc. TC1313 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin No. Name 1 SHDN2 2 VIN2 3 VOUT2 4 NC 5 AGND 6 3.1 Function Active Low Shutdown Input for LDO Output Pin Analog Input Supply Voltage Pin LDO Output Voltage Pin No Connect Analog Ground Pin VFB / VOUT1 Buck Feedback Voltage (Adjustable Version)/Buck Output Voltage (Fixed Version) Pin 7 SHDN1 8 VIN1 9 LX 10 PGND EP Exposed Pad Active Low Shutdown Input for Buck Regulator Output Pin Buck Regulator Input Voltage Pin Buck Inductor Output Pin Power Ground Pin For the DFN package, the center exposed pad is a thermal path to remove heat from the device. Electrically, this pad is at ground potential and should be connected to AGND. LDO Shutdown Input Pin (SHDN2) SHDN2 is a logic-level input used to turn the LDO regulator on and off. A logic-high (> 45% of VIN) will enable the regulator output. A logic-low (< 15% of VIN) will ensure that the output is turned off. 3.2 LDO Input Voltage Pin (VIN2) 3.7 Buck Regulator Shutdown Input Pin (SHDN1) SHDN1 is a logic-level input used to turn the buck regulator on and off. A logic-high (> 45% of VIN) will enable the regulator output. A logic-low (< 15% of VIN) will ensure that the output is turned off. 3.8 Buck Regulator Input Voltage Pin (VIN1) VIN2 is a LDO power-input supply pin. Connect variable-input voltage source to VIN2. Connect VIN1 and VIN2 together with board traces as short as possible. VIN2 provides the input voltage for the LDO regulator. An additional capacitor can be added to lower the LDO regulator input ripple voltage. VIN1 is the buck regulator power-input supply pin. Connect a variable-input voltage source to VIN1. Connect VIN1 and VIN2 together with board traces as short as possible. 3.3 3.9 LDO Output Voltage Pin (VOUT2) Buck Inductor Output Pin (LX) VOUT2 is a regulated LDO output voltage pin. Connect a 1 µF or larger capacitor to VOUT2 and AGND for proper operation. Connect LX directly to the buck inductor. This pin carries large signal-level current; all connections should be made as short as possible. 3.4 3.10 No Connect Pin (NC) No connection. 3.5 Analog Ground Pin (AGND) AGND is the analog ground connection. Tie AGND to the analog portion of the ground plane (AGND). See the physical layout information in Section 5.0 “Application Circuits/Issues” for grounding recommendations. 3.6 Buck Regulator Output Sense Pin (VFB/VOUT1) For VOUT1 adjustable-output voltage options, connect the center of the output voltage divider to the VFB pin. For fixed-output voltage options, connect the output of the buck regulator to this pin (VOUT1). © 2005 Microchip Technology Inc. Power Ground Pin (PGND) Connect all large-signal level ground returns to PGND. These large-signal level ground traces should have a small loop area and length to prevent coupling of switching noise to sensitive traces. Please see the physical layout information supplied in Section 5.0 “Application Circuits/Issues” for grounding recommendations. 3.11 Exposed Pad (EP) For the DFN package, connect the EP to AGND with vias into the AGND plane. DS21974A-page 13 TC1313 4.0 DETAILED DESCRIPTION 4.1 Device Overview The TC1313 combines a 500 mA synchronous buck regulator with a 300 mA LDO. This unique combination provides a small, low-cost solution for applications that require two or more voltage rails. The buck regulator can deliver high-output current over a wide range of input-to-output voltage ratios while maintaining high efficiency. This is typically used for the lower-voltage, higher-current processor core. The LDO is a minimal parts-count solution (single-output capacitor), providing a regulated voltage for an auxiliary rail. The typical LDO dropout voltage (137 mV @ 200 mA) allows the use of very low input-to-output LDO differential voltages, minimizing the power loss internal to the LDO pass transistor. Integrated features include independent shutdown inputs, UVLO, overcurrent and overtemperature shutdown. 4.2 Synchronous Buck Regulator The synchronous buck regulator is capable of supplying a 500 mA continuous output current over a wide range of input and output voltages. The output voltage range is from 0.8V (min) to 4.5V (max). The regulator operates in three different modes and automatically selects the most efficient mode of operation. During heavy load conditions, the TC1313 buck converter operates at a high, fixed frequency (2.0 MHz) using current mode control. This minimizes output ripple and noise (less than 8 mV peak-to-peak ripple) while maintaining high efficiency (typically > 90%). For standby or light-load applications, the buck regulator will automatically switch to a power-saving Pulse Frequency Modulation (PFM) mode. This minimizes the quiescent current draw on the battery while keeping the buck output voltage in regulation. The typical buck PFM mode current is 38 µA. The buck regulator is capable of operating at 100% duty cycle, minimizing the voltage drop from input to output for wide-input, batterypowered applications. For fixed-output voltage applications, the feedback divider and control loop compensation components are integrated, eliminating the need for external components. The buck regulator output is protected against overcurrent, short circuit and overtemperature. While shut down, the synchronous buck N-channel and P-channel switches are off, so the LX pin is in a high-impedance state (this allows for connecting a source on the output of the buck regulator as long as its voltage does not exceed the input voltage). DS21974A-page 14 4.2.1 FIXED-FREQUENCY PWM MODE While operating in Pulse Width Modulation (PWM) mode, the TC1313 buck regulator switches at a fixed 2.0 MHz frequency. The PWM mode is suited for higher load current operation, maintaining low output noise and high conversion efficiency. PFM to PWM mode transition is initiated for any of the following conditions. • Continuous inductor current is sensed • Inductor peak current exceeds 100 mA • The buck regulator output voltage has dropped out of regulation (step load has occurred) The typical PFM-to-PWM threshold is 80 mA. 4.2.2 PFM MODE PFM mode is entered when the output load on the buck regulator is very light. Once detected, the converter enters the PFM mode automatically and begins to skip pulses to minimize unnecessary quiescent current draw by reducing the number of switching cycles per second. The typical quiescent current for the switching regulator is less than 38 µA. The transition from PWM to PFM mode occurs when discontinuous inductor current is sensed, or the peak inductor current is less than 60 mA (typ.). The typical PWM to PFM mode threshold is 30 mA. For low input-to-output differential voltages, the PWM to PFM mode threshold can be low due to the lack of ripple current. It is recommended that VIN1 be one volt greater than VOUT1 for PWM to PFM transitions. 4.3 Low-Dropout Regulator (LDO) The LDO output is a 300 mA low-dropout linear regulator that provides a regulated output voltage with a single 1 µF external capacitor. The output voltage is available in fixed options only, ranging from 1.5V to 3.3V. The LDO is stable using ceramic output capacitors that inherently provide lower output noise and reduce the size and cost of the regulator solution. The quiescent current consumed by the LDO output is typically less than 43.7 µA, with a typical dropout voltage of 137 mV at 200 mA. The LDO output is protected against overcurrent and overtemperature. While operating in Dropout mode, the LDO quiescent current will increase, minimizing the necessary voltage differential needed for the LDO output to maintain regulation. The LDO output is protected against overcurrent and overtemperature. © 2005 Microchip Technology Inc. TC1313 4.4 Soft Start Both outputs of the TC1313 are controlled during startup. Less than 1% of VOUT1 or VOUT2 overshoot is observed during start-up from VIN rising above the UVLO voltage; or SHDN1 or SHDN2 being enabled. © 2005 Microchip Technology Inc. 4.5 Overtemperature Protection The TC1313 has an integrated overtemperature protection circuit that monitors the device junction temperature and shuts the device off if the junction temperature exceeds the typical 165°C threshold. If the overtemperature threshold is reached, the soft start is reset so that, once the junction temperature cools to approximately 155°C, the device will automatically restart. DS21974A-page 15 TC1313 5.0 APPLICATION CIRCUITS/ISSUES 5.1 Typical Applications The TC1313 500 mA buck regulator + 300 mA LDO operates over a wide input-voltage range (2.7V to 5.5V) and is ideal for single-cell Li-Ion battery-powered applications, USB-powered applications, three-cell NiMH or NiCd applications and 3V to 5V regulated input applications. The 10-pin MSOP and 3X3 DFN packages provide a small footprint with minimal external components. 5.2 Fixed-Output Application A typical VOUT1 fixed-output voltage application is shown in “Typical Application Circuits”. A 4.7 µF VIN1 ceramic input capacitor, 4.7 µF VOUT1 ceramic capacitor, 1.0 µF ceramic VOUT2 capacitor and 4.7 µH inductor make up the entire external component solution for this dual-output application. No external dividers or compensation components are necessary. For this application, the input-voltage range is 2.7V to 4.2V, VOUT1 = 1.5V at 500 mA, while VOUT2 = 2.5V at 300 mA. 5.3 Adjustable-Output Application A typical VOUT1 adjustable-output application is also shown in “Typical Application Circuits”. For this application, the buck regulator output voltage is adjustable by using two external resistors as a voltage divider. For adjustable-output voltages, it is recommended that the top resistor divider value be 200 kΩ. The bottom resistor divider can be calculated using the following formula: EQUATION 5-1: V FB R BOT = R TOP × ⎛ --------------------------------⎞ ⎝ VOUT1 – V FB⎠ An additional VIN2 capacitor can be added to reduce high-frequency noise on the LDO input-voltage pin (VIN2). This additional capacitor (1 µF) is not necessary for typical applications. 5.4 Input and Output Capacitor Selection As with all buck-derived dc-dc switching regulators, the input current is pulled from the source in pulses. This places a burden on the TC1313 input filter capacitor. In most applications, a minimum of 4.7 µF is recommended on VIN1 (buck regulator input-voltage pin). In applications that have high source impedance, or have long leads (10 inches) connecting to the input source, additional capacitance should be used. The capacitor type can be electrolytic (aluminum, tantalum, POSCAP, OSCON) or ceramic. For most portable electronic applications, ceramic capacitors are preferred due to their small size and low cost. For applications that require very low noise on the LDO output, an additional capacitor (typically 1 µF) can be added to the VIN2 pin (LDO input voltage pin). Low ESR electrolytic or ceramic can be used for the buck regulator output capacitor. Again, ceramic is recommended because of its physical attributes and cost. For most applications, a 4.7 µF is recommended. Refer to Table 5-1 for recommended values. Larger capacitors (up to 22 µF) can be used. There are some advantages in load step performance when using larger value capacitors. Ceramic materials, X7R and X5R, have low temperature coefficients and are well within the acceptable ESR range required. TABLE 5-1: TC1313 RECOMMENDED CAPACITOR VALUES C (VIN1) C (VIN2) COUT1 COUT2 Min 4.7 µF none 4.7 µF 1 µF Max none none 22 µF 10 µF Example: RTOP = 200 kΩ VOUT1 = 2.1V VFB = 0.8V RBOT = 200 kΩ x (0.8V/(2.1V – 0.8V)) RBOT = 123 kΩ (Standard Value = 121 kΩ) For adjustable output applications, an additional R-C compensation is necessary for the buck regulator control loop stability. Recommended values are: RCOMP = 4.99 kΩ CCOMP = 33 pF DS21974A-page 16 © 2005 Microchip Technology Inc. TC1313 5.5 Inductor Selection For most applications, a 4.7 µH inductor is recommended to minimize noise. There are many different magnetic core materials and package options to select from. That decision is based on size, cost and acceptable radiated energy levels. Toroid and shielded ferrite pot cores will have low radiated energy but tend to be larger and more expensive. With a typical 2.0 MHz switching frequency, the inductor ripple current can be calculated based on the following formulas. V OUT DutyCycle = ------------V IN Duty cycle represents the percentage of switch-on time. EQUATION 5-3: DCR MAX Ω IDC (A) (max) Size WxLxH (mm) Coiltronics® SD10 2.2 0.091 1.35 5.2, 5.2, 1.0 max. SD10 3.3 0.108 1.24 5.2, 5.2, 1.0 max. SD10 4.7 0.154 1.04 5.2, 5.2, 1.0 max. 2.2 0.075 1.80 5.2, 5.2, 1.2 max. SD12 3.3 0.104 1.42 5.2, 5.2, 1.2 max. SD12 4.7 0.118 1.29 5.2, 5.2, 1.2 max. Coiltronics ® Sumida Corporation CMD411 2.2 0.116 0.950 4.4, 5.8, 1.2 max. CMD411 3.3 0.174 0.770 4.4, 5.8, 1.2 max. CMD411 4.7 0.216 0.750 4.4, 5.8, 1.2 max. 1008PS 4.7 0.35 1.0 3.8, 3.8, 2.74 max. 1812PS 4.7 0.11 1.15 5.9, 5.0, 3.81 max. Coilcraft 1 = DutyCycle × ---------F SW TC1313 RECOMMENDED INDUCTOR VALUES Part Value Number (µH) SD12 EQUATION 5-2: T ON TABLE 5-2: ® Where: FSW = Switching Frequency. The inductor ac ripple current can be calculated using the following relationship: EQUATION 5-4: ΔI L V L = L × -------Δt Where: VL = voltage across the inductor (VIN – VOUT) Δt = on-time of P-channel MOSFET Solving for ΔIL = yields: EQUATION 5-5: VL ΔI L = ------ × Δt L When considering inductor ratings, the maximum DC current rating of the inductor should be at least equal to the maximum buck regulator load current (IOUT1), plus one half of the peak-to-peak inductor ripple current (1/2 * ΔIL). The inductor DC resistance can add to the buck converter I2R losses. A rating of less than 200 mΩ is recommended. Overall efficiency will be improved by using lower DC resistance inductors. © 2005 Microchip Technology Inc. 5.6 5.6.1 Thermal Calculations BUCK REGULATOR OUTPUT (VOUT1) The TC1313 is available in two different 10-pin packages (MSOP and 3X3 DFN). By calculating the power dissipation and applying the package thermal resistance, (θJA), the junction temperature is estimated. The maximum continuous junction temperature rating for the TC1313 is +125°C. To quickly estimate the internal power dissipation for the switching buck regulator, an empirical calculation using measured efficiency can be used. Given the measured efficiency (Section 2.0 “Typical Performance Curves”), the internal power dissipation is estimated below. EQUATION 5-6: OUT1 × I OUT1⎞ ⎛V ------------------------------------⎝ Efficiency ⎠ – ( V OUT1 × IOUT1 ) = PDissipation The first term is equal to the input power (definition of efficiency, POUT/PIN = Efficiency). The second term is equal to the delivered power. The difference is internal power dissipation. This estimate assumes that most of the power lost is internal to the TC1313. There is some percentage of power lost in the buck inductor, with very little loss in the input and output capacitors. DS21974A-page 17 TC1313 For example, for a 3.6V input, 1.8V output with a load of 400 mA, the efficiency taken from Figure 2-7 is approximately 84%. The internal power dissipation is approximately 137 mW. 5.6.2 LDO OUTPUT (VOUT2) The internal power dissipation within the TC1313 LDO is a function of input voltage, output voltage and output current. The following equation can be used to calculate the internal power dissipation for the LDO. placed near their respective pins to minimize trace length. The CIN1 and COUT1 capacitor returns are connected closely together at the PGND plane. The LDO optional input capacitor (CIN2) and LDO output capacitor COUT2 are returned to the AGND plane. The analog ground plane and power ground plane are connected at one point (shown near L1). All other signals (SHDN1, SHDN2, feedback in the adjustable output case) should be referenced to AGND and have the AGND plane underneath them. - Via EQUATION 5-7: AGND to PGND P LDO = ( V IN ( MAX ) – V OUT2 ( MIN ) ) × I OUT2 ( MAX ) PLDO = LDO Pass device internal power dissipation VIN(MAX) = Maximum input voltage VOUT(MIN) = LDO minimum output voltage The maximum power dissipation capability for a package can be calculated given the junction-toambient thermal resistance and the maximum ambient temperature for the application. The following equation can be used to determine the package’s maximum internal power dissipation. 5.6.3 +VOUT1 * CIN2 Optional Where: LDO POWER DISSIPATION EXAMPLE Input Voltage VIN = 5V ±10% COUT1 L1 AGND PGND CIN2 1 10 +VIN2 2 9 +VOUT2 3 8 COUT2 CIN1 +VIN1 7 4 5 6 TC1313 PGND Plane AGND AGND Plane FIGURE 5-1: Component Placement, Fixed-Output 10-Pin MSOP. There will be some difference in layout for the 10-pin DFN package due to the thermal pad. A typical fixedoutput DFN layout is shown below. For the DFN layout, the VIN1 to VIN2 connection is routed on the bottom of the board around the TC1313 thermal pad. LDO Output Voltage and Current VOUT = 3.3V IOUT = 300 mA Internal Power Dissipation PLDO(MAX) = (VIN(MAX) – VOUT2(MIN)) x IOUT2(MAX) - Via * CIN2 Optional 5.7 PCB Layout Information Some basic design guidelines should be used when physically placing the TC1313 on a Printed Circuit Board (PCB). The TC1313 has two ground pins, identified as AGND (analog ground) and PGND (power ground). By separating grounds, it is possible to minimize the switching frequency noise on the LDO output. The first priority, while placing external components on the board, is the input capacitor (CIN1). Wiring should be short and wide; the input current for the TC1313 can be as high as 800 mA. The next priority would be the buck regulator output capacitor (COUT1) and inductor (L1). All three of these components are DS21974A-page 18 COUT1 AGND L1 PGND PLDO = (5.5V) – (0.975 x 3.3V)) x 300 mA PLDO = 684.8 mW +VOUT1 AGND to PGND CIN2 1 COUT2 2 3 4 5 +VIN2 +VOUT2 AGND 10 9 8 7 6 PGND CIN1 +VIN1 TC1313 PGND Plane AGND Plane FIGURE 5-2: Component Placement, Fixed-Output 10-Pin DFN. © 2005 Microchip Technology Inc. TC1313 5.8 Design Example VOUT1 = 2.0V @ 500 mA VOUT2 = 3.3V @ 300 mA VIN = 5V ±10% L = 4.7µH Calculate PWM mode inductor ripple current Nominal Duty Cycle = 2.0V/5.0V = 40% P-channel Switch-on time = 0.40 x 1/(2 MHz) = 200 ns VL = (VIN-VOUT1) = 3V ΔIL = (VL/L) x TON = 128 mA Peak inductor current: IL(PK) = IOUT1+1/2ΔIL = 564 mA Switcher power loss: Use efficiency estimate for 1.8V from Figure 2-7 Efficiency = 84%, PDISS1 = 190 mW Resistor Divider: RTOP = 200 kΩ RBOT = 133 kΩ LDO Output: PDISS2 = (VIN(MAX) – VOUT2(MIN)) x IOUT2(MAX) PDISS2 = (5.5V – (0.975) x 3.3V) x 300 mA PDISS2 = 684.8 mW Total Dissipation = 190 mW + 685 mW = 875 mW Junction Temp Rise and Maximum Ambient Operating Temperature Calculations 10-Pin MSOP (4-Layer Board with internal Planes) RθJA = 113° C/Watt Junction Temp. Rise = 875 mW x 113° C/Watt = 98.9°C Max. Ambient Temperature = 125°C - 98.9°C Max. Ambient Temperature = 26.1°C 10-Pin DFN RθJA = 41° C/Watt (4-Layer Board with internal planes and 2 vias) Junction Temp. Rise = 875 mW x 41° C/Watt = 35.9°C Max. Ambient Temperature = 125°C - 35.9°C Max. Ambient Temperature = 89.1°C This is above the +85°C max. ambient temperature. © 2005 Microchip Technology Inc. DS21974A-page 19 TC1313 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 10-Lead MSOP* Example: XXXXXX YWWNNN 51H0/E 527256 — 5 = TC1313 — 1 = 1.375V VOUT1 — H = 2.6V VOUT2 — 0 = Default * The MSOP package for this device has not been qualified at the time of this publication. Contact your Microchip sales office for availability. VOUT1 Code A 3.3V B Example: XXXX YYWW NNN 51H0 0527 256 Third letter represents VOUT2 configuration: Second letter represents VOUT1 configuration: Code 10-Lead DFN VOUT2 Code VOUT2 Code VOUT2 A 3.3V J 2.4V S 1.5V B 3.2V K 2.3V T — C 3.1V L 2.2V U — D 3.0V M 2.1V V — E 2.9V N 2.0V W — VOUT1 Code J 2.4V S 1.5V 3.2V K 2.3V T 1.4V C 3.1V L 2.2V U 1.3V D 3.0V M 2.1V V 1.2V E 2.9V N 2.0V W 1.1V F 2.8V O 1.9V X 1.0V G 2.7V P 1.8V Y 0.9V Code H 2.6V Q 1.7V Z Adj 0 Default 2 +50 mV to V2 I 2.5V R 1.6V 1 1.375V 1 +50 mV to V1 3 +50 mV to V1 and V2 Legend: XX...X Y YY WW NNN e3 * Note: DS21974A-page 20 VOUT1 Code F 2.8V O 1.9V X — G 2.7V P 1.8V Y — H 2.6V Q 1.7V Z — I 2.5V R 1.6V Fourth letter represents +50 mV Increments: Code Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2005 Microchip Technology Inc. TC1313 10-Lead Plastic Dual Flat No Lead Package (MF) 3x3x0.9 mm Body (DFN) – Saw Singulated p b E n L D D2 EXPOSED METAL PAD PIN 1 ID INDEX AREA (NOTE 2) 2 1 E2 TOP VIEW BOTTOM VIEW A A3 EXPOSED TIE BAR (NOTE 1) A1 Units Dimension Limits n e Number of Pins Pitch Overall Height Standoff Lead Thickness Overall Length Exposed Pad Length Overall Width Exposed Pad Width Lead Width Lead Length A A1 A3 E E2 D D2 b L MIN .031 .000 .112 .082 .112 .051 .008 .012 INCHES NOM 10 .020 BSC .035 .001 .008 REF. .118 .094 .118 .065 .010 .016 MAX MILLIMETERS* NOM 10 0.50 BSC 0.90 0.80 0.02 0.00 0.20 REF. 3.00 2.85 2.39 2.08 2.85 3.00 1.30 1.65 0.25 0.18 0.40 0.30 MIN .039 .002 .124 .096 .124 .067 .015 .020 MAX 1.00 0.05 3.15 2.45 3.15 1.70 0.30 0.50 *Controlling Parameter Notes: 1. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M 2. REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M Exposed pad varies according to die attach paddle size. Package may have one or more exposed tie bars at ends. Pin 1 visual index feature may vary, but must be located within the hatched area. JEDEC equivalent: Not Registered Drawing No. C04-063, Revised 05-05-05 © 2005 Microchip Technology Inc. DS21974A-page 21 TC1313 10-Lead Plastic Micro Small Outline Package (UN) (MSOP*) E E1 p D 2 B n 1 α A φ c A2 A1 L (F) β L1 Units Dimension Limits n p MIN INCHES NOM 10 .020 TYP .033 .193 BSC .118 BSC .118 BSC .024 .037 REF .009 - MAX MILLIMETERS* NOM 10 0.50 TYP. 0.85 0.75 0.00 4.90 BSC 3.00 BSC 3.00 BSC 0.60 0.40 0.95 REF 0° 0.08 0.15 0.23 5° 5° MIN Number of Pins Pitch .043 Overall Height A .037 Molded Package Thickness A2 .030 Standoff .006 A1 .000 Overall Width E Molded Package Width E1 Overall Length D Foot Length .031 L .016 Footprint F φ Foot Angle 0° 8° c Lead Thickness .009 .003 Lead Width .012 B .006 α Mold Draft Angle Top 5° 15° β Mold Draft Angle Bottom 5° 15° *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. MAX 1.10 0.95 0.15 0.80 8° 0.23 0.30 15° 15° JEDEC Equivalent: MO-187 Drawing No. C04-021 * The MSOP package for the TC1313 has not been qualified at the time of this publication. Contact your Microchip sales office for availability. DS21974A-page 22 © 2005 Microchip Technology Inc. TC1313 APPENDIX A: REVISION HISTORY Revision A (July 2005) • Original Release of this Document. © 2005 Microchip Technology Inc. DS21974A-page 23 TC1313 NOTES: DS21974A-page 24 © 2005 Microchip Technology Inc. TC1313 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. TC1313 X X VOUT1 VOUT2 Device: Options TC1313: X X XX Temp Package +50 mV Increments Range XX Tube or Tape & Reel PWM/LDO combo. Code VOUT1 Code VOUT2 Code +50 mV A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 1 3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V 2.6V 2.5V 2.4V 2.3V 2.2V 2.1V 2.0V 1.9V 1.8V 1.7V 1.6V 1.5V 1.4V 1.3V 1.2V 1.1V 1.0V 0.9V Adjustable 1.375V A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 1 3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V 2.6V 2.5V 2.4V 2.3V 2.2V 2.1V 2.0V 1.9V 1.8V 1.7V 1.6V 1.5V 0 1 2 3 Default V1 + 50 mV V2 + 50 mV V1 and V2 + 50 mV Examples: a) TC1313-1H0EMF: b) TC1313-1H0EUN: c) TC1313-1P0EMF: d) TC1313-1P0EUN: e) TC1313-DG0EMF: f) TC1313-RD1EMF: g) TC1313-ZS0EUN: h) TC1313-1H0EMFTR: i) TC1313-1H0EUNTR: j) TC1313-1P0EMFTR: k) TC1313-1P0EUNTR: l) TC1313-DG0EMFTR: m) TC1313-RD1EMFTR: n) TC1313-ZS0EUNTR: 1.375V, 2.6V, Default, 10LD DFN pkg. 1.375V, 2.6V, Default, 10LD MSOP pkg. 1.375V, 1.8V, Default, 10LD DFN pkg. 1.375V, 1.8V, Default, 10LD MSOP pkg. 3.0V, 2.7V, Default, 10LD DFN pkg. 1.65V, 3.0V, 10LD DFN pkg. Adj., 1.5V, Default, 10LD MSOP pkg. 1.375V, 2.6V, Default, 10LD DFN pkg Tape and Reel. 1.375V, 2.6V, Default, 10LD MSOP pkg Tape and Reel. 1.375V, 1.8V, Default, 10LD DFN pkg Tape and Reel. 1.375V, 1.8V, Default, 10LD MSOP pkg Tape and Reel. 3.0V, 2.7V, Default, 10LD DFN pkg Tape and Reel. 1.65V, 3.0V, 10LD DFN pkg Tape and Reel. Adj., 1.5V, Default, 10LD MSOP pkg Tape and Reel. * Contact Factory for Alternate Output Voltage and Reset Voltage Configurations. Temperature Range: E Package: MF UN * = -40°C to +85°C = Dual Flat, No Lead (3x3 mm body), 10-lead = Plastic Micro Small Outline (MSOP), 10-lead * The MSOP package for this device has not been qualified at the time of this publication. Contact your Microchip sales office for availability. Tube or Tape and Reel: Blank TR = Tube = Tape and Reel © 2005 Microchip Technology Inc. DS21974A-page 25 TC1313 NOTES: DS21974A-page 26 © 2005 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2005 Microchip Technology Inc. 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