MICROCHIP MCP1710T

MCP1710
Ultra-Low Quiescent Current LDO Regulator
Features
Description
• Ultra-Low 20 nA (typical) Quiescent Current
• Ultra-Low Shutdown Supply Current:
0.1 nA (typical)
• 200 mA Output Current Capability for
VOUT < 3.5V
• 100 mA Output Current Capability for
VOUT > 3.5V
• Input Operating Voltage Range: 2.7V to 5.5V
• Standard Output Voltages:
- 1.2V, 1.8V, 2.5V, 3.3V, 4.2V
• Low-Dropout Voltage: 450 mV Maximum at
200 mA
• Stable with 1.0 µF Ceramic Output Capacitor
• Overcurrent Protection
• Space Saving, 8-Lead Plastic 2 x 2 VDFN-8
The MCP1710 is a 200 mA for VOUT < 3.5V, 100 mA for
VOUT > 3.5V, low dropout (LDO) linear regulator that
provides high-current and low-output voltages, while
maintaining an ultra-low 20 nA of quiescent current
during device operation. In addition, the MCP1710 can
be shut down for an even lower 0.1 nA (typical) supply
current draw. The MCP1710 comes in five standard
fixed output voltage versions: 1.2V, 1.8V, 2.5V, 3.3V
and 4.2V. The 200 mA output current capability,
combined with the low output-voltage capability, make
the MCP1710 a good choice for new ultra-long-life LDO
applications that have high current demands, but
require ultra-low power consumption during sleep
states.
Applications
•
•
•
•
•
Energy harvesting
Long-life battery powered applications
Smart cards
Ultra-Low consumption “Green” products
Portable electronics
The MCP1710 is stable using ceramic output
capacitors that inherently provide lower output noise
and reduce the size and cost of the entire regulator
solution. Only 1 µF (2.2 µF recommended) of output
capacitance is needed to stabilize the LDO.
The MCP1710’s ultra-low quiescent and shutdown
current allows it to be paired with other ultra-low current
draw devices, such as Microchip’s nanoWatt XLP
technology devices, for a complete ultra-low power
solution.
Package Type
MCP1710
2 x 2 DFN*
GND 1
VOUT 2
GND 3
GND 4
8 SHDN
EP
9
7 VIN
6 FB
5 GND
* Includes Exposed Thermal Pad (EP); see Table 3-1.
 2012 Microchip Technology Inc.
DS25158A-page 1
MCP1710
Typical Application
VIN
CIN
COUT
LOAD
+
-
VOUT
FB
SHDN
GND
Functional Block Diagram
VIN
VOUT
Overcurrent
Voltage
Reference
+
-
SHDN
FB
SHDN
GND
DS25158A-page 2
 2012 Microchip Technology Inc.
MCP1710
1.0
ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification
is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
Absolute Maximum Ratings †
Input Voltage, VIN .............................................................6.0V
Maximum Voltage on Any Pin ............... (GND – 0.3V) to 6.0V
Output Short Circuit Duration ....... ............................Unlimited
Storage temperature .................................... -65°C to +150°C
Maximum Junction Temperature, TJ ........................... +150°C
Operating Junction Temperature, TJ ...............-40°C to +85°C
ESD protection on all pins  2 kV HBM
AC/DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, VIN = VR + 800 mV, V IN(min) = VR + 0.3V, VIN(max) = 5.5V,
Note 1, IOUT = 1 mA, CIN = COUT = 2.2 µF (X7R Ceramic), TA = +25°C. Boldface type applies for junction
temperatures, TJ (Note 4) of -40°C to +85°C
Parameters
Input Operating Voltage
Sym
Min
Typ
Max
Units
VIN
2.7
—
5.5
V
Conditions
VOUT
1.2
—
4.2
V
Input Quiescent Current
Iq
—
20
—
nA
VIN = VR + 0.8V to 5.5V,
IOUT = 0
Input Quiescent Current
for SHDN Mode
ISHDN
—
0.1
—
nA
SHDN = GND
Maximum Continuous
Output Current
IOUT
200
—
—
mA
VIN = VR + 0.8V to 5.5V
1.2V  VR  3.5V
100
—
—
mA
VIN = VR + 0.8V to 5.5V
3.5V  VR  5.5V
—
250
—
mA
VOUT = 0.9 x VR
1.2V  VR  3.5V
—
175
—
mA
VOUT = 0.9 x VR
3.5V  VR  5.5V
VR – 4%
—
VR + 4%
V
VR < 1.8V (Note 2)
VR – 2%
—
VR + 4%
V
1.8V < VR < 5.5V (Note 2)
-2
0.5
2
%/V
(Note 1) VIN  5V
VR < 1.8V, IOUT = 50 mA
-1
—
1
%/V
(Note 1)  VIN  5V
VR = 1.8V to 4.2V
IOUT = 50 mA
-2
1
2
%
VIN = to 5.5V,
1.2V < VR < 3.5V
IOUT = 1 mA to 200 mA,
-2
1
2
%
3.5V < VR < 5.5V
IOUT = 1 mA to 100 mA,
Output Voltage Range
Current Limit
Output Voltage Regulation
Line Regulation
Load Regulation
Note 1:
2:
3:
4:
IOUT
VOUT
VOUT/
(VOUT x VIN)
VOUT/VOUT
The minimum VIN must meet two conditions: VIN  2.7V and VIN  VR  VDROPOUT(MAX).
VR is the nominal regulator output voltage. VR = 1.2V, 2.5V, etc.
Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 3%
below its nominal value that was measured with an input voltage of VIN = VOUT(MAX) + VDROPOUT(MAX).
The junction temperature is approximated by soaking the device under test at an ambient temperature
equal to the desired junction temperature. The test time is small enough such that the rise in the junction
temperature over the ambient temperature is not significant.
 2012 Microchip Technology Inc.
DS25158A-page 3
MCP1710
AC/DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, VIN = VR + 800 mV, V IN(min) = VR + 0.3V, VIN(max) = 5.5V,
Note 1, IOUT = 1 mA, CIN = COUT = 2.2 µF (X7R Ceramic), TA = +25°C. Boldface type applies for junction
temperatures, TJ (Note 4) of -40°C to +85°C
Parameters
Dropout Voltage
Sym
Min
Typ
Max
Units
Conditions
VDROPOUT
—
—
450
mV
IOUT = 200 mA
1.2V  VR  3.5V, Note 3
—
—
400
mV
Iout = 100mA
3.5V  VR  5.5V, Note 3
Shutdown Input
Logic High Input
VSHDN-HIGH
70
—
—
%VIN
VIN = 2.7V to 5.5V
Logic Low Input
VSHDN-LOW
—
—
30
%VIN
VIN = 2.7V to 5.5V
TOR
—
30
—
ms
eN
—
0.37
—
PSRR
—
22
—
AC Performance
Output Delay From SHDN
Output Noise
Power Supply Ripple Rejection Ratio
Note 1:
2:
3:
4:
SHDN = GND to VIN,
VOUT = GND to 95% VR
µV/Hz IOUT = 50 mA, f = 1 kHz,
COUT = 2.2 µF (X7R Ceramic)
VOUT = 2.5V
dB
f = 100 Hz, IOUT = 10 mA,
VINAC = 200 mV pk-pk,
CIN = 0 µF
The minimum VIN must meet two conditions: VIN  2.7V and VIN  VR  VDROPOUT(MAX).
VR is the nominal regulator output voltage. VR = 1.2V, 2.5V, etc.
Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 3%
below its nominal value that was measured with an input voltage of VIN = VOUT(MAX) + VDROPOUT(MAX).
The junction temperature is approximated by soaking the device under test at an ambient temperature
equal to the desired junction temperature. The test time is small enough such that the rise in the junction
temperature over the ambient temperature is not significant.
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise noted, VIN = VR + 800 mV, V IN(min) = VR + 0.3V, VIN(max) = 5.5V,
Note 1, IOUT = 1 mA, CIN = COUT = 2.2 µF (X7R Ceramic), TA = +25°C. Boldface type applies for junction
temperatures, TJ (Note 4) of -40°C to +85°C
Parameters
Sym
Min
Typ
Max
Units
Conditions
Operating Junction
Temperature Range
TJ
-40
—
+85
°C
Steady State
Maximum Junction
Temperature
TJ
—
—
+150
°C
Transient
Storage Temperature Range
TA
-65
—
+150
°C
JA
—
73.1
—
°C/W
JC
—
10.7
—
°C/W
Temperature Ranges
Thermal Package Resistances
Thermal Resistance,
2 x 2 VDFN-8
DS25158A-page 4
FR4 Board Only
1 oz. Copper JEDEC Standard Board
with Thermal Vias
 2012 Microchip Technology Inc.
MCP1710
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, COUT = 2.2 µF Ceramic (X7R), CIN = 2.2 µF Ceramic (X7R), IOUT = 1 mA,
Temperature = +25°C, VIN = VOUT + 0.8V, SHDN = 1 M pullup to VIN.
1.240
1.205
IOUT = 0.1 mA
VIN = 2.5V
TJ = -40°C
1.200
1.230
Outtput Voltage (V)
Outtput Voltage (V)
1.235
1.225
TJ = +25°C
1.220
1.215
1.210
1.205
TJ = +85°C
1.200
TJ = +85°C
1.185
1 180
1.180
TJ = -40°C
1.170
2.5
3.0
3.5
4.0
4.5
Input Voltage (V)
5.0
5.5
FIGURE 2-1:
Output Voltage vs. Input
Voltage (VR = 1.2V).
0
50
100
150
Load Current (mA)
200
FIGURE 2-4:
Output Voltage vs. Load
Current (VR = 1.2V).
2.5025
2.510
IOUT = 0.1 mA
Ou
utput Voltage (V)
Outtput Voltage (V)
1.190
1.175
1.195
2.508
TJ = +25°C
1.195
TJ = +25°C
2.506
2.504
2.502
TJ = -40°C
2.500
TJ = +85°C
2.498
TJ = +85°C
2.5000
VIN = 3.3V
2.4975
TJ = +25°C
TJ = -40°C
2.4950
2.4925
2.496
2.4900
2.494
2.5
3.0
3.5
4.0
4.5
Input Voltage (V)
5.0
0
5.5
FIGURE 2-2:
Output Voltage vs. Input
Voltage (VR = 2.5V).
80
100
4.25
IOUT = 0.1 mA
TJ = -40°C
4.244
4.240
TJ = +25°C
TJ = +85°C
85°C
4.236
4.232
4.50
Ou
utput Voltage (V)
Ou
utput Voltage (V)
40
60
Load Current (mA)
FIGURE 2-5:
Output Voltage vs. Load
Current (VR = 2.5V).
4.252
4.248
20
VIN = 4.15V
4.24
4.23
TJ = +25°C
4.22
TJ = -40°C
TJ = +85°C
4.21
4.20
4.19
4.75
5.00
5.25
Input Voltage (V)
5.50
FIGURE 2-3:
Output Voltage vs. Input
Voltage (VR = 4.2V).
 2012 Microchip Technology Inc.
0
20
40
60
Load Current (mA)
80
100
FIGURE 2-6:
Output Voltage vs. Load
Current (VR = 4.2V).
DS25158A-page 5
MCP1710
Note: Unless otherwise indicated, COUT = 2.2 µF Ceramic (X7R), CIN = 2.2 µF Ceramic (X7R), IOUT = 1 mA,
Temperature = +25°C, VIN = VOUT + 0.8V, SHDN = 1 M pullup to VIN.
VOUT = 2.5V
0.25
0.20
TJ = +85°C
0.15
TJ = +25°C
TJ = -40°C
0.10
0 05
0.05
0.00
-0.05
0
20
40
60
Load Current (mA)
80
100
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0 06
0.06
0.04
0.02
0.00
VOUT = 4.2V
TJ = -40°C
TJ = +85°C
TJ = +25°C
0
20
40
60
Load Current (mA)
80
100
FIGURE 2-8:
Dropout Voltage vs. Load
Current (VR = 4.2V).
VIN = 5.2V
VOUT = 4.2V
IOUT = 50 mA
0.1
VIN = 2.8V
VOUT = 1.8V
IOUT = 50 mA
VIN = 3.5V
VOUT = 2.5V
IOUT = 50 mA
0.0
0.01
0.1
1
10
100
Frequency (kHz)
FIGURE 2-9:
DS25158A-page 6
100
1000
FIGURE 2-10:
Power Supply Ripple
Rejection vs. Frequency (VR = 1.2V).
10
VIN = 3.5V
0 IOUT
= 10 mA
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0.01
0.1
Noise vs. Frequency.
1
10
Frequency (kHz)
100
1000
FIGURE 2-11:
Power Supply Ripple
Rejection vs. Frequency (VR = 2.5V).
10
0 VIN = 5.2V
IOUT = 10 mA
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0.01
0.1
PSRR (dB)
Outpu
ut Noise (μV/Hz)
10
1
1
10
Frequency (kHz)
PSRR (dB)
Dro
opout Voltage (V)
FIGURE 2-7:
Dropout Voltage vs. Load
Current (VR = 2.5V).
10
VIN = 2.5V
0
IOUT = 10 mA
-10
-20
-30
-40
-50
-60
60
-70
-80
-90
-100
0.01
0.1
PSRR (dB)
Dro
opout Voltage (V)
0.30
1000
1
10
Frequency (kHz)
100
1000
FIGURE 2-12:
Power Supply Ripple
Rejection vs. Frequency (VR = 4.2V).
 2012 Microchip Technology Inc.
MCP1710
Note: Unless otherwise indicated, COUT = 2.2 µF Ceramic (X7R), CIN = 2.2 µF Ceramic (X7R), IOUT = 1 mA,
Temperature = +25°C, VIN = VOUT + 0.8V, SHDN = 1 M pullup to VIN.
IOUT = 10 mA
VOUT = 1.2V
VIN = 2.5V to 3.5V
IOUT = 100 nA to 10 mA
VOUT = 1.2V
AC1M 200 mV/div
FIGURE 2-13:
(VR = 1.2V).
10 mA/div
Dynamic Load Step
2 V/div
FIGURE 2-16:
(VR = 1.2V).
1 V/div
Dynamic Line Step
IOUT = 10 mA
VOUT = 2.5V
VIN = 3.5V to 4.5V
VOUT = 2.5V
IOUT = 100 nA to 10 mA
AC1M 200 mV/div
FIGURE 2-14:
(VR = 2.5V).
10 mA/div
Dynamic Load Step
2 V/div
FIGURE 2-17:
(VR = 2.5V).
1 V/div
Dynamic Line Step
IOUT = 10 mA
VOUT = 4.2V
VN = 4.5V to 5.5V
IOUT = 100 nA to 10 mA
AC1M 200 mV/div
FIGURE 2-15:
(VR = 4.2V).
10 mA/div
Dynamic Load Step
 2012 Microchip Technology Inc.
VOUT = 4.2V
2 V/div
FIGURE 2-18:
(VR = 4.2V).
1 V/div
Dynamic Line Step
DS25158A-page 7
MCP1710
Note: Unless otherwise indicated, COUT = 2.2 µF Ceramic (X7R), CIN = 2.2 µF Ceramic (X7R), IOUT = 1 mA,
Temperature = +25°C, VIN = VOUT + 0.8V, SHDN = 1 M pullup to VIN.
IOUT = 10 mA
IOUT = 100 nA
SHDN Signal
VIN = 2.5V
VOUT = 1.2V
VOUT = 1.2V
2 V/div
FIGURE 2-19:
(VR = 1.2V).
2 V/div
2 V/div
Startup From VIN
FIGURE 2-22:
(VR = 1.2V).
IOUT = 100 nA
1 V/div
Startup From SHDN
IOUT = 10 mA
SHDN Signal
VIN = 3.5V
VOUT = 2.5V
VOUT = 2.5V
2 V/div
FIGURE 2-20:
(VR = 2.5V).
2 V/div
Startup From VIN
2 V/div
FIGURE 2-23:
(VR = 2.5V).
IOUT = 100 nA
1 V/div
Startup From SHDN
IOUT = 10 mA
VIN = 5.2V
SHDN Signal
VOUT = 4.2V
VOUT = 4.2V
2 V/div
FIGURE 2-21:
(VR = 4.2V).
DS25158A-page 8
2 V/div
Startup From VIN
2 V/div
FIGURE 2-24:
(VR = 4.2V).
1 V/div
Startup From SHDN
 2012 Microchip Technology Inc.
MCP1710
Note: Unless otherwise indicated, COUT = 2.2 µF Ceramic (X7R), CIN = 2.2 µF Ceramic (X7R), IOUT = 1 mA,
Temperature = +25°C, VIN = VOUT + 0.8V, SHDN = 1 M pullup to VIN.
0.05
2.00
IOUT = 0 mA to 100 mA
Load
d Regulation (%)
Loa
ad Regulation (%)
IOUT = 0 mA to 100 mA
1.50
VIN = 2.5V
1.00
VIN = 4.0V
0.50
VIN = 5.5V
5 5V
0.00
-0.50
0.04
VIN = 5.5V
0.03
VIN = 5.0V
0.02
VIN = 4.5V
0.01
0.00
-0.01
-40
-15
10
35
60
85
-40
-15
10
35
60
Junction Temperature (°C)
Junction Temperature (°C)
FIGURE 2-25:
Load Regulation vs.
Junction Temperature (VR = 1.2V).
FIGURE 2-27:
Load Regulation vs.
Junction Temperature (VR = 4.2V).
0.30
0.50
IOUT = 1 mA
IOUT = 0 mA to 100 mA
0.20
0.45
0.10
Line Regulation (%)
Load
d Regulation (%)
85
VIN = 2.8V
0.00
-0.10
VIN = 4.0V
0 20
-0.20
VIN = 5.5V
-0.30
VR = 1.2V
0.40
0.35
VR = 2.5V
0.30
0.25
VR = 4.2V
0.20
-0.40
0.15
-40
-15
10
35
60
85
-40
Junction Temperature (°C)
FIGURE 2-26:
Load Regulation vs.
Junction Temperature (VR = 2.5V).
 2012 Microchip Technology Inc.
FIGURE 2-28:
Temperature.
-15
10
35
60
Junction Temperature (°C)
85
Line Regulation vs. Junction
DS25158A-page 9
MCP1710
160
50
45
40
35
30
25
20
15
10
5
0
VOUT = 1.2V
VIN = 4.0V
VOUT = 1.2V
140
Grou
und Current (µA)
Quiesc
cent Current (nA)
Note: Unless otherwise indicated, COUT = 2.2 µF Ceramic (X7R), CIN = 2.2 µF Ceramic (X7R), IOUT = 1 mA,
Temperature = +25°C, VIN = VOUT + 0.8V, SHDN = 1 M pullup to VIN.
TJ = +85°C
TJ = -40°C
TJ = +25°C
2.5
3
3.5
TJ = +25°C
120
100
TJ = +85°C
80
TJ = -40°C
60
40
20
4
4.5
5
5.5
0
0
Input Voltage (V)
FIGURE 2-29:
Voltage.
Gro
ound Current (µA)
0.95
Quiescent Current vs. Input
FIGURE 2-31:
Current.
20
40
60
Load Current (mA)
80
100
Ground Current vs. Load
VIN = 2.5V
VOUT = 1.2V
IOUT = 0.1mA
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
-50
-25
FIGURE 2-30:
Temperature.
DS25158A-page 10
0
25
50
75
Junction Temperature (°C)
100
Ground Current vs. Junction
 2012 Microchip Technology Inc.
MCP1710
3.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
3.1
PIN FUNCTION TABLE
MCP1710
VDFN
Name
1, 3, 4, 5,
GND
Ground
Regulated Output Voltage
Description
2
VOUT
6
FB
Output Voltage Feedback Input
7
VIN
Input Voltage Supply
8
SHDN
9
EP
Shutdown Control Input (active-low)
Exposed Pad, connected to GND.
Ground Pin (GND)
3.4
Input Voltage Supply Pin (VIN)
For optimal Noise and Power Supply Rejection Ratio
(PSRR) performance, the GND pin of the LDO should
be tied to an electrically quiet circuit ground. This will
help the LDO power supply rejection ratio and noise
performance. The ground pin of the LDO only conducts
the ground current, so a heavy trace is not required.
For applications that have switching or noisy inputs, tie
the GND pin to the return of the output capacitor.
Ground planes help lower the inductance and voltage
spikes caused by fast transient load currents.
Connect the unregulated or regulated input voltage
source to VIN. If the input voltage source is located
several inches away from the LDO, or the input source
is a battery, it is recommended that an input capacitor
be used. A typical input capacitance value of 1 µF to
10 µF should be sufficient for most applications (2.2 µF,
typical). The type of capacitor used can be ceramic,
tantalum, or aluminum electrolytic. The low ESR
characteristics of the ceramic capacitor will yield better
noise and PSRR performance at high frequency.
3.2
3.5
Regulated Output Voltage Pin
(VOUT)
The VOUT pin is the regulated output voltage of the
LDO. A minimum output capacitance of 1.0 µF is
required for LDO stability. The MCP1710 is stable with
ceramic,
tantalum
and
aluminum-electrolytic
capacitors. See Section 4.2 “Output Capacitor” for
output capacitor selection guidance.
3.3
Feedback Pin (FB)
The output voltage is connected to the FB input. This
sets the output voltage regulation value.
 2012 Microchip Technology Inc.
Shutdown Control Input (SHDN)
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled. When the SHDN input is
pulled low, the LDO enters a low-quiescent current
shutdown state, where the typical quiescent current is
0.1 nA.
3.6
Exposed Pad Pin (EP)
The VDFN-8 package has an exposed metal pad on
the bottom of the package. The exposed metal pad
gives the device better thermal characteristics by
providing a good thermal path to either the PCB or heat
sink, to remove heat from the device. The exposed pad
of the package is at ground potential.
DS25158A-page 11
MCP1710
NOTES:
DS25158A-page 12
 2012 Microchip Technology Inc.
MCP1710
4.0
DEVICE OVERVIEW
The MCP1710 is a 100 mA/200 mA output current, low
dropout (LDO) voltage regulator. The low dropout
voltage of 450 mV maximum at 200 mA of current
makes it ideal for battery-powered applications. The
input voltage range is 2.7V to 5.5V. The MCP1710 adds
a shutdown-control input pin. The MCP1710 is
available in five standard fixed-output voltage options:
1.2V, 1.8V, 2.5V, 3.3V and 4.2V. The MCP1710 uses a
proprietary voltage reference and sensing scheme to
maintain the ultra-low 20 nA quiescent current.
4.1
Output Current and Current
Limiting
The MCP1710 LDO is tested and ensured to supply a
minimum of 200 mA of output current for the 1.2V to
3.5V output range, and 100 mA of output current for the
3.5V to 4.2V output range. The MCP1710 has no minimum output load, so the output load current can go to
0 mA and the LDO will continue to regulate the output
voltage within the specified tolerance.
The MCP1710 also incorporates an output current limit.
The current limit is set to 250 mA typical for the
1.2V  VR  3.5V range, and 175 mA typical for the
3.5V  VR  5.5V range.
4.2
Output Capacitor
The MCP1710 requires a minimum output capacitance
of 1 µF for output voltage stability. Ceramic capacitors
are recommended because of their size, cost and
robust environmental qualities.
Aluminum-electrolytic and tantalum capacitors can be
used on the LDO output as well. The output capacitor
should be located as close to the LDO output as is
practical. Ceramic materials X7R and X5R have low
temperature coefficients and are well within the
acceptable ESR range required. A typical 1 µF X7R
0805 capacitor has an ESR of 50 m.
4.3
For applications that have output step load
requirements, the input capacitance of the LDO is very
important. The input capacitance provides the LDO
with a good local low-impedance source to pull the
transient currents from. This will allow the LDO to
respond quickly to the output load step. For good stepresponse performance, the input capacitor should be of
equivalent or higher value than the output capacitor.
The capacitor should be placed as close to the input of
the LDO as is practical. Larger input capacitors will also
help reduce any high-frequency noise on the input and
output of the LDO, and reduce the effects of any
inductance that exists between the input source
voltage and the input capacitance of the LDO.
4.4
Shutdown Input (SHDN)
The SHDN input is an active-low input signal that turns
the LDO on and off. The SHDN threshold is a
percentage of the input voltage. The maximum inputlow logic level is 30% of VIN and the minimum high logic
level is 70% of VIN.
On the rising edge of the SHDN input, the shutdown
circuitry has a 30 ms (typical) delay before allowing the
LDO output to turn on. This delay helps to reject any
false turn-on signal or noise on the SHDN input signal.
After the 30 ms delay, the LDO output enters its current
limited soft-start period as it rises from 0V to its final
regulation value. If the SHDN input signal is pulled low
during the 30 ms delay period, the timer will be reset
and the delay time will start over again on the next rising edge of the SHDN input. The total time from the
SHDN input going high (turn-on) to the LDO output
being in regulation is typically 30 ms. See Figure 4-1
for a timing diagram of the SHDN input.
TOR
20 ns (typical)
30 ms
10 µs
SHDN
Input Capacitor
Low input-source impedance is necessary for the LDO
output to operate properly. When operating from
batteries, or in applications with long lead length
(> 10 inches) between the input source and the LDO,
some input capacitance is recommended. A minimum
of 1.0 µF to 4.7 µF is recommended for most
applications.
 2012 Microchip Technology Inc.
VOUT
FIGURE 4-1:
Diagram.
Shutdown Input Timing
DS25158A-page 13
MCP1710
4.5
Dropout Voltage
Dropout voltage is defined as the input-to-output
voltage differential at which the output voltage drops
3% below the nominal value that was measured with a
VR + 0.8V differential applied. The MCP1710 LDO has
a low-dropout voltage specification of 450 mV for the
1.2V  VR  3.5V range (typical) at 200 mA out, and
400mV for the 3.5V  VR  5.5V range (typical) at
100 mA
out.
See
Section 1.0
“Electrical
Characteristics” for maximum dropout voltage
specifications.
DS25158A-page 14
 2012 Microchip Technology Inc.
MCP1710
5.0
APPLICATION
CIRCUITS/ISSUES
5.1
Typical Application
The MCP1710 is used for applications that require
ultra-low quiescent current draw.
VOUT
VIN
SHDN
GND
LOAD
COUT
CIN
+
-
FB
The total power dissipated within the MCP1710 is the
sum of the power dissipated in the LDO pass device
and the P(IGND) term. Because of the CMOS
construction, the typical IGND for the MCP1710 is
200 µA at full load. Operating at a maximum VIN of 5.5V
results in a power dissipation of 1.1 mW. For most
applications, this is small compared to the LDO pass
device power dissipation, and can be neglected.
The maximum continuous operating junction
temperature specified for the MCP1710 is +85°C. To
estimate the internal junction temperature of the
MCP1710, the total internal power dissipation is
multiplied by the thermal resistance from junction-toambient (RJA) of the device. The thermal resistance
from junction-to-ambient for the 2 x 2 VDFN-8 package
is estimated at 73.1°C/W.
EQUATION 5-3:
FIGURE 5-1:
5.2
Typical Application Circuit.
Power Calculations
5.2.1
POWER DISSIPATION
The internal power dissipation within the MCP1710 is a
function of input voltage, output voltage, output current
and quiescent current. Equation 5-1 can be used to
calculate the internal power dissipation for the LDO.
EQUATION 5-1:
P LDO =  VIN  MAX  – V OUT  MIN    I OUT  MAX 
Where:
PLDO = LDO Pass device internal power
dissipation
T J  MAX  = PTOTAL  R  JA + T A  MAX 
Where:
TJ(MAX) = Maximum continuous junction
temperature
PTOTAL = Total device power dissipation
RJA = Thermal resistance from junction to
ambient
TAMAX = Maximum ambient temperature
The maximum power dissipation capability for a
package can be calculated given the junction-toambient thermal resistance and the maximum ambient
temperature for the application. Equation 5-4 can be
used to determine the package maximum internal
power dissipation.
VIN(MAX) = Maximum input voltage
VOUT(MIN) = LDO minimum output voltage
EQUATION 5-4:
 T J  MAX  – T A  MAX  
P D  MAX  = --------------------------------------------------R  JA
IOUT(MAX) = Maximum output current
In addition to the LDO pass element power dissipation,
there is power dissipation within the MCP1710 as a
result of quiescent or ground current. The power
dissipation as a result of the ground current can be
calculated using Equation 5-2:
EQUATION 5-2:
PI  GND  = V IN  MAX   I GND
Where:
PD(MAX) = Maximum device power dissipation
TJ(MAX) = maximum continuous junction
temperature
TA(MAX) = maximum ambient temperature
RJA = Thermal resistance from
junction-to-ambient
Where:
PI(GND) = Power dissipation due to the
quiescent current of the LDO
VIN(MAX) = Maximum input voltage
IGND = Current flowing in the GND pin
 2012 Microchip Technology Inc.
DS25158A-page 15
MCP1710
EQUATION 5-5:
T J  RISE  = P D  MAX   R  JA
TJ(RISE) = Rise in device junction temperature
over the ambient temperature
PD(MAX) = Maximum device power dissipation
RJA = Thermal resistance from junction-toambient
EQUATION 5-6:
T J = T J  RISE  + T A
TJ = Junction temperature
TJ(RISE) = Rise in device junction temperature
over the ambient temperature
TA = Ambient temperature
5.3.1.1
Device Junction Temperature Rise
The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction-to-ambient for the application. The
thermal resistance from junction-to-ambient (RJA) is
derived from EIA/JEDEC standards for measuring
thermal resistance. The EIA/JEDEC specification is
JESD51. The standard describes the test method and
board specifications for measuring the thermal
resistance from junction-to-ambient. The actual
thermal resistance for a particular application can vary
depending on many factors such as copper area and
thickness. Refer to AN792, “A Method to Determine
How Much Power a SOT-23 Can Dissipate in an
Application” (DS00792), for more information regarding
this subject.
EXAMPLE 5-2:
TJ(RISE) = PTOTAL x RJA
5.3
Typical Application Examples
Internal power dissipation, junction temperature rise,
junction temperature and maximum power dissipation
are calculated in the following example. The power dissipation as a result of ground current is small enough to
be neglected.
5.3.1
POWER DISSIPATION EXAMPLE
EXAMPLE 5-1:
TJRISE = 0.206W x 73.1°C/W
TJRISE = 15.1°C
5.3.1.2
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:
EXAMPLE 5-3:
Package
TJ = TJRISE + TA(MAX)
Package Type = 2 x 2 VDFN-8
TJ = 15.1°C + 60.0°C
Input Voltage
TJ = 75.1°C
VIN = 3.3V ± 5%
LDO Output Voltage and Current
VOUT = 2.5V
5.3.1.3
Maximum Package Power
Dissipation at +60°C Ambient
Temperature
IOUT = 200 mA
Maximum Ambient Temperature
TA(MAX) = +60°C
Internal Power Dissipation
PLDO(MAX) = (VIN(MAX) – VOUT(MIN)) x IOUT(MAX)
PLDO = ((3.3V x 1.05) – (2.5V x 0.975))
x 200 mA
EXAMPLE 5-4:
2x2 DFN-8 (73.1°C/W RJA):
PD(MAX) = (85°C – 60°C)/73.1°C/W
PD(MAX) = 0.342W
PLDO = 0.206 Watts
DS25158A-page 16
 2012 Microchip Technology Inc.
MCP1710
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
Example:
8-Lead VDFN (2 x 2 x 0.9)
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Part Number
Code
MCP1710T-12I/LZ
AAA
MCP1710T-18I/LZ
AAB
MCP1710T-25I/LZ
AAC
MCP1710T-33I/LZ
AAD
MCP1710T-42I/LZ
AAE
AAA
256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
 2012 Microchip Technology Inc.
DS25158A-page 17
MCP1710
DS25158A-page 18
 2012 Microchip Technology Inc.
MCP1710
 2012 Microchip Technology Inc.
DS25158A-page 19
MCP1710
DS25158A-page 20
 2012 Microchip Technology Inc.
MCP1710
APPENDIX A:
REVISION HISTORY
Revision A (September 2012)
• Original Release of this Document.
 2012 Microchip Technology Inc.
DS25158A-page 21
MCP1710
NOTES:
DS25158A-page 22
 2012 Microchip Technology Inc.
MCP1710
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
-XX
T
X/
Device Tape and Output
Reel Voltage
XX
Temp. Package
Device:
MCP1710T: 200 mA Low Dropout Regulator
Tape and Reel
Output Voltage*:
12
18
25
33
42
=
=
=
=
=
1.2V “Standard”
1.8V “Standard”
2.5V “Standard”
3.3V “Standard”
4.2V “Standard”
*Contact factory for other output voltage options
Temperature:
I
= -40C to +85C (Industrial)
Package Type:
LZ
= Very Thin Dual Flatpack, No Lead (VDFN), 8-Lead
 2012 Microchip Technology Inc.
Examples:
a)
b)
c)
d)
e)
MCP1710T-12I/LZ: Tape and Reel,
1.2V Output Voltage,
Industrial Temp.,
8-LD VDFN package
MCP1710T-18I/LZ: Tape and Reel,
1.8V Output Voltage,
Industrial Temp.,
8-LD VDFN package
MCP1710T-25I/LZ: Tape and Reel,
2.5V Output Voltage,
Industrial Temp.,
8-LD VDFN package
MCP1710T-33I/LZ: Tape and Reel,
3.3V Output Voltage,
Industrial Temp.,
8-LD VDFN package
MCP1710T-42I/LZ: Tape and Reel,
4.2V Output Voltage,
Industrial Temp.,
8-LD VDFN package
DS25158A-page 23
MCP1710
NOTES:
DS25158A-page 24
 2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2012, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-62076-575-3
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2012 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS25158A-page 25
Worldwide Sales and Service
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Tel: 86-27-5980-5300
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Tel: 886-2-2500-6610
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Tel: 86-29-8833-7252
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Tel: 39-0331-742611
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DS25158A-page 26
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11/29/11
 2012 Microchip Technology Inc.