STMICROELECTRONICS TDA7463A

TDA7463AD
LOW VOLTAGE TONE CONTROL
DIGITALLY CONTROLLED AUDIO PROCESSOR
1
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2
Figure 1. Package
FEATURES
2 STEREO INPUT
1 STEREO OUTPUT
TREBLE BOOST
BASS CONTROL
BASS AUTOMATIC LEVEL CONTROL
VOLUME CONTROL IN 1dB STEPS
MUTE
STAND-BY FUNCTION SOFTWARE
CONTROLLED
ALL FUNCTION ARE PROGRAMMABLE VIA
SERIAL BUS
SSO20P
Table 1. Order Codes
Part Number
Package
TDA7463AD
SSO20P
The control of all the functions is accomplished by
serial bus.
The AC signal setting is obtained by resistor networks and switches combined with operational
DESCRIPTION
The TDA7463AD is a volume tone (bass and treble) processor for quality audio applications in Low
voltage supply portable systems.
amplifiers.
Thanks to the used BIPOLAR/CMOS Technology,
Low Distortion, Low Noise and DC stepping are
obtained.
Bass ALC (Automatic Level Control) function can
be adjusted by a dedicated pin.
Figure 2. Block Diagram
R5
5.6K
C14 3.3nF
TREBLE-R
BASSI-R
17
C1 0.47µF
IN2-R
100nF
C13
C12
16
BASSO-R
15
RB
18
50K
C2 0.47µF
IN1-R
100nF
INPUT
SELECT
-63dB
CONTROL
0/-10dB
x1
19
BASS
TREBLE
14
OUT-R
x5
50K
VS
BASS_ALC
CONTROL
C3 0.47µF
ALC
1
10
20
HALF_WAVE
RECTIFIER
C4 0.47µF
2
C5 0.47µF
3
BASS
SDA
0/-10dB
50K
RB
4
C6
3.3nF
6
BASSI-L
C7
100nF
11
BASSO-L
C8
100nF
R2
5.6K
VS
SUPPLY
VREF
5
TREBLE-L
D99AU1049
June 2004
DGND
SCL
7
x1
-63dB
CONTROL
SDA
VS
OUT-L
x5
TREBLE
IN2-L
2
3
4
9
50K
SCL
R4
1KΩ
I2C BUS DECODER + LATCHES
+
R1
1M
IN1-L
I2C
VS
R3
1KΩ
GND
VS
1
C10
100nF
12
C11
100µF
CREF
C9
22µF
REV. 3
1/11
TDA7463AD
Table 2. Absolute Maximum Ratings
Symbol
VS
Parameter
Value
Unit
5
V
Operating Supply Voltage
Tamb
Operating Ambient Temperature
-10 to 85
°C
Tstg
Storage Temperature Range
-55 to 150
°C
Figure 3. Pin Connection (Top view)
VS
1
20
ALC
IN1-L
2
19
IN1-R
IN2-L
3
18
IN2-R
TREBLE-L
4
17
TREBLE-R
BASSI-L
5
16
BASSI-R
BASSO-L
6
15
BASSO-R
OUT-L
7
14
OUT-R
N.C.
8
13
N.C.
SDA
9
12
CREF
SCL
10
11
GND
D99AU1050
Table 3. Thermal Data
Symbol
Rth j-pin
Parameter
Thermal Resistance Junction-pins
Value
Unit
85
°C/W
Table 4. Quick Reference Data
Symbol
Parameter
Typ
Max
Unit
2.4
3
V
VS
Supply Voltage
1.8
VCL
Max. input signal handling
0.2
THD
Total Harmonic Distortion V = 0.1Vrms; f = 1KHz
S/N
Signal to Noise Ratio V out = 0.1Vrms (mode = OFF)
80
dB
SC
Channel Separationf = 1KHz
80
dB
Vrms
0.1
%
Volume Control (1dB step)
-63
0
dB
-10dB damping
-10
0
dB
14dB
0
14
dB
Treble Control
0
8
dB
Bass Control
0
14
dB
Mute Attenuation
2/11
Min
100
dB
TDA7463AD
Table 5. ELECTRICAL CHARACTERISTCS
(refer to the test circuit Tamb = 25°C, VS =2.4V, RL = 10KΩ, R G = 600Ω, all controls flat, unless otherwise
specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
1.8
2.4
3
Unit
SUPPLY
VS
Supply Voltage
IS
Supply Current
4
mA
IST-BY
Stand-By Current
50
µA
SVR
Ripple Rejection
70
dB
V
INPUT STAGE
RIN
Input Resistance
VCL
Clipping Level
35
THD = 0.3%
50
65
0.2
K&
Vrms
VOLUME CONTROL
CRANGE
Control Range
63
dB
AV MIN
Min Attenuation
-1
0
1
dB
AV MAX
Max. Attenuation
62
63
64
dB
ASTEP
Step Resolution
Amute
Mute Attenuation
1
80
dB
100
dB
A-10dB
-10dB damping
10
dB
G14dB
14dB gain
14
dB
14
dB
BASS CONTROL (1)
Gb
Control Range
RB
Internal Feedback Resistance
Max. Boost/on
33.75
45
56.25
KΩ
TREBLE CONTROL (1)
Gt
Control Range
Max. Boost on
8
dB
AUDIO OUTPUTS
VCLIP
RL
VDC
Clipping Level
d = 0.3%
Output Load Resistance
0.2
VRMS
10
DC Voltage Level
K&
0.8
V
Outout Muted
All gains = 0dB;
BW = 20Hz to 20KHz flat
5
8
µV
µV
All gains 0dB; VO = 0.1VRMS ;
80
dB
80
dB
GENERAL
ENO
Et
Output Noise
Total Tracking Error
S/N
Signal to Noise Ratio
SC
Channel Separation Left/Right
d
Distortion
0
AV = 0; VI = 0.1VRMS ;
1
dB
0.1
%
0.5
V
BUS INPUT
VIL
Input Low Voltage
VIH
Input High Voltage
IIN
Input Current
VIN = 0.4V
VO
Output Voltage SDA Acknowledge
IO = 1.6mA
1.9
-5
V
5
µA
0.4
V
Note: 1. BASS and TREBLE response: The center frequency and the response quality can be chosen by the external circuitry.
3/11
TDA7463AD
3
DATA BYTES
Address = (HEX) 10001000
3.1 FUNCTION SELECTION:
The first byte (subaddress)
MSB
LSB
SUBADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
X
X
B
0
0
0
0
STAND-BY & TREBLE & OTHERS
X
X
B
0
0
0
1
BASS
X
X
B
0
0
1
0
VOLUME
B = 1 incremental bus; active
B = 0 no incremental bus;
X = indifferent 0,1
3.1.1 STAND_BY & TREBLE & OTHERS
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
STAND-BY
1
ALL CIRCUITS STOP
TREBLE
1
STAND-BY (Treble block stops)
1
0
BOOST OFF
0
0
BOOST ON
1
0
0
High Boost (+8dB)
0
0
0
Low Boost (+4dB)
MUTE
1
Input Mute ON
0
Input Mute OFF
1
Output Mute ON
0
Output Mute OFF
BASS
1
Release Current Circuit ON
0
Release Current Circuit OFF
INPUT Select
1
INPUT 1
0
INPUT 2
4/11
TDA7463AD
3.1.2 BASS
MSB
D7
D6
D5
D4
D3
D2
D1
1
0
1
0
0
0
LSB
D0
1
1
0
0
0
1
1
0
0
0
1
1
0
1
1
0
1
0
1
BASS
STAND-BY (Bass block stops)
BASS (boost OFF)
BASS (boost ON)
High boost (Ex. + 14dB)
Low boost (Ex. + 6dB)
ALC mode OFF (ALC block stops)
ALC mode ON
Attack time resistor (12.5K&)
Release current (0.4 A)
Attack time resistor (25K&)
Release current (0.2 A)
Attack time resistor (50K&)
Release current (0.1 A)
Attack time resistor (100K&)
Release current (0.05 A)
Threshold1 (0.2Vrms)
Threshold2 (0.14Vrms)
Threshold3 (0.1Vrms)
Threshold4 (0.07Vrms)
3.1.3 VOLUME
MSB
D7
D6
D5
0
0
0
0
1
1
1
1
1
0
1
0
D4
0
0
1
1
0
0
1
1
D3
0
1
0
1
0
1
0
1
D2
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
LSB
D0
0
1
0
1
0
1
0
1
VOLUME
1 dB STEPS
0
-1
-2
-3
-4
-5
-6
-7
8 dB STEPS
0
-8
-16
-24
-32
-40
-48
-56
OUTPUT GAIN
0dB
+14dB
OUTPUT ATTENUATION
0dB
-10dB
VOLUME: 0 ~ -63dB
5/11
TDA7463AD
3.2 ALC IN general:
3.2.1 VOLUME setting with ALC
6/11
Target
Volume
[dB]
Volume
[dB]
Output Gain
0/+14dB
0/+14dB
Output Attenuation
0/-10dB
[dB]
0
-14
+14
0
-1
-15
-2
-16
-3
-17
-4
-18
-5
-19
-6
-20
-7
-21
-8
-22
0
0
0
-10
-9
-23
-10
-24
-11
-25
-12
-26
-13
-27
-14
-14
-15
-15
-16
-16
-17
-17
-18
-18
-19
-19
-20
-20
-21
-21
-22
-22
-23
-23
-24
-14
-25
-15
-26
-16
-27
-17
:
:
:
:
-70
-60
-71
-61
-72
-62
-73
-63
TDA7463AD
Figure 4. PIN: IN-L, IN-R
Figure 7. PIN: OUT-L, OUT-R
VS
VS
20µA
20µA
10Ω
50K
GND
GND
Vref
D99AU1107
D99AU1106
Figure 5. PIN: TREBLE-L, TREBLE-R
Figure 8. PIN: SCL, SDA
VS
20µA
25K
GND
D99AU1109
GND
D99AU1108
Figure 6. PIN: BASSI-L, BASSI-R
Figure 9. PIN: BASSO-L, BASSO-R
VS
VS
20µA
20µA
GND
45K
45K
BASSO-L,BASSO-R
GND
D99AU1110
BASSI-L,BASSI-R
D99AU1111
7/11
TDA7463AD
Figure 10. PIN: ALC
Figure 12. BASS ALC: Threshold Curve
VO
(Vrms)
VS
D99AU1115
Bass boost
without ALC
VS=1.8V; f=100Hz;
Volume=-14dB;
Output gain=+14dB
Intern. release circuit=ON
Bass boost
with ALC
20µA
Threshold:
8dB
11dB
14dB
0.1
17dB
100K
Bass=
+14dB boost
flat
GND
D99AU1112
0.01
0.01
Figure 11. PIN: CREF
0.1
VI(Vrms)
Figure 13. BAS ALC: THD
D99AU1114
THD V =1.8V; f=100Hz;
S
(%) Volume=-14dB;
VS
10
Output gain=+14dB
Intern. release circuit=ON
Bass boost
with ALC
Threshold
0.1
17dB
8dB
14d
B
1K
B
1
11d
20µA
Bass boost
without ALC
0.01
GND
flat
D99AU1113
0.001
0.01
8/11
0.1
VI(Vrms)
TDA7463AD
Figure 14. SSOP20 Mechanical Data & Package Dimensions
mm
inch
DIM.
MIN.
TYP.
A
MAX.
MIN.
TYP.
2.000
A1
0.050
A2
1.650
b
MAX.
0.079
0.002
1.850
0.065
0.220
0.380
0.009
0.015
c
0.090
0.250
0.005
0.010
D (1)
6.900
7.200
7.500
0.272
0.283
0.295
E
7.400
7.800
8.200
0.291
0.307
0.323
E1 (1) 5.000
5.300
5.600
0.197
0.209
0.220
e (2)
L
L1
k
ddd
1.750
0.650
0.550
OUTLINE AND
MECHANICAL DATA
0.750
0.069
0.073
0.026
0.950
1.250
0.022
0.029
0.037
0.049
0˚ (min.), 4˚ (typ.), 8˚ (max.)
0.100
0.004
Notes: 1. D and E1 does not include mold flash or protrusions,
but do include mold mismatch and are measured at
datum plane “H”. Mold flash or potrusions shall not exceed 0.20mm (.008inch) both side.
2. “b” dimensions does not include dambar protusion/intrusion.
SSOP20
0061436 C (Jedec MO-150-AE)
9/11
TDA7463AD
Table 6. Revision History
Date
Revision
January 2004
2
First Issue in EDOCS DMS
June 2004
3
Changed the Style-sheet in compliance to the new “Corporate Technical
Pubblications Design Guide”
10/11
Description of Changes
TDA7463AD
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
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