SLVS562B – DECEMBER 2004 – REVISED APRIL 2005
D Output Current of Up to 800 mA
D Operates Down to 1.1-V Dropout
D Specified Dropout Voltage at Multiple
D 0.2% Line Regulation Maximum
D 0.5% Load Regulation Maximum
Current Levels
KTP (PowerFLEXE) PACKAGE
(TOP VIEW)
OUTPUT
INPUT
OUTPUT
GND
OUTPUT
GND
DCY (SOT-223) PACKAGE
(TOP VIEW)
KTT (TO-263) PACKAGE
(TOP VIEW)
OUTPUT
INPUT
INPUT
OUTPUT
INPUT
OUTPUT
GND
OUTPUT
GND
description/ordering information
The TLV1112 is a low-dropout voltage regulator, designed to provide up to 800 mA of output current at 1.2 V
(typ). All internal circuitry is designed to operate down to 1.1-V input-to-output differential. Dropout voltage is
specified at a maximum of 1.3 V at 800 mA, decreasing at lower load currents.
ORDERING INFORMATION
TJ
VOTYP
(V)
PowerFLEXt (KTP)
SOT-223 (DCY)
−40°C to 125°C
1.2 V
TO-220 (KCS)
TO-263 (KTT)
PowerFLEX (KTP)
SOT-223 (DCY)
0°C to 125°C
1.2 V
ORDERABLE
PART NUMBER
PACKAGE†
TO-220 (KCS)
Reel of 2000
TLV1112IKTPR
Tube of 80
TLV1112IDCY
Reel of 2500
TLV1112IDCYR
Tube of 50
TLV1112IKCS
Tube of 50
TLV1112IKTT
Reel of 1000
TLV1112IKTTR
Reel of 2000
TLV1112CKTPR
Tube of 80
TLV1112CDCY
Reel of 2500
TLV1112CDCYR
Tube of 50
TLV1112CKCS
Tube of 50
TLV1112CKTT
TOP-SIDE
MARKING
TO-263 (KTT)
Reel of 1000
TLV1112CKTTR
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerFLEX is a trademark of Texas Instruments.
Copyright 2005, Texas Instruments Incorporated
! "#$! % & #!' "%! #&(" %! # # %
!"! #!' '(! )! !$! !&! % '% %' #!$ %! "#$! *%$ POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
PRODUCT PREVIEW
OUTPUT
KCS (TO-220) PACKAGE
(TOP VIEW)
SLVS562B – DECEMBER 2004 – REVISED APRIL 2005
description/ordering information (continued)
The low-profile surface-mount KTP package allows the device to be used in applications where space is limited.
The TLV1112 requires a minimum of 10 mF of output capacitance for stability. Output capacitors of this size or
larger normally are included in most regulator designs.
Unlike pnp-type regulators, where up to 10% of the output current is wasted as quiescent current, the quiescent
current of the TLV1112 flows into the load, increasing efficiency.
The TLV1112C is characterized for operation over the virtual junction temperature range of 0°C to 125°C. The
TLV1112I is characterized for operation over the virtual junction temperature range of − 40°C to 125°C.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Continuous input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
PRODUCT PREVIEW
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
package thermal data (see Note 1)
PACKAGE
BOARD
θJP‡
1.4°C/W
θJC
19°C/W
θJA
28°C/W
4°C/W
53°C/W
17°C/W
19°C/W
PowerFLEXt/TO-252 (KTP)
High K, JESD 51-5
SOT (DCY)
High K, JESD 51-7
TO-220 (KCS)
High K, JESD 51-5
3°C/W
TO-263 (KTT)
High K, JESD 51-5
TBD
TBD
NOTE 1: Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
‡ For packages with exposed thermal pads, such as QFN, PowerPAD, or PowerFLEX, θJP is defined as the thermal resistance between the die
junction and the bottom of the exposed pad.
recommended operating conditions
MIN
VIN
Input voltage
IOUT
Output current
2.7
TJ
Operating virtual junction temperature range
TLV1112I
2
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TLV1112C
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MAX
UNIT
15
V
800
mA
−40
125
0
125
°C
SLVS562B – DECEMBER 2004 – REVISED APRIL 2005
electrical characteristics, TJ = 0°C to 125°C, all typical values are at TJ = 25°C
(unless otherwise noted)
Output voltage, VOUT
VIN − VOUT = 2 V, IOUT = 10 mA, TJ = 25°C
10 mA ≤ IOUT ≤ 800 mA, 1.4 V ≤ VIN − VOUT ≤ 10 V
Load regulation
IOUT = 10 mA, 1.5 ≤ VIN − VOUT ≤ 13.8 V
10 mA ≤ IOUT ≤ 800 mA, VIN − VOUT = 3 V
Dropout voltage (see Note 4)
IOUT = 100 mA
IOUT = 500 mA
Current limit
IOUT = 800 mA
VIN − VOUT = 5 V‡, TJ = 25°C
Line regulation
Quiescent current
Thermal regulation
Ripple rejection
Minimum load current
Temperature stability
Long-term stability
TLV1112C
TYP
MAX
1.17
1.2
1.23
1.14
1.2
1.26
0.035
0.2
%
0.1
0.5
%
1.1
1.2
1.15
1.25
1.2
1.3
1.2
1.5
0.8
VIN ≤ 15 V
30 ms pulse, TA = 25°C
VIN − VOUT = 3 V, Vripple = 1 Vpp, f = 120 Hz
VIN = 15 V
UNIT
MIN
V
A
5
10
mA
0.01
0.1
%/W
60
75
1.7
TJ = 0°C to 125°C
1000 hrs, No load, TA = 125°C
V
dB
5
mA
0.5
%
0.3
%
Output noise voltage (% of VOUT) f = 10 Hz to 100 kHz
0.003
%
† All characteristics are measured with a 10-µF capacitor across the input and a 10-µF capacitor across the output. Pulse testing techniques are
used to maintain the junction temperature as close to the ambient temperature as possible.
‡ Current limit test specified under recommended operating conditions
NOTE 2: Dropout is defined as the input-to-output differential at which VOUT drops 100 mV below the value of VOUT, measured at
VIN = VOUT(nom) + 1.5 V.
electrical characteristics, TJ = −40°C to 125°C, all typical values are at TJ = 25°C
(unless otherwise noted)
TEST CONDITIONS†
PARAMETER
Output voltage, VOUT
VIN − VOUT = 2 V, IOUT = 10 mA, TJ = 25°C
10 mA ≤ IOUT ≤ 800 mA, 1.4 V ≤ VIN − VOUT ≤ 10 V
Load regulation
IOUT = 10 mA, 1.5 ≤ VIN − VOUT ≤ 13.8 V
10 mA ≤ IOUT ≤ 800 mA, VIN − VOUT = 3 V
Dropout voltage (see Note 4)
IOUT = 100 mA
IOUT = 500 mA
Current limit
IOUT = 800 mA
VIN − VOUT = 5 V‡, TJ = 25°C
Line regulation
Quiescent current
Thermal regulation
Ripple rejection
Minimum load current
Temperature stability
Long-term stability
TLV1112I
TYP
MAX
1.17
1.2
1.23
1.14
1.2
1.26
0.035
0.3
%
0.2
0.5
%
0.8
VIN ≤ 15 V
30 ms pulse, TA = 25°C
VIN − VOUT = 3 V, Vripple = 1 Vpp, f = 120 Hz
VIN = 15 V
TJ = −40°C to 125°C
1000 hrs, No load, TA = 125°C
UNIT
MIN
60
V
1.1
1.3
1.15
1.35
1.2
1.4
1.2
1.5
A
5
15
mA
0.01
0.1
%/W
75
1.7
V
dB
5
mA
0.5
%
0.3
%
Output noise voltage (% of VOUT) f = 10 Hz to 100 kHz
0.003
%
† All characteristics are measured with a 10-µF capacitor across the input and a 10-µF capacitor across the output. Pulse-testing techniques are
used to maintain the junction temperature as close to the ambient temperature as possible.
‡ Current limit test specified under recommended operating conditions
NOTE 4: Dropout is defined as the input-to-output differential at which VOUT drops 100 mV below the value of VOUT, measured at
VIN = VOUT(nom) + 1.5 V.
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3
PRODUCT PREVIEW
TEST CONDITIONS†
PARAMETER
SLVS562B – DECEMBER 2004 – REVISED APRIL 2005
PRODUCT PREVIEW
TYPICAL CHARACTERISTICS
4
Figure 1. Short-Circuit Current vs (VI − VO)
Figure 2. Load Regulation vs Temperature
Figure 3. Ripple Rejection vs Frequency
Figure 4. Ripple Rejection vs Current
Figure 5. Temperature Stability
Figure 6. GND Pin Current vs Temperature
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLVS562B – DECEMBER 2004 – REVISED APRIL 2005
TYPICAL CHARACTERISTICS
Figure 8. Line-Transient Response
PRODUCT PREVIEW
Figure 7. Load-Transient Response
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5
SLVS562B – DECEMBER 2004 – REVISED APRIL 2005
APPLICATION INFORMATION
1N4002 (See Note C)
TLV1112
VI
INPUT
OUTPUT
VO
GND
PRODUCT PREVIEW
10 µF
(see Note B)
100 µF
(see Note A)
NOTES: A. Output capacitor selection is critical for regulator stability. The recommended minimum is 10-µF tantalum or 50-µF aluminum
electrolytic, with either one having an ESR between the range of 0.3 Ω to 22 Ω. Larger COUT values benefit the regulator by
improving transient response and loop stability.
B. CIN is recommended if TLV1112 is not located near the power-supply filter.
C. An external diode is recommended to protect the regulator if the input instantaneously is shorted to GND.
Figure 9. Typical Application Circuit
6
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Oct-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
TLV1112IDCY
PREVIEW
SOT-223
DCY
4
80
TBD
Call TI
Call TI
TLV1112IDCYR
PREVIEW
SOT-223
DCY
4
2500
TBD
Call TI
Call TI
TLV1112IKCS
PREVIEW
TO-220
KCS
3
50
TBD
Call TI
Call TI
TLV1112IKTPR
PREVIEW
PFM
KTP
2
3000
TBD
Call TI
Call TI
TLV1112IKTT
PREVIEW
DDPAK/
TO-263
KTT
3
50
TBD
Call TI
Call TI
TLV1112IKTTR
PREVIEW
DDPAK/
TO-263
KTT
3
500
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS094A – APRIL 2001 – REVISED JUNE 2002
DCY (R-PDSO-G4)
PLASTIC SMALL-OUTLINE
6,70 (0.264)
6,30 (0.248)
3,10 (0.122)
2,90 (0.114)
4
0,10 (0.004) M
3,70 (0.146)
3,30 (0.130)
7,30 (0.287)
6,70 (0.264)
Gauge Plane
1
2
0,84 (0.033)
0,66 (0.026)
2,30 (0.091)
4,60 (0.181)
1,80 (0.071) MAX
3
0°–10°
0,10 (0.004) M
0,25 (0.010)
0,75 (0.030) MIN
1,70 (0.067)
1,50 (0.059)
0,35 (0.014)
0,23 (0.009)
Seating Plane
0,08 (0.003)
0,10 (0.0040)
0,02 (0.0008)
4202506/B 06/2002
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters (inches).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC TO-261 Variation AA.
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MECHANICAL DATA
MPSF001F – JANUARY 1996 – REVISED JANUARY 2002
KTP (R-PSFM-G2)
PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE
0.080 (2,03)
0.070 (1,78)
0.243 (6,17)
0.233 (5,91)
0.228 (5,79)
0.218 (5,54)
0.050 (1,27)
0.040 (1,02)
0.010 (0,25) NOM
0.130 (3,30) NOM
0.215 (5,46)
NOM
0.247 (6,27)
0.237 (6,02)
Thermal Tab
(See Note C)
0.287 (7,29)
0.277 (7,03)
0.381 (9,68)
0.371 (9,42)
0.100 (2,54)
0.090 (2,29)
0.032 (0,81) MAX
Seating Plane
0.090 (2,29)
0.180 (4,57)
0.004 (0,10)
0.005 (0,13)
0.001 (0,02)
0.031 (0,79)
0.025 (0,63)
0.010 (0,25) M
0.010 (0,25) NOM
Gage Plane
0.047 (1,19)
0.037 (0,94)
0.010 (0,25)
2°–ā6°
4073388/M 01/02
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
The center lead is in electrical contact with the thermal tab.
Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
Falls within JEDEC TO-252 variation AC.
PowerFLEX is a trademark of Texas Instruments.
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1
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