TI TLV1117CDCYR

SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
D 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V, and Adjustable
D
D
DRJ (QFN) PACKAGE
(TOP VIEW)
DCY (SOT-223) PACKAGE
(TOP VIEW)
INPUT
OUTPUT
Current Levels
0.2% Line Regulation Maximum
0.4% Load Regulation Maximum
OUTPUT
ADJ/GND
ADJ
1
VIN†
2
VIN†
3
VIN†
4
VOUT
KCS (TO-220) PACKAGE
(TOP VIEW)
8
NC
7
VOUT‡
6
VOUT‡
5
VOUT‡
OUTPUT
D
D
D Specified Dropout Voltage at Multiple
Output Voltage Options
Output Current of 800 mA
Operates Down to 1.1-V Dropout
INPUT
OUTPUT
ADJ/GND
† VIN pins (2, 3, 4) must be connected together.
‡ VOUT pins (5, 6, 7) must be connected together.
IN
OUT
ADJ/GND
INPUT
OUTPUT
ADJ/GND
KTT (TO-263) PACKAGE
(TOP VIEW)
OUTPUT
KTP (PowerFLEXE/TO-252) PACKAGE
(TOP VIEW)
OUTPUT
OUTPUT
KTE (PowerFLEXE) PACKAGE
(TOP VIEW)
INPUT
OUTPUT
ADJ/GND
description/ordering information
The TLV1117 is a positive low-dropout voltage regulator, designed to provide up to 800 mA of output current.
The device is available in 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V, and adjustable output voltage options. All internal circuitry
is designed to operate down to 1-V input-to-output differential. Dropout voltage is specified at a maximum of
1.3 V at 800 mA, decreasing at lower load currents.
The low-profile surface-mount KTP package allows the device to be used in applications where space is limited.
The TLV1117 requires a minimum of 10 mF of output capacitance for stability. Output capacitors of this size or
larger normally are included in most regulator designs.
Unlike pnp-type regulators, where up to 10% of the output current is wasted as quiescent current, the quiescent
current of the TLV1117 flows into the load, increasing efficiency.
The TLV1117C device is characterized for operation over the virtual junction temperature range of 0°C to 125°C,
and the TLV1117I device is characterized for operation over the virtual junction temperature range of −40°C to
125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerFLEX is a trademark of Texas Instruments.
Copyright  2005, Texas Instruments Incorporated
! "#$ ! %#&'" ($)
(#"! " !%$""! %$ *$ $! $+! !#$!
!(( ,-) (#" %"$!!. ($! $"$!!'- "'#($
$!. '' %$$!)
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
description/ordering information (continued)
TLV1117C ORDERING INFORMATION
TJ
VO TYP
(V)
1.5 V
1.8 V
2.5 V
0°C to 125°C
3.3 V
5V
ADJ
ORDERABLE
PART NUMBER
PACKAGE†
TOP-SIDE
MARKING
QFN (DRJ)
Reel of 1000
TLV1117-15CDRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-15CDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-15CKTTR
PREVIEW
QFN (DRJ)
Reel of 1000
TLV1117-18CDRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-18CDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-18CKTTR
PREVIEW
QFN (DRJ)
Reel of 1000
TLV1117-25CDRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-25CDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-25CKTTR
PREVIEW
QFN (DRJ)
Reel of 1000
TLV1117-33CDRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-33CDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-33CKTTR
PREVIEW
QFN (DRJ)
Reel of 1000
TLV1117-50CDRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-50CDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-50CKTTR
PREVIEW
PowerFLEX (KTE)
Reel of 2000
TLV1117CKTER
TLV1117C
PowerFLEX/TO-252‡ (KTP)
Reel of 2000
TLV1117CKTPR
TV1117
QFN (DRJ)
Reel of 1000
TLV1117CDRJR
PREVIEW
Tube of 80
TLV1117CDCY
Reel of 2500
TLV1117CDCYR
TO-220 (KCS)
Tube of 50
TLV1117CKCS
TO-263 (KTT)
Reel of 2000
TLV1117CKTTR
SOT-223 (DCY)
V4
TLV1117C
PREVIEW
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ Complies with TO-252, variation AC.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
TLV1117I ORDERING INFORMATION
TJ
VO TYP
(V)
1.5 V
1.8 V
2.5 V
−40°C to 125°C
3.3 V
5V
ORDERABLE
PART NUMBER
PACKAGE†
TOP-SIDE
MARKING
QFN (DRJ)
Reel of 1000
TLV1117-15IDRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-15IDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-15IKTTR
PREVIEW
QFN (DRJ)
Reel of 1000
TLV1117-18IDRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-18IDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-18IKTTR
PREVIEW
QFN (DRJ)
Reel of 1000
TLV1117-25IDRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-25IDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-25IKTTR
PREVIEW
QFN (DRJ)
Reel of 1000
TLV1117-33IDRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-33IDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-33IKTTR
PREVIEW
QFN (DRJ)
Reel of 1000
TLV1117-50DRJR
PREVIEW
SOT-223 (DCY)
Reel of 2500
TLV1117-50IDCYR
PREVIEW
TO-263 (KTT)
Reel of 2000
TLV1117-50IKTTR
PREVIEW
PowerFLEX (KTE)
Reel of 2000
TLV1117IKTER
TLV1117I
PowerFLEX/TO-252‡ (KTP)
Reel of 2000
TLV1117IKTPR
TY1117
QFN (DRJ)
Reel of 1000
TLV1117IDRJR
PREVIEW
Tube of 80
TLV1117IDCY
Reel of 2500
TLV1117IDCYR
TO-220 (KCS)
Tube of 50
TLV1117IKCS
TO-263 (KTT)
Reel of 2000
TLV1117IKTTR
ADJ
SOT-223 (DCY)
V2
TLV1117I
PREVIEW
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ Complies with TO-252, variation AC.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
functional block diagram
VIN
Thermal
Limit
_
+
Current
Limit
+
_
VOUT
GND/ADJ (Fixed-Voltage Version)
GND/ADJ (Adjustable Version)
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Continuous input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
Operating virtual junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
4
POST OFFICE BOX 655303
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SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
package thermal data (see Note 1)
PowerFLEX (KTE)
High K, JESD 51-5
qJP†
2.7°C/W
PowerFLEX/TO-252 (KTP)
High K, JESD 51-5
3°C/W
28°C/W
QFN (DRJ)
High K, JESD 51-5
TBD
TBD
SOT (DCY)
High K, JESD 51-7
TO-263 (KTT)
High K, JESD 51-5
PACKAGE
BOARD
qJC
qJA
23°C/W
4°C/W
53°C/W
TBD
TBD
TO-220 (KCS)
High K, JESD 51-5
3°C/W
19°C/W
† For packages with exposed thermal pads, such as QFN, PowerPAD, and PowerFLEX, θJP is defined as the thermal resistance between the die
junction and the bottom of the exposed pad.
NOTE 1: Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
recommended operating conditions
VIN
IOUT
Input voltage
MIN†
MAX
TLV1117
2.7
15
TLV1117-15
2.9
15
TLV1117-18
3.2
15
TLV1117-25
3.9
15
TLV1117-33
4.7
15
TLV1117-50
6.4
15
0
125
−40
125
Output current
0.8
TLV1117C
TJ
Operating virtual junction temperature range
TLV1117I
UNIT
V
A
°C
† The input-to-output differential across the regulator should provide for some margin against regulator operation at the maximum dropout (for a
particular current value). This margin is needed to account for tolerances in both the input voltage (lower limit) and the output voltage (upper limit).
The absolute minimum VIN for a desired maximum output current can be calculated by the following:
VIN(min) = VOUT(max) + VDO(max @ rated current)
POST OFFICE BOX 655303
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5
SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
TLV1117C electrical characteristics, TJ = 0°C to 125°C, all typical values are at TJ = 25°C (unless
otherwise noted)
TEST CONDITIONS†
PARAMETER
VIN − VOUT = 2 V, IOUT = 10 mA, TJ = 25°C
IOUT = 10 mA to 800 mA, VIN − VOUT = 1.4 V to 10 V
Output voltage, VOUT
VIN = 3.5 V, IOUT = 10 mA, TJ = 25°C
VIN = 2.9 V to 10 V, IOUT = 0 to 800 mA
TLV1117-15
VIN = 3.8 V, IOUT = 10 mA, TJ = 25°C
VIN = 3.2 V to 10 V, IOUT = 0 to 800 mA
TLV1117-18
VIN = 4.5 V, IOUT = 10 mA, TJ = 25°C
VIN = 3.9 V to 10 V, IOUT = 0 to 800 mA
TLV1117-25
VIN = 5 V, IOUT = 10 mA, TJ = 25°C
VIN = 4.75 V to 10 V, IOUT = 0 to 800 mA
VIN = 7 V, IOUT = 10 mA, TJ = 25°C
VIN = 6.5 V to 12 V, IOUT = 0 to 800 mA
Line regulation
Load regulation
TLV1117
TLV1117-33
TLV1117-50
MIN
TYP
MAX
1.238
1.25
1.262
1.225
1.25
1.27
1.485
1.5
1.515
1.47
1.5
1.53
1.782
1.8
1.818
1.764
1.8
1.836
2.475
2.5
2.525
2.45
2.5
2.55
3.267
3.3
3.333
3.235
3.3
3.365
4.95
5
5.05
4.9
5
5.1
IOUT = 10 mA, VIN − VOUT = 1.5 V to 13.75 V
IOUT = 0 mA, VIN = 2.9 V to 10 V
TLV1117
0.035
0.2
TLV1117-15
1
6
IOUT = 0 mA, VIN = 3.2 V to 10 V
IOUT = 0 mA, VIN = 3.9 V to 10 V
TLV1117-18
1
6
TLV1117-25
1
6
IOUT = 0 mA, VIN = 4.75 V to 15 V
IOUT = 0 mA, VIN = 6.5 V to 15 V
TLV1117-33
1
6
TLV1117-50
1
10
IOUT = 10 mA to 800 mA, VIN − VOUT = 3 V
IOUT = 0 to 800 mA, VIN = 2.9 V
TLV1117
0.2
0.4
TLV1117-15
1
10
IOUT = 0 to 800 mA, VIN = 3.2 V
IOUT = 0 to 800 mA, VIN = 3.9 V
TLV1117-18
1
10
TLV1117-25
1
10
IOUT = 0 to 800 mA, VIN = 4.75 V
IOUT = 0 to 800 mA, VIN = 6.5 V
TLV1117-33
1
10
TLV1117-50
Dropout voltage, VDO
(see Note 2)
IOUT = 100 mA
IOUT = 500 mA
Current limit
IOUT = 800 mA
VIN − VOUT = 5 V, TJ = 25°C‡
Minimum load current
VIN = 15 V
TLV1117
Quiescent current
VIN ≤ 15 V
All
fixed-voltage
options
Thermal regulation
30 ms pulse, TA = 25°C
0.8
UNIT
V
%
mV
%
mV
1
15
1.1
1.2
1.15
1.25
1.2
1.3
1.2
1.5
1.7
5
mA
5
10
mA
0.01
0.1
%/W
V
A
Ripple rejection
VIN − VOUT = 3 V, Vripple = 1 Vpp, f = 120 Hz
60
78
dB
† All characteristics are measured with a 10-µF capacitor across the input and a 10-µF capacitor across the output. Pulse testing techniques are
used to maintain the junction temperature as close to the ambient temperature as possible.
‡ Current limit test specified under recommended operating conditions
NOTE 2: Dropout is defined as the VIN to VOUT differential at which VOUT drops 100 mV below the value of VOUT, measured at
VIN = VOUT(nom) + 1.5 V.
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
TLV1117C electrical characteristics, TJ = 0°C to 125°C, all typical values are at TJ = 25°C (unless
otherwise noted) (continued)
PARAMETER
TEST CONDITIONS†
ADJUSTMENT pin current
Change in ADJUSTMENT pin current
MIN
TYP
MAX
UNIT
80
120
µA
5
µA
IOUT = 10 mA to 800 mA, VIN − VOUT = 1.4 V to 10 V
TJ = full range
0.2
Temperature stability
0.5
%
Long-term stability
1000 hrs, No load, TA = 125°C
0.3
%
Output noise voltage (% of VOUT)
f = 10 Hz to 100 kHz
0.003
%
† All characteristics are measured with a 10-µF capacitor across the input and a 10-µF capacitor across the output. Pulse testing techniques are
used to maintain the junction temperature as close to the ambient temperature as possible.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
TLV1117I electrical characteristics, TJ = -40°C to 125°C, all typical values are at TJ = 25°C (unless
otherwise noted)
TEST CONDITIONS†
PARAMETER
Output voltage, VOUT
MIN
TYP
MAX
VIN − VOUT = 2 V, IOUT = 10 mA, TJ = 25°C
TLV1117
IOUT = 10 mA to 800 mA, VIN − VOUT = 1.4 V to 10 V
1.238
1.25
1.262
1.2
1.25
1.29
VIN = 3.5 V, IOUT = 10 mA, TJ = 25°C
VIN = 2.9 V to 10 V, IOUT = 0 to 800 mA
1.485
1.5
1.515
TLV1117-15
1.44
1.5
1.56
VIN = 3.8 V, IOUT = 10 mA, TJ = 25°C
VIN = 3.2 V to 10 V, IOUT = 0 to 800 mA
1.782
1.8
1.818
TLV1117-18
1.728
1.8
1.872
2.475
2.5
2.525
VIN = 4.5 V, IOUT = 10 mA, TJ = 25°C
VIN = 3.9 V to 10 V, IOUT = 0 to 800 mA
VIN = 5 V, IOUT = 10 mA, TJ = 25°C
VIN = 4.75 V to 10 V, IOUT = 0 to 800 mA
VIN = 7 V, IOUT = 10 mA, TJ = 25°C
VIN = 6.5 V to 12 V, IOUT = 0 to 800 mA
Line regulation
Load regulation
TLV1117-25
TLV1117-33
TLV1117-50
2.4
2.5
2.6
3.267
3.3
3.333
3.168
3.3
3.432
4.95
5
5.05
4.8
5
5.2
IOUT = 10 mA, VIN − VOUT = 1.5 V to 13.75 V
IOUT = 0 mA, VIN = 2.9 V to 10 V
TLV1117
0.035
0.3
TLV1117-15
1
4.5
IOUT = 0 mA, VIN = 3.2 V to 10 V
IOUT = 0 mA, VIN = 3.9 V to 10 V
TLV1117-18
1
5.5
TLV1117-25
1
7.5
IOUT = 0 mA, VIN = 4.75 V to 15 V
IOUT = 0 mA, VIN = 6.5 V to 15 V
TLV1117-33
1
10
TLV1117-50
1
15
IOUT = 10 mA to 800 mA, VIN − VOUT = 3 V
IOUT = 0 to 800 mA, VIN = 2.9 V
TLV1117
0.2
0.5
TLV1117-15
1
7.5
IOUT = 0 to 800 mA, VIN = 3.2 V
IOUT = 0 to 800 mA, VIN = 3.9 V
TLV1117-18
1
9
TLV1117-25
1
12.5
IOUT = 0 to 800 mA, VIN = 4.75 V
IOUT = 0 to 800 mA, VIN = 6.5 V
TLV1117-33
1
15
TLV1117-50
1
20
1.1
1.3
1.15
1.35
1.2
1.4
UNIT
V
%
mV
%
mV
Dropout voltage, VDO
(see Note 2)
IOUT = 100 mA
IOUT = 500 mA
Current limit
IOUT = 800 mA
VIN − VOUT = 5 V, TJ = 25°C‡
1.2
1.5
Minimum load current
VIN = 15 V
TLV1117
1.7
5
mA
Quiescent current
VIN ≤ 15 V
All fixedvoltage
options
5
15
mA
Thermal regulation
30-ms pulse, TA = 25°C
0.01
0.1
%/W
0.8
V
A
Ripple rejection
VIN − VOUT = 3 V, Vripple = 1 Vpp, f = 120 Hz
60
75
dB
† All characteristics are measured with a 10-µF capacitor across the input and a 10-µF capacitor across the output. Pulse testing techniques are
used to maintain the junction temperature as close to the ambient temperature as possible.
‡ Current limit test specified under recommended operating conditions
NOTE 2: Dropout is defined as the VIN to VOUT differential at which VOUT drops 100 mV below the value of VOUT, measured at
VIN = VOUT(nom) + 1.5 V.
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
TLV1117I electrical characteristics, TJ = 40°C to 125°C, all typical values are at TJ = 25°C (unless
otherwise noted) (continued)
PARAMETER
TEST CONDITIONS†
ADJUSTMENT pin current
Change in ADJUSTMENT pin current
MIN
TYP
MAX
UNIT
80
120
µA
10
µA
IOUT = 10 mA to 800 mA, VIN − VOUT = 1.4 V to 10 V
TJ = full range
0.2
Temperature stability
0.5
%
Long-term stability
1000 hrs, No load, TA = 125°C
0.3
%
Output noise voltage (% of VOUT)
f = 10 Hz to 100 kHz
0.003
%
† All characteristics are measured with a 10-µF capacitor across the input and a 10-µF capacitor across the output. Pulse testing techniques are
used to maintain the junction temperature as close to the ambient temperature as possible.
POST OFFICE BOX 655303
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9
SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
TYPICAL CHARACTERISTICS
(GRAPHS PREVIEW)
Figure 1. Short-Circuit Current vs (VIN − VOUT)
Figure 2. Load Regulation vs Temperature
Figure 3. Ripple Rejection vs Frequency (ADJ Version)
Figure 4. Ripple Rejection vs Current (ADJ Version)
Figure 5. Temperature Stability
Figure 6. ADJ Pin Current vs Temperature
Figure 7. TLV1117-25 Load Transient Response
Figure 8. TLV1117-25 Line Transient Response
Figure 9. TLV1117-33 Load Transient Response
Figure 10. TLV1117-33 Line Transient Response
10
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SLVS561A − DECEMBER 2004 – REVISED MARCH 2005
APPLICATION INFORMATION
1N4002 (See Note D)
TLV1117 − ADJ
INPUT
VI
OUTPUT
VO
ADJ/GND
10 µF
(see Note C)
IADJ
VREF
R1
100 µF
(see Note A)
CADJ
(see Note B)
VOUT is calculated as:
ǒ
Ǔ
V OUT + V REF 1 ) R2 ) (I ADJ
R1
R2
R2)
Because IADJ typically is 55 µA, it is negligible in most applications.
NOTES: A. Output capacitor selection is critical for regulator stability. The recommended minimum is 10-µF tantalum or 50-µF aluminum
electrolytic, with either one having an ESR between 0.3 Ω and 22 Ω. Larger COUT values benefit the regulator by improving
transient response and loop stability.
1
B. CADJ can be used to improve ripple rejection. Ensure that the impedance of CADJ
is < R1 to
X CADJ +
2pf rippleC ADJ
prevent the ripple from being amplified. If CADJ is used, then a larger COUT is
required (22-µF tantalum or 150-µF aluminum electrolytic).
C. CIN is recommended if TLV1117 is not located near the power-supply filter.
D. An external diode is recommended to protect the regulator if the input instantaneously is shorted to GND.
ǒ
Ǔ
Figure 11. Basic Adjustable Regulator
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
TLV1117-15CDCY
PREVIEW
SOT-223
DCY
4
80
TBD
Call TI
Call TI
TLV1117-15CDCYR
PREVIEW
SOT-223
DCY
4
2500
TBD
Call TI
Call TI
TLV1117-15CKCS
PREVIEW
TO-220
KCS
3
50
TBD
Call TI
Call TI
TLV1117-15IDCY
PREVIEW
SOT-223
DCY
4
80
TBD
Call TI
Call TI
TLV1117-15IDCYR
PREVIEW
SOT-223
DCY
4
2500
TBD
Call TI
Call TI
TLV1117-15IKCS
PREVIEW
TO-220
KCS
3
50
TBD
Call TI
Call TI
TLV1117-18CDCY
PREVIEW
SOT-223
DCY
4
80
TBD
Call TI
Call TI
TLV1117-18CDCYR
PREVIEW
SOT-223
DCY
4
2500
TBD
Call TI
Call TI
TLV1117-18CKCS
PREVIEW
TO-220
KCS
3
50
TBD
Call TI
Call TI
TLV1117-18IDCY
PREVIEW
SOT-223
DCY
4
80
TBD
Call TI
Call TI
TLV1117-18IDCYR
PREVIEW
SOT-223
DCY
4
2500
TBD
Call TI
Call TI
TLV1117-18IKCS
PREVIEW
TO-220
KCS
3
50
TBD
Call TI
Call TI
TLV1117-25CKTPR
PREVIEW
PFM
KTP
2
3000
TBD
Call TI
Call TI
TLV1117-33CDCY
PREVIEW
SOT-223
DCY
4
80
TBD
Call TI
Call TI
TLV1117-33CDCYR
PREVIEW
SOT-223
DCY
4
2500
TBD
Call TI
Call TI
TLV1117-33CKC
PREVIEW
TO-220
KC
3
50
TBD
Call TI
Call TI
TLV1117-33CKCS
PREVIEW
TO-220
KCS
3
50
TBD
Call TI
Call TI
TLV1117-33CKTT
PREVIEW
DDPAK/
TO-263
KTT
3
50
TBD
Call TI
Call TI
TLV1117-33CKTTR
PREVIEW
DDPAK/
TO-263
KTT
3
1000
TBD
Call TI
Call TI
TLV1117-33DCY
PREVIEW
SOT-223
DCY
4
80
TBD
Call TI
Call TI
TLV1117-33IKCS
PREVIEW
TO-220
KCS
3
50
TBD
Call TI
Call TI
TLV1117-50CDCY
PREVIEW
SOT-223
DCY
4
80
TBD
Call TI
Call TI
TLV1117-50CKCS
PREVIEW
TO-220
KCS
3
50
TBD
Call TI
Call TI
TLV1117-50CKTER
PREVIEW
PFM
KTE
3
2000
TBD
Call TI
Call TI
TLV1117-50CKTPR
PREVIEW
PFM
KTP
2
3000
TBD
Call TI
Call TI
TLV1117-50CKTT
PREVIEW
DDPAK/
TO-263
KTT
3
50
TBD
Call TI
Call TI
TLV1117-50CKTTR
PREVIEW
DDPAK/
TO-263
KTT
3
TBD
Call TI
Call TI
TLV1117-50DCYR
PREVIEW
SOT-223
DCY
4
2500
TBD
Call TI
Call TI
TLV1117CDCY
ACTIVE
SOT-223
DCY
4
80
TBD
CU
Level-2-235C-1 YEAR
TLV1117CDCYR
ACTIVE
SOT-223
DCY
4
2500
TBD
CU
Level-2-235C-1 YEAR
TLV1117CKC
PREVIEW
TO-220
KC
3
50
TBD
Call TI
Call TI
TLV1117CKCS
ACTIVE
TO-220
KCS
3
50
TBD
Call TI
Level-NC-NC-NC
TLV1117CKTER
ACTIVE
PFM
KTE
3
2000
TBD
Call TI
Level-1-220C-UNLIM
TLV1117CKTPR
ACTIVE
PFM
KTP
2
3000
TBD
Call TI
Level-1-220C-UNLIM
TLV1117IDCY
ACTIVE
SOT-223
DCY
4
80
TBD
CU
Level-2-235C-1 YEAR
TLV1117IDCYR
ACTIVE
SOT-223
DCY
4
2500
TBD
CU
Level-2-235C-1 YEAR
TLV1117IKCS
ACTIVE
TO-220
KCS
3
50
TBD
Call TI
Level-NC-NC-NC
TLV1117IKTER
ACTIVE
PFM
KTE
3
2000
TBD
Call TI
Level-1-220C-UNLIM
TLV1117IKTPR
ACTIVE
PFM
KTP
2
3000
TBD
Call TI
Level-1-220C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MPDS094A – APRIL 2001 – REVISED JUNE 2002
DCY (R-PDSO-G4)
PLASTIC SMALL-OUTLINE
6,70 (0.264)
6,30 (0.248)
3,10 (0.122)
2,90 (0.114)
4
0,10 (0.004) M
3,70 (0.146)
3,30 (0.130)
7,30 (0.287)
6,70 (0.264)
Gauge Plane
1
2
0,84 (0.033)
0,66 (0.026)
2,30 (0.091)
4,60 (0.181)
1,80 (0.071) MAX
3
0°–10°
0,10 (0.004) M
0,25 (0.010)
0,75 (0.030) MIN
1,70 (0.067)
1,50 (0.059)
0,35 (0.014)
0,23 (0.009)
Seating Plane
0,08 (0.003)
0,10 (0.0040)
0,02 (0.0008)
4202506/B 06/2002
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters (inches).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC TO-261 Variation AA.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPFM001E – OCTOBER 1994 – REVISED JANUARY 2001
KTE (R-PSFM-G3)
PowerFLEX PLASTIC FLANGE-MOUNT
0.375 (9,52)
0.080 (2,03)
0.070 (1,78)
0.365 (9,27)
0.360 (9,14)
0.050 (1,27)
0.040 (1,02)
0.350 (8,89)
0.220 (5,59)
NOM
0.010 (0,25) NOM
Thermal Tab
(See Note C)
0.360 (9,14)
0.350 (8,89)
0.295 (7,49)
NOM
0.320 (8,13)
0.310 (7,87)
0.420 (10,67)
0.410 (10,41)
1
3
0.025 (0,63)
0.031 (0,79)
0.100 (2,54)
Seating Plane
0.004 (0,10)
0.010 (0,25) M
0.005 (0,13)
0.001 (0,03)
0.200 (5,08)
0.041 (1,04)
0.031 (0,79)
0.010 (0,25)
NOM
Gage Plane
3°– 6°
0.010 (0,25)
4073375/F 12/00
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
The center lead is in electrical contact with the thermal tab.
Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
Falls within JEDEC MO-169
PowerFLEX is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MPSF001F – JANUARY 1996 – REVISED JANUARY 2002
KTP (R-PSFM-G2)
PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE
0.080 (2,03)
0.070 (1,78)
0.243 (6,17)
0.233 (5,91)
0.228 (5,79)
0.218 (5,54)
0.050 (1,27)
0.040 (1,02)
0.010 (0,25) NOM
0.130 (3,30) NOM
0.215 (5,46)
NOM
0.247 (6,27)
0.237 (6,02)
Thermal Tab
(See Note C)
0.287 (7,29)
0.277 (7,03)
0.381 (9,68)
0.371 (9,42)
0.100 (2,54)
0.090 (2,29)
0.032 (0,81) MAX
Seating Plane
0.090 (2,29)
0.180 (4,57)
0.004 (0,10)
0.005 (0,13)
0.001 (0,02)
0.031 (0,79)
0.025 (0,63)
0.010 (0,25) M
0.010 (0,25) NOM
Gage Plane
0.047 (1,19)
0.037 (0,94)
0.010 (0,25)
2°–ā6°
4073388/M 01/02
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
The center lead is in electrical contact with the thermal tab.
Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
Falls within JEDEC TO-252 variation AC.
PowerFLEX is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
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