TI TPA6021A4NE4

TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
2-W STEREO AUDIO POWER AMPLIFIER
WITH ADVANCED DC VOLUME CONTROL
FEATURES
•
•
•
•
•
DESCRIPTION
2 W Into 4-Ω Speakers With External Heatsink
DC Volume Control With 2-dB
Steps from -40 dB to 20 dB
– Fade Mode
– -85-dB Mute Mode
Differential Inputs
1-µA Shutdown Current (Typical)
Headphone Mode
The TPA6021A4 is a stereo audio power amplifier
that drives 2 W/channel of continuous RMS power
into a 4-Ω load when utilizing a heat sink. Advanced
dc volume control minimizes external components
and allows BTL (speaker) volume control and SE
(headphone) volume control.
The 20-pin DIP package allows for the use of a
heatsink which provides higher output power.
To ensure a smooth transition between active and
shutdown modes, a fade mode ramps the volume up
and down.
APPLICATIONS
•
LCD Monitors
Right
Speaker
ROUT+
1
PGND
SE/BTL
2
Right Positive
Differential Input Signal
Right Negative
Differential Input Signal
20
100 kW
10
ROUT1 kW
0.47 mF
4
Ci
0.47 mF
5
RIN+
RIN-
VOLUME
AGND
In From DAC
or
Potentiometer
(DC Voltage)
17
VDD
VDD
BYPASS
LIN-
FADE
16
Ci
Left Positive
Differential Input Signal
Ci
0.47 mF
Headphones
8
LIN+
1 kW
SHUTDOWN
NC
9
10
0.47 mF
-70
15
14
VDD
Power Supply
-40
-80
7
CO
0.47 mF
-30
-60
0.47 mF
0.47 mF
Left Negative
Differential Input Signal
-20
-50
C(BYP)
6
-10
PVDD
18
Ci
BTL Volume
0
100 kW
3
Power Supply
CO
330 mF
19
0.47 mF
10 mF
DC VOLUME CONTROL
30
Volume - dB
CS
VDD
20
PVDD
LOUT-
LOUT+
PGND
System
Control
-90
0
330 mF
0.5
1
1.5
2
2.5
3
3.5
Volume [Pin 18] - V
4
4.5
5
13
12
11
Left
Speaker
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGE
TA
20-PIN PDIP (N)
–40°C to 85°C
TPA6021A4N
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
UNIT
VSS
Supply voltage, VDD, PVDD
–0.3 V to 6 V
VI
Input voltage, RIN+, RIN-, LIN+,LIN-
–0.3 V to VDD+0.3 V
Continuous total power dissipation
See Dissipation Rating Table
TA
Operating free-air temperature range
–40°C to 85°C
TJ
Operating junction temperature range
–40°C to 150°C
Tstg
Storage temperature range
–65°C to 85°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1)
260°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE (1)
(1)
2
PACKAGE
TA = 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
N
1.8 W
14.5 mW/°C
1.16 W
0.94 W
All characterization is done using an external heatsink with θSA= 25°C/W. The resulting derating factor
is 22.2 mW/°C.
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
RECOMMENDED OPERATING CONDITIONS
VSS
MIN
MAX
4
5.5
Supply voltage, VDD, PVDD
VIH
High-level input voltage
VIL
Low-level input voltage
TA
Operating free-air temperature
SE/BTL, FADE
UNIT
V
0.8 x VDD
V
2
V
SHUTDOWN
SE/BTL, FADE
0.6 x VDD
SHUTDOWN
–40
V
0.8
V
85
°C
MAX
UNIT
ELECTRICAL CHARACTERISTICS
TA = 25°C, VDD = PVDD = 5.5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
VDD = 5.5 V, Gain = 0 dB, SE/BTL = 0 V
30
mV
50
mV
| VOO |
Output offset voltage (measured differentially)
PSRR
Power supply rejection ratio
VDD = PVDD = 4 V to 5.5 V
| IIH |
High-level input current (SE/BTL, FADE, SHUTDOWN, VOLUME)
VDD = PVDD = 5.5 V,
VI = VDD = PVDD
1
µA
| IIL |
Low-level input current (SE/BTL, FADE, SHUTDOWN, VOLUME)
VDD = PVDD = 5.5 V, VI = 0 V
1
µA
IDD
Supply current, no load
VDD = 5.5 V, Gain = 20 dB, SE/BTL = 0 V
–42
–70
dB
VDD = PVDD = 5.5 V, SE/BTL = 0 V,
SHUTDOWN = 2 V
6
7.5
9
VDD = PVDD = 5.5 V, SE/BTL = 5.5 V,
SHUTDOWN = 2 V
3
5
6
IDD
Supply current, max power into a 4-Ω load
VDD = 5 V = PVDD, SE/BTL = 0 V,
SHUTDOWN = 2 V, RL = 4 Ω,
PO = 2 W, stereo
IDD(SD)
Supply current, shutdown mode
SHUTDOWN = 0 V
mA
1.3
1
ARMS
20
µA
OPERATING CHARACTERISTICS
TA = 25°C, VDD = PVDD = 5 V, RL = 4 Ω, Gain = 20 dB, Stereo, External Heatsink (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
1.5 (1)
THD = 1%, f = 1 kHz
UNIT
PO
Output power
THD+N
Total harmonic distortion + noise
PO = 1 W, RL = 8 Ω , f = 20 Hz to 20 kHz
VOH
High-level output voltage
RL = 8 Ω, Measured between output and VDD = 5.5 V
700
mV
VOL
Low-level output voltage
RL = 8 Ω, Measured between output and GND,
VDD = 5.5 V
400
mV
V(Bypass)
Bypass voltage (Nominally VDD/2)
Measured at pin 16, No load, VDD = 5.5 V
2.85
V
Supply ripple rejection ratio
f = 1 kHz, Gain = 0 dB, C(BYP) = 0.47 µF
Noise output voltage
f = 20 Hz to 20 kHz, Gain = 0 dB,
C(BYP) = 0.47 µF
Input impedance (see Figure 18)
VOLUME = 5 V
ZI
(1)
W
2 (1)
THD = 10%, f = 1 kHz, VDD = 5 V
<0.8%
2.65
2.75
BTL
–82
dB
SE
–57
dB
BTL
36
µVRMS
14
kΩ
Requires an external heatsink with θSA ≤ 25°C/W.
3
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
N (PDIP) PACKAGE
(TOP VIEW)
PGND
1
20
ROUT-
2
19
SE/BTL
PVDD
3
18
VOLUME
RIN+
4
17
AGND
RINVDD
5
16
6
15
BYPASS
FADE
ROUT+
LIN-
7
14
SHUTDOWN
LIN+
8
13
NC
PVDD
9
12
LOUT+
LOUT-
10
11
PGND
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
BYPASS
16
I
Tap to voltage divider for internal midsupply bias generator used for analog reference
FADE
15
I
Places the amplifier in fade mode if a logic low is placed on this terminal; normal operation if a logic high is
placed on this terminal.
AGND
17
-
Analog power supply ground
LIN-
7
I
Left channel negative input for fully differential input.
LIN+
8
I
Left channel positive input for fully differential input.
LOUT–
10
O
Left channel negative audio output
LOUT+
12
O
Left channel positive audio output.
NC
13
-
No connection
PGND
1, 11
-
Power ground
PVDD
3, 9
-
Supply voltage terminal for power stage
RIN-
5
I
Right channel negative input for fully differential input.
RIN+
4
I
Right channel positive input for fully differential input.
ROUT–
2
O
Right channel negative audio output
ROUT+
20
O
Right channel positive audio output
SE/BTL
19
I
Output control. When this terminal is high, SE outputs are selected. When this terminal is low, BTL outputs
are selected.
SHUTDOWN
14
I
Places the amplifier in shutdown mode if a TTL logic low is placed on this terminal
VDD
6
-
Supply voltage terminal
VOLUME
18
I
Terminal for dc volume control. DC voltage range is 0 to VDD.
4
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
FUNCTIONAL BLOCK DIAGRAM
RIN+
_
_
+
ROUT+
+
RIN-
BYP
+
_
BYP
_
+
BYP
SE/BTL
VOLUME
FADE
ROUTEN
SE/BTL
Output
Control
Power
Management
32-Step
Volume
Control
PVDD
PGND
VDD
BYPASS
SHUTDOWN
AGND
LIN_
_
+
LOUT-
+
LIN+
BYP
+
_
BYP
_
+
BYP
LOUT+
EN
SE/BTL
NOTE: All resistor wipers are adjusted with 32 step volume control.
5
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
TYPICAL CHARACTERISTICS
Table of Graphs (1)
FIGURE
THD+N
THD+N
Total harmonic distortion plus noise (BTL)
Total harmonic distortion plus noise (SE)
vs Frequency
1, 2
vs Output power
5, 6
vs Frequency
3, 4
vs Output power
7
vs Output voltage
8
Closed loop response
9, 10
PD
Power Dissipation
vs Output power
PO
Output power
vs Load resistance
Crosstalk
vs Frequency
14, 15
PSRR
Power supply ripple rejection (BTL)
vs Frequency
16
PSRR
Power supply ripple rejection (SE)
vs Frequency
17
ZI
Input impedance
vs BTL gain
18
(1)
11, 12
13
All graphs were taken using an external heatsink with θSA= 25°C/W.
10
5
2
1
VDD = 5 V
RL = 4 W
Gain = 20 dB
CI = 0.47 mF
BTL Stereo
PO = 1.5 W
PO = 0.25 W
0.5
0.2
0.1
PO = 1 W
0.05
0.02
0.01
0.005
0.002
0.001
20
50
100 200
500 1 k 2 k
f - Frequency - Hz
Figure 1.
6
TOTAL HARMONIC DISTORTION + NOISE (BTL)
vs
FREQUENCY
5 k 10 k
20 k
THD+N - Total Harmonic Distortion + Noise (BTL) - %
THD+N - Total Harmonic Distortion + Noise (BTL) - %
TOTAL HARMONIC DISTORTION + NOISE (BTL)
vs
FREQUENCY
10
5
2
1
VDD = 5 V
RL = 8 W
Gain = 20 dB
CI = 0.47 mF
BTL Stereo
PO = 0.25 W
PO = 0.5 W
0.5
0.2
0.1
0.05
PO = 1 W
0.02
0.01
0.005
0.002
0.001
20
50
100 200
500 1 k 2 k
f - Frequency - Hz
Figure 2.
5 k 10 k
20 k
TPA6021A4
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SLOS465 – JUNE 2005
TOTAL HARMONIC DISTORTION + NOISE (SE)
vs
FREQUENCY
10
VDD = 5 V
RL = 32 W
Gain = 14 dB
CI = 0.47 mF
CO = 330 mF
SE Stereo
5
2
1
0.5
PO = 75 mW
0.2
0.1
0.05
0.02
0.01
20
50 100 200
500
1k 2k
5 k 10 k 20 k
THD+N - Total Harmonic Distortion + Noise (SE) - %
THD+N - Total Harmonic Distortion + Noise (SE) - %
TOTAL HARMONIC DISTORTION + NOISE (SE)
vs
FREQUENCY
10
VDD = 5 V
RL = 10 kW
Gain = 14 dB
CI = 0.47 mF
CO = 330 mF
SE Stereo
5
2
1
0.5
VO = 1 VRMS
0.2
0.1
0.05
0.02
0.01
20
f - Frequency - Hz
50 100 200
500 1 k 2 k
f - Frequency - Hz
Figure 3.
Figure 4.
10
5
2
20 kHz
1
0.5
1 kHz
0.1
20 Hz
0.05
0.02
0.01
0.01 0.02
VDD = 5 V
RL = 4 W
Gain = 20 dB
CI = 0.47 mF
BTL Stereo
0.05 0.1 0.2
0.5
PO - Output Power - W
Figure 5.
1
2
5
THD+N - Total Harmonic Distortion + Noise (BTL) - %
THD+N - Total Harmonic Distortion + Noise (BTL) - %
TOTAL HARMONIC DISTORTION + NOISE (BTL)
vs
OUTPUT POWER
0.2
5 k 10 k 20 k
TOTAL HARMONIC DISTORTION + NOISE (BTL)
vs
OUTPUT POWER
10
VDD = 5 V
RL = 8 W
5
Gain = 20 dB
CI = 0.47 mF
2
BTL Stereo
1
0.5
20 kHz
0.2
0.1
0.05
20 Hz
1 kHz
0.02
0.01
0.01 0.02
0.05
0.1
0.2
0.5
1
2
5
PO - Output Power - W
Figure 6.
7
TPA6021A4
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SLOS465 – JUNE 2005
TOTAL HARMONIC DISTORTION + NOISE (SE)
vs
OUTPUT VOLTAGE
VDD = 5 V
RL = 32 W
Gain = 14 dB
CI = 0.47 mF
CO = 330 mF
SE Stereo
5
2
1
0.5
20 Hz
0.2
20 kHz
0.1
0.05
1 kHz
0.02
0.01
10
20
30
40 50
100
10
THD+N - T otal Harmonic Distortion + Noise (SE) - %
10
200
VDD = 5 V
RL = 10 kW
Gain = 14 dB
CI = 0.47 mF
CO = 330 mF
SE Stereo
5
2
1
0.5
0.2
0.1
20 Hz
0.05
0.02
0.01
0.005
1 kHz
0.002
0.001
0
0.2 0.4
PO - Output Power - mW
0.6 0.8
CLOSED LOOP RESPONSE
Gain
30
120
20
120
90
10
90
0
60
-10
30
60
-10
30
-20
0
Phase
-30
180
150
0
-30
150
Gain
-20
0
Phase
-30
-30
-40
-60
-50
-90
-50
VDD = 5 V
-90
-60
-120
-60
-150
-70
RL = 8 W
Mode = BTL
Gain = 20 dB
-120
-70
-80
-180
1M
-80
10
100
1k
10 k
f - Frequency - Hz
Figure 9.
8
CLOSED LOOP RESPONSE
40
Closed Loop Gain - dB
Closed Loop Gain - dB
10
2
180
Phase - Degrees
20
RL = 8 W
Mode = BTL
Gain = 0 dB
1.2 1.4 1.6 1.8
Figure 8.
40
30
1
VO - Output Voltage - rms
Figure 7.
VDD = 5 V
20 kHz
100 k
-40
10
-60
100
-150
1k
10 k
f - Frequency - Hz
Figure 10.
100 k
-180
1M
Phase - Degrees
THD+N - Total Harmonic Distortion + Noise (SE) - %
TOTAL HARMONIC DISTORTION + NOISE (SE)
vs
OUTPUT POWER
TPA6021A4
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SLOS465 – JUNE 2005
POWER DISSIPATION (PER CHANNEL)
vs
OUTPUT POWER
POWER DISSIPATION (PER CHANNEL)
vs
OUTPUT POWER
200
VDD = 5 V
BTL
1.8
PD - Power Dissipation (Per Channel) - mW
PD - Power Dissipation (Per Channel) - W
2
1.6
1.4
1.2
4W
1
0.8
0.6
8W
0.4
0.2
0.2 0.4 0.6 0.8
1
1.2 1.4
1.6 1.8
140
120
100
16 W
80
60
32 W
40
20
0
2
0
50
100
150
200
PO - Output Power - W
PO - Output Power - mW
Figure 11.
Figure 12.
OUTPUT POWER
vs
LOAD RESISTANCE
CROSSTALK
vs
FREQUENCY
2.5
250
300
-40
VDD = 5 V
Gain = 20 dB
BTL Stereo
-60
Crosstalk - dB
2
PO - Output Power - W
8W
160
0
0
VDD = 5 V
SE
180
1.5
THD+N = 10%
1
VDD = 5 V
PO = 1 W
RL = 8 W
Gain = 0 dB
BTL
-80
-100
Left to Right
THD+N = 1%
0.5
0
-120
4 10
20
30
40
50
RL - Load Resistance - W
Figure 13.
60
70
-140
20
Right to Left
100 200
1k 2k
10 k 20 k
f - Frequency - Hz
Figure 14.
9
TPA6021A4
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SLOS465 – JUNE 2005
CROSSTALK
vs
FREQUENCY
POWER SUPPLY REJECTION RATIO (BTL)
vs
FREQUENCY
Crosstalk - dB
-60
VDD = 5 V
PO = 1 W
RL = 8 W
Gain = 20 dB
BTL
-80
Left to Right
-100
Right to Left
-120
-140
20
100 200
1k 2k
PSRR - Power Supply Rejection Ratio (SE) - dB
0
-40
10 k 20 k
VDD = 5 V
RL = 8 W
C(BYP) = 0.47 mF
CI = 0.47 mF
BTL
-10
-20
-30
-40
-50
-60
Gain = 20 dB
-70
-80
Gain = 0 dB
-90
-100
20
100
Figure 16.
POWER SUPPLY REJECTION RATIO (SE)
vs
FREQUENCY
INPUT IMPEDANCE
vs
BTL GAIN
0
90
-10
80
-20
70
-30
-40
Gain = 0 dB
-50
-70
-80
-90
-100
20
VDD = 5 V
RL = 32 W
C(BYP) = 0.47 mF
CI = 0.47 mF
CO = 330 mF
SE
100
Gain = 14 dB
60
50
40
30
20
10
1k
f - Frequency - Hz
Figure 17.
10
10 k 20 k
Figure 15.
ZI − Input Impedamce − kΩ
PSRR - Power Supply Rejection Ratio (SE) - dB
f - Frequency - Hz
-60
1k
f - Frequency - Hz
10 k 20 k
0
−40
−30
−20
−10
BTL Gain − dB
Figure 18.
0
10
20
TPA6021A4
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SLOS465 – JUNE 2005
APPLICATION INFORMATION
SELECTION OF COMPONENTS
Figure 19 and Figure 20 are schematic diagrams of typical LCD monitor application circuits.
Right
Speaker
ROUT+
1
CS
19
100 kW
3
Power Supply
1 kW
PVDD
18
Right
Audio Source
Ci
Ci
0.47 mF
0.47 mF
4
5
RIN+
RIN-
VOLUME
AGND
C(BYP)
0.47 mF
6
Ci
In From DAC
or
Potentiometer
(DC Voltage)
17
VDD
0.47 mF
100 kW
ROUT-
0.47 mF
10 mF
CO
330 mF
PGND
SE/BTL
2
VDD
20
7
VDD
BYPASS
LINFADE
0.47 mF
Headphones
16
15
CO
1 kW
330 mF
Left
Audio Source
Ci
0.47 mF
8
14
LIN+
VDD
Power Supply
NC
9
10
0.47 mF
A.
SHUTDOWN
PVDD
LOUT-
LOUT+
PGND
System
Control
13
12
11
Left
Speaker
A 0.47-µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise
signals, a larger electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier.
Figure 19. Typical TPA6021A4 Application Circuit Using Single-Ended Inputs and Input MUX
11
TPA6021A4
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SLOS465 – JUNE 2005
APPLICATION INFORMATION (continued)
Right
Speaker
ROUT+
1
PGND
SE/BTL
2
CS
Right Negative
Differential Input Signal
CO
330 mF
100 kW
ROUT100 kW
3
Power Supply
Right Positive
Differential Input Signal
19
0.47 mF
10 mF
VDD
20
1 kW
PVDD
18
Ci
0.47 mF
4
Ci
0.47 mF
5
RIN+
RIN-
VOLUME
AGND
In From DAC
or
Potentiometer
(DC Voltage)
17
C(BYP)
VDD
6
VDD
BYPASS
LIN-
FADE
16
0.47 mF
Headphones
0.47 mF
Left Negative
Differential Input Signal
Ci
Left Positive
Differential Input Signal
Ci
0.47 mF
7
1 kW
CO
0.47 mF
8
14
LIN+
VDD
Power Supply
0.47 mF
SHUTDOWN
NC
9
10
A.
15
PVDD
LOUT-
LOUT+
PGND
System
Control
330 mF
13
12
11
Left
Speaker
A 0.47-µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise
signals, a larger electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier.
Figure 20. Typical TPA6021A4 Application Circuit Using Differential Inputs
SE/BTL OPERATION
The ability of the TPA6021A4 to easily switch between BTL and SE modes is one of its most important cost
saving features. This feature eliminates the requirement for an additional headphone amplifier in applications
where internal stereo speakers are driven in BTL mode but external headphone or speakers must be
accommodated. Internal to the TPA6021A4, two separate amplifiers drive OUT+ and OUT–. The SE/BTL input
controls the operation of the follower amplifier that drives LOUT– and ROUT–. When SE/BTL is held low, the
amplifier is on and the TPA6021A4 is in the BTL mode. When SE/BTL is held high, the OUT– amplifiers are in a
high output impedance state, which configures the TPA6021A4 as an SE driver from LOUT+ and ROUT+. IDD is
reduced by approximately one-third in SE mode. Control of the SE/BTL input can be from a logic-level CMOS
source or, more typically, from a resistor divider network as shown in Figure 21. The trip level for the SE/BTL
input can be found in the recommended operating conditions table.
12
TPA6021A4
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SLOS465 – JUNE 2005
APPLICATION INFORMATION (continued)
4
RIN+
_
_
+
ROUT+
20
+
Bypass
5
RIN-
Bypass
VDD
+
_
_
ROUT-
2
+
Bypass
100 kW
CO
330 mF
1 kW
EN
SE/BTL
19
100 kW
LOUT+
Figure 21. TPA6021A4 Resistor Divider Network Circuit
Using a 1/8-in. (3,5 mm) stereo headphone jack, the control switch is closed when no plug is inserted. When
closed the 100-kΩ/1-kΩ divider pulls the SE/BTL input low. When a plug is inserted, the 1-kΩ resistor is
disconnected and the SE/BTL input is pulled high. When the input goes high, the OUT– amplifier is shut down
causing the speaker to mute (open-circuits the speaker). The OUT+ amplifier then drives through the output
capacitor (Co) into the headphone jack.
SHUTDOWN MODES
The TPA6021A4 employs a shutdown mode of operation designed to reduce supply current (IDD) to the absolute
minimum level during periods of nonuse for power conservation. The SHUTDOWN input terminal should be held
high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to mute
and the amplifier to enter a low-current state, IDD = 20 µA. SHUTDOWN should never be left unconnected
because amplifier operation would be unpredictable.
Table 1. SE/BTL and Shutdown Functions
INPUTS (1)
(1)
AMPLIFIER STATE
SE/BTL
SHUTDOWN
OUTPUT
X
Low
Mute
Low
High
BTL
High
High
SE
Inputs should never be left unconnected.
FADE OPERATION
For design flexibility, a fade mode is provided to slowly ramp up the amplifier gain when coming out of shutdown
mode and conversely ramp the gain down when going into shutdown. This mode provides a smooth transition
between the active and shutdown states and virtually eliminates any pops or clicks on the outputs.
13
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
When the FADE input is a logic low, the device is placed into fade-on mode. A logic high on this pin places the
amplifier in the fade-off mode. The voltage trip levels for a logic low (VIL) or logic high (VIH) can be found in the
recommended operating conditions table.
When a logic low is applied to the FADE pin and a logic low is then applied on the SHUTDOWN pin, the channel
gain steps down from gain step to gain step at a rate of two clock cycles per step. With a nominal internal clock
frequency of 58 Hz, this equates to 34 ms (1/29 Hz) per step. The gain steps down until the lowest gain step is
reached. The time it takes to reach this step depends on the gain setting prior to placing the device in shutdown.
For example, if the amplifier is in the highest gain mode of 20 dB, the time it takes to ramp down the channel
gain is 1.05 seconds. This number is calculated by taking the number of steps to reach the lowest gain from the
highest gain, or 31 steps, and multiplying by the time per step, or 34 ms.
After the channel gain is stepped down to the lowest gain, the amplifier begins discharging the bypass capacitor
from the nominal voltage of VDD/2 to ground. This time is dependent on the value of the bypass capacitor. For a
0.47-µF capacitor that is used in the application diagram in Figure 19, the time is approximately 500 ms. This
time scales linearly with the value of bypass capacitor. For example, if a 1-µF capacitor is used for bypass, the
time period to discharge the capacitor to ground is twice that of the 0.47-µF capacitor, or 1 second. Figure 22
below is a waveform captured at the output during the shutdown sequence when the part is in fade-on mode.
The gain is set to the highest level and the output is at VDD when the amplifier is shut down.
When a logic high is placed on the SHUTDOWN pin and the FADE pin is still held low, the device begins the
start-up process. The bypass capacitor will begin charging. Once the bypass voltage reaches the final value of
VDD/2, the gain increases in 2-dB steps from the lowest gain level to the gain level set by the dc voltage applied
to the VOLUME pin.
In the fade-off mode, the output of the amplifier immediately drops to VDD/2 and the bypass capacitor begins a
smooth discharge to ground. When shutdown is released, the bypass capacitor charges up to VDD/2 and the
channel gain returns immediately to the value on the VOLUME terminal. Figure 23 below is a waveform captured
at the output during the shutdown sequence when the part is in the fade-off mode. The gain is set to the highest
level, and the output is at VDD when the amplifier is shut down.
The power-up sequence is different from the shutdown sequence and the voltage on the FADE pin does not
change the power-up sequence. Upon a power-up condition, the TPA6021A4 begins in the lowest gain setting
and steps up 2 dB every 2 clock cycles until the final value is reached as determined by the dc voltage applied to
the VOLUME pin.
Device Shutdown
Device Shutdown
ROUT+
ROUT+
Figure 22. Shutdown Sequence in the
Fade-on Mode
14
Figure 23. Shutdown Sequence in the
Fade-off Mode
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
VOLUME OPERATION
The VOLUME pin controls the BTL volume when driving speakers, and the SE volume when driving
headphones. This pin is controlled with a dc voltage, which should not exceed VDD.
The output volume increases in discrete steps as the dc voltage increases and decreases in discrete steps as
the dc voltage decreases. There are a total of 32 discrete gain steps of the amplifier and range from -85 dB to 20
dB for BTL operation and -85 dB to 14 dB for SE operation.
A pictorial representation of the typical volume control can be found in Figure 24.
30
20
10
BTL Volume
0
Volume - dB
-10
-20
-30
-40
-50
-60
-70
-80
-90
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Volume [Pin 18] - V
Figure 24. Typical DC Volume Control Operation
15
TPA6021A4
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SLOS465 – JUNE 2005
INPUT RESISTANCE
Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest
value to over six times that value. As a result, if a single capacitor is used in the input high-pass filter, the –3 dB
or cutoff frequency also changes by over six times.
Rf
C
Ri
IN
Input Signal
Figure 25. Resistor on Input for Cut-Off Frequency
The input resistance at each gain setting is given in Figure 18.
The –3-dB frequency can be calculated using Equation 1.
ƒ3 dB 1
2 CR
i
(1)
INPUT CAPACITOR, CI
In the typical application an input capacitor (CI) is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, CI and the input impedance of the amplifier (RI) form a
high-pass filter with the corner frequency determined in Equation 2.
−3 dB
fc(highpass) 1
2 Ri C i
fc
(2)
The value of CI is important to consider as it directly affects the bass (low frequency) performance of the circuit.
Consider the example where RI is 70 kΩ and the specification calls for a flat-bass response down to 40 Hz.
Equation 2 is reconfigured as Equation 3.
1
C i
2 R fc
i
(3)
In this example, CI is 56.8 nF, so one would likely choose a value in the range of 56 nF to 1 µF. A further
consideration for this capacitor is the leakage path from the input source through the input network (CI) and the
feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that
reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or
ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor
should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely higher
than the source dc level. Note that it is important to confirm the capacitor polarity in the application.
16
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
POWER SUPPLY DECOUPLING, C(S)
The TPA6021A4 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to
ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents
oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by
using two capacitors of different types that target different types of noise on the power supply leads. For higher
frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic
capacitor, typically 0.1 µF placed as close as possible to the device VDD lead, works best. For filtering
lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio
power amplifier is recommended.
MIDRAIL BYPASS CAPACITOR, C(BYP)
The midrail bypass capacitor (C(BYP)) is the most critical capacitor and serves several important functions. During
start-up or recovery from shutdown mode, C(BYP) determines the rate at which the amplifier starts up. The second
function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This
noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and
THD+N.
Bypass capacitor (C(BYP)) values of 0.47-µF to 1-µF ceramic or tantalum low-ESR capacitors are recommended
for the best THD and noise performance. For the best pop performance, choose a value for C(BYP) that is equal to
or greater than the value chosen for CI. This ensures that the input capacitors are charged up to the midrail
voltage before C(BYP) is fully charged to the midrail voltage.
OUTPUT COUPLING CAPACITOR, C(C)
In the typical single-supply SE configuration, an output coupling capacitor (C(C)) is required to block the dc bias at
the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the
output coupling capacitor and impedance of the load form a high-pass filter governed by Equation 4.
−3 dB
fc(high) 1
2 RL C (C)
fc
(4)
The main disadvantage, from a performance standpoint, is the load impedances are typically small, which drives
the low-frequency corner higher, degrading the bass response. Large values of C(C) are required to pass low
frequencies into the load. Consider the example where a C(C) of 330 µF is chosen and loads vary from 4 Ω, 8 Ω,
32 Ω , 10 kΩ, and 47 kΩ. Table 2 summarizes the frequency response characteristics of each configuration.
Table 2. Common Load Impedances vs Low Frequency
Output Characteristics in SE Mode
C(C)
LOWEST
FREQUENCY
4Ω
330 µF
120 Hz
60 Hz
RL
8Ω
330 µF
32 Ω
330 µF
15 Hz
10,000 Ω
330 µF
0.05 Hz
47,000 Ω
330 µF
0.01 Hz
17
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
As Table 2 indicates, most of the bass response is attenuated into a 4-Ω load, an 8-Ω load is adequate,
headphone response is good, and drive into line level inputs (a home stereo for example) is exceptional.
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal)
capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this
resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this
resistance, the more the real capacitor behaves like an ideal capacitor.
BRIDGE-TIED LOAD vs SINGLE-ENDED LOAD
Figure 26 shows a Class-AB audio power amplifier (APA) in a BTL configuration. The TPA6021A4 BTL amplifier
consists of two Class-AB amplifiers driving both ends of the load. There are several potential benefits to this
differential drive configuration, but, initially consider power to the load. The differential drive to the speaker
means that as one side is slewing up, the other side is slewing down, and vice versa. This in effect doubles the
voltage swing on the load as compared to a ground referenced load. Plugging 2 x VO(PP) into the power equation,
where voltage is squared, yields 4x the output power from the same supply rail and load impedance (see
Equation 5).
V(rms) Power V O(PP)
2 2
V(rms)
2
RL
(5)
VDD
VO(PP)
RL
2x VO(PP)
VDD
-VO(PP)
Figure 26. Bridge-Tied Load Configuration
18
TPA6021A4
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SLOS465 – JUNE 2005
In a typical computer sound channel operating at 5 V, bridging raises the power into an 8-Ω speaker from a
singled-ended (SE, ground reference) limit of 250 mW to 1 W. In sound power that is a 6-dB improvement, which
is loudness that can be heard. In addition to increased power there are frequency response concerns. Consider
the single-supply SE configuration shown in Figure 27. A coupling capacitor is required to block the dc offset
voltage from reaching the load. These capacitors can be quite large (approximately 33 µF to 1000 µF), so they
tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting
low-frequency performance of the system. This frequency limiting effect is due to the high-pass filter network
created with the speaker impedance and the coupling capacitance and is calculated with Equation 6.
f(c) 1
2 RL C C
(6)
For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL
configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency
performance is then limited only by the input network and speaker response. Cost and PCB space are also
minimized by eliminating the bulky coupling capacitor.
VDD
-3 dB
VO(PP)
C(C)
RL
VO(PP)
fc
Figure 27. Single-Ended Configuration and Frequency Response
Increasing power to the load does carry a penalty of increased internal power dissipation. The increased
dissipation is understandable considering that the BTL configuration produces 4x the output power of the SE
configuration. Internal dissipation versus output power is discussed further in the crest factor and thermal
considerations section.
SINGLE-ENDED OPERATION
In SE mode (see Figure 27), the load is driven from the primary amplifier output for each channel (OUT+).
The amplifier switches single-ended operation when the SE/BTL terminal is held high. This puts the negative
outputs in a high-impedance state, and effectively reduces the amplifier's gain by 6 dB.
BTL AMPLIFIER EFFICIENCY
Class-AB amplifiers are inefficient. The primary cause of these inefficiencies is voltage drop across the output
stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage
drop that varies inversely to output power. The second component is due to the sinewave nature of the output.
The total voltage drop can be calculated by subtracting the RMS value of the output voltage from VDD. The
internal voltage drop multiplied by the RMS value of the supply current (IDDrms) determines the internal power
dissipation of the amplifier.
An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power
supply to the power delivered to the load. To accurately calculate the RMS and average values of power in the
load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 28).
19
TPA6021A4
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SLOS465 – JUNE 2005
IDD
VO
IDD(avg)
V(LRMS)
Figure 28. Voltage and Current Waveforms for BTL Amplifiers
Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are very
different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified
shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different.
Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which
supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform.
The following equations are the basis for calculating amplifier efficiency.
PL
Efficiency of a BTL amplifier P SUP
Where:
2
VLrms 2
VP
VP
PL , and VLRMS , therefore, P L 2
RL
2RL
and P SUP VDD I DDavg
and
I DDavg 1
0
VP
VP
1
[cos(t)] 0 2V P
sin(t) dt R
RL
L
RL
Therefore,
P SUP 2 VDD V P
RL
(7)
substituting PL and PSUP into Equation 7,
2
Efficiency of a BTL amplifier VP
2 RL
2 V DD VP
RL
VP
4 V DD
Where:
VP 2 PL R L
Therefore,
BTL 2 PL R L
4 V DD
PL = Power delivered to load
PSUP = Power drawn from power supply
VLRMS = RMS voltage on BTL load
RL = Load resistance
VP = Peak voltage on BTL load
IDDavg = Average current drawn from the power supply
VDD = Power supply voltage
ηBTL = Efficiency of a BTL amplifier
(8)
Table 3 employs Equation 8 to calculate efficiencies for four different output power levels. Note that the efficiency
of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in
a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at full
output power is less than in the half power range. Calculating the efficiency for a specific system is the key to
proper power supply design. For a stereo 1-W audio system with 8-Ω loads and a 5-V supply, we get an
efficiency of 0.628. Total output power is 2-W. Thus the maximum draw on the power supply is almost 3.25 W.
20
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
Table 3. Efficiency vs Output Power in 5-V, 8-Ω BTL Systems
OUTPUT POWER
(W)
EFFICIENCY
(%)
PEAK VOLTAGE
(V)
INTERNAL DISSIPATION
(W)
0.25
31.4
2.00
0.55
0.50
44.4
2.83
0.62
1.00
62.8
4.00
0.59
1.25
70.2
4.47 (1)
0.53
(1)
High peak voltages cause the THD to increase.
A final point to remember about Class-AB amplifiers (either SE or BTL) is how to manipulate the terms in the
efficiency equation to utmost advantage when possible. Note that in equation 8, VDD is in the denominator. This
indicates that as VDD goes down, efficiency goes up.
CREST FACTOR AND THERMAL CONSIDERATIONS
Class-AB power amplifiers dissipate a significant amount of heat in the package under normal operating
conditions. A typical music CD requires 12 dB to 15 dB of dynamic range, or headroom above the average power
output, to pass the loudest portions of the signal without distortion. In other words, music typically has a crest
factor between 12 dB and 15 dB. When determining the optimal ambient operating temperature, the internal
dissipated power at the average output power level must be used. From the data sheet graph (Figure 5.), one
can see that when the TPA6021A4 is operating from a 5-V supply into a 4-Ω speaker at 1% THD, that output
power is 1.5-W so maximum instantaneous output power is 3-W. Use equation 9 to convert watts to dB.
PW
3 W = 5 dB
PdB = 10Log
= 10Log
1W
Pref
(9)
Subtracting the headroom restriction to obtain the average listening level without distortion yields:
5 dB - 15 dB = –10 dB
(15-dB crest factor)
5 dB - 12 dB = –7 dB
(12-dB crest factor)
5 dB - 9 dB = –4 dB
(9-dB crest factor)
5 dB - 6 dB = -1 dB
(6-dB crest factor)
5 dB - 3 dB = 2 dB
(3-dB crest factor)
To convert dB back into watts use equation 10.
PdB/10
PW = 10
x Pref
= 48 mW
(18-dB crest factor)
= 95 mW
(15-dB crest factor)
= 190 mW
(12-dB crest factor)
= 380 mW
(9-dB crest factor)
= 750 mW
(6-dB crest factor)
= 1500 mW
(3-dB crest factor)
(10)
This is valuable information to consider when attempting to estimate the heat dissipation requirements for the
amplifier system. Comparing the worst case, which is 1.5 W of continuous power output with a 3-dB crest factor,
against 12-dB and 15-dB applications significantly affects maximum ambient temperature ratings for the system.
Using the power dissipation curves for a 5-V, 4-Ω system, the internal dissipation in the TPA6021A4 and
maximum ambient temperatures is shown in Table 4.
21
TPA6021A4
www.ti.com
SLOS465 – JUNE 2005
Table 4. TPA6021A4 Power Rating, 5-V, 4-Ω Stereo
(1)
PEAK OUTPUT POWER
(W)
AVERAGE OUTPUT POWER
POWER DISSIPATION
(W/Channel)
MAXIMUM AMBIENT
TEMPERATURE
3
1500 mW (3 dB)
1.26
37°C
3
750 mW (6 dB)
1.20
42°C
3
380 mW (9 dB)
1.00
59°C
3
190 mW (12 dB)
0.79
79°C
3
95 mW (15 dB)
0.60
96°C (1)
3
48 mW (18 dB)
0.44
110°C (1)
Package limited to 85°C ambient.
Table 5. TPA6021A4 Power Rating, 5-V, 8-Ω Stereo
(1)
PEAK OUTPUT POWER
(W)
AVERAGE OUTPUT POWER
POWER DISSIPATION
(W/Channel)
MAXIMUM AMBIENT
TEMPERATURE
2.2
1100 mW (3-dB crest factor)
0.57
99°C (1)
2.2
876 mW (4-dB crest factor)
0.61
95°C (1)
2.2
440 mW (7-dB crest factor)
0.62
95°C (1)
2.2
220 mW (10-dB crest factor)
0.53
103°C (1)
Package limited to 85°C ambient.
The maximum dissipated power (PD(max)) is reached at a much lower output power level for an 8-Ω load than for
a 4-Ω load. As a result, this simple formula for calculating PD(max) may be used for an 8-Ω application.
2V2
DD
P D(max) 2
RL
(11)
However, in the case of a 4-Ω load, the PD(max) occurs at a point well above the normal operating power level.
The amplifier may therefore be operated at a higher ambient temperature than required by the PD(max) formula for
a 4-Ω load.
The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor
for the N package with an external heatsink is shown in the dissipation rating table. Use Equation 12 to convert
this to θJA. .
1
1
o
= 45 C/W
=
qJA =
0.0222
Derating Factor
(12)
To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are per
channel, so the dissipated power needs to be doubled for two channel operation. Given θJA, the maximum
allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be
calculated using Equation 13. The maximum recommended junction temperature for the TPA6021A4 is 150°C.
The internal dissipation figures are taken from the Power Dissipation vs Output Power graphs.
TA Max = TJ Max - qJA PD
o
= 150 - 45 (0.6 x 2) = 96 C(15-dB crest factor)
(13)
NOTE:
Internal dissipation of 0.6 W is estimated for a 2-W system with 15-dB crest factor per
channel.
Table 4 and Table 5 show that some applications require no airflow to keep junction temperatures in the
specified range. The TPA6021A4 is designed with thermal protection that turns the device off when the junction
temperature surpasses 150°C to prevent damage to the IC. Table 4 and Table 5 were calculated for maximum
listening volume without distortion. When the output level is reduced the numbers in the table change
significantly. Also, using 8-Ω speakers increases the thermal performance by increasing amplifier efficiency.
22
PACKAGE OPTION ADDENDUM
www.ti.com
12-Aug-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
TPA6021A4N
ACTIVE
PDIP
N
Pins Package Eco Plan (2)
Qty
20
20
Pb-Free
(RoHS)
Lead/Ball Finish
CU NIPDAU
MSL Peak Temp (3)
Level-NC-NC-NC
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPA6021A4N
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TPA6021A4NE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
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amplifier.ti.com
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