TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 D D D D D D D D D D D Compatible With PC 99 Desktop Line-Out Into 10-kΩ Load Compatible With PC 99 Portable Into 8-Ω Load Internal Gain Control, Which Eliminates External Gain-Setting Resistors Digital Volume Control From 20 dB to –40 dB 2-W/Ch Output Power Into 3-Ω Load PC-Beep Input Depop Circuitry Stereo Input MUX Fully Differential Input Low Supply Current and Shutdown Current Surface-Mount Power Packaging 24-Pin TSSOP PowerPAD PWP PACKAGE (TOP VIEW) GND UP DOWN LOUT+ LLINEIN LHPIN PVDD RIN LOUT– LIN BYPASS GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND RLINEIN SHUTDOWN ROUT+ RHPIN VDD PVDD CLK ROUT– SE/BTL PC-BEEP GND description The TPA0162 is a stereo audio power amplifier in a 24-pin TSSOP thermally enhanced package capable of delivering 2 W of continuous RMS power per channel into 3-Ω loads. This device minimizes the number of external components needed, which simplifies the design and frees up board space for other features. When driving 1 W into 8-Ω speakers, the TPA0162 has less than 0.22% THD+N across its specified frequency range. Included within this device is integrated depop circuitry that virtually eliminates transients that cause noise in the speakers. The overall gain of the amplifier is controlled digitally by the UP and DOWN terminals. At power up, the gain is set at the lowest level, –85 dB. It can then be adjusted to any of 31 discrete steps by pulling the voltage down at the desired pin to logic low. The gain is adjusted in the initial stage of the amplifier as opposed to the power output stage. As a result, the THD changes very little over all volume levels. An internal input MUX allows two sets of stereo inputs to the amplifier. In notebook applications, where internal speakers are driven as BTL and the line outputs (often headphone drive) are required to be SE, the TPA0162 automatically switches into SE mode when the SE/BTL input is activated. This effectively reduces the gain by 6 dB. The TPA0162 consumes only 20 mA of supply current during normal operation. A miserly shutdown mode is included that reduces the supply current to less than 150 µA. The PowerPAD package (PWP) delivers a level of thermal performance that was previously achievable only in TO-220-type packages. Thermal impedances of approximately 35°C/W are truly realized in multilayer PCB applications. This allows the TPA0162 to operate at full power into 8-Ω loads at ambient temperatures of 85°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments Incorporated. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 functional block diagram RHPIN RLINEIN R MUX 32-Step Volume Control – ROUT+ + UP DOWN RIN – ROUT– + PC-BEEP PCBeep Depop Circuitry SE/BTL LHPIN LLINEIN MUX Control L MUX Power Management PVDD VDD BYPASS SHUTDOWN GND 32-Step Volume Control – LOUT+ + LIN – LOUT– + 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 AVAILABLE OPTIONS PACKAGED DEVICE TSSOP† (PWP) TA – 40°C to 85°C TPA0162PWP † The PWP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA0162PWPR). Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION BYPASS 11 CLK 17 I If a 47-nF capacitor is attached, the TPA0162 generates an internal clock. An external clock can override the internal clock input to this terminal. DOWN 3 I A momentary pulse on this terminal decreases the volume level by 2 dB. Holding the terminal low for a period of time will step the amplifier through the volume levels at a rate determined by the capacitor on the CLK terminal. GND Tap to voltage divider for internal mid-supply bias generator 1, 12 13, 24 Ground connection for circuitry. Connected to thermal pad LHPIN 6 I Left-channel headphone input, selected when SE/BTL is held high LIN 10 I Common left input for fully differential input. AC ground for single-ended inputs LLINEIN 5 I Left-channel line negative input, selected when SE/BTL is held low LOUT+ 4 O Left-channel positive output in BTL mode and positive in SE mode LOUT– 9 O Left-channel negative output in BTL mode and high impedance in SE mode PC-BEEP 14 I The input for PC Beep mode. PC-BEEP is enabled when a > 1-V (peak-to-peak) square wave is input to PC-BEEP or PCB ENABLE is high. 7, 18 I Power supply for output stage 20 I Right channel headphone input, selected when SE/BTL is held high RIN 8 I Common right input for fully differential input. AC ground for single-ended inputs RLINEIN 23 I Right-channel line input, selected when SE/BTL is held low. ROUT+ 21 O Right-channel positive output in BTL mode and positive in SE mode ROUT– 16 O Right-channel negative output in BTL mode and high impedance in SE mode SE/BTL 15 I Input MUX control input. When this terminal is held high, the LHPIN or RHPIN and SE output is selected. When this terminal is held low, the LLINEIN or RLINEIN and BTL output are selected. SHUTDOWN 22 I When held low, this terminal places the entire device, except PC-BEEP detect circuitry, in shutdown mode. UP 2 I A momentary pulse on this terminal increases the volume level by 2 dB. Holding the terminal low for a period of time will step the amplifier through the volume levels at a rate determined by the capacitor on the CLK terminal. VDD 19 I Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest performance. PVDD RHPIN POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD +0.3 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . internally limited (see Dissipation Rating Table) Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE PWP TA ≤ 25°C 2.7 W‡ DERATING FACTOR 21.8 mW/°C TA = 70°C 1.7 W TA = 85°C 1.4 W ‡ Please see the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report (literature number SLMA002), for more information on the PowerPAD package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPAD on page 33 of the before mentioned document. recommended operating conditions ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ Supply voltage, VDD High level input voltage, High-level voltage VIH MIN MAX 4.5 5.5 SE/BTL 4 SHUTDOWN 2 SE/BTL UNIT V V 3 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ Low level input voltage, Low-level voltage VIL SHUTDOWN Operating free-air temperature, TA 4 0.8 – 40 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 85 V °C TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 electrical characteristics at specified free-air temperature, VDD = 5 V, TA = 25°C (unless otherwise noted) ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ Á ÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ PARAMETER TEST CONDITIONS |VOO| Output offset voltage (measured differentially) PSRR Power supply rejection ratio MIN VI = 0, AV = 2 VDD = 4.9 V to 5.1 V |IIH| High-level input current VDD = 5.5 V, VI = VDD |IIL| Low-level input current VDD = 5.5 V, VI = 0 V IDD Supply current IDD(SD) Supply current, shutdown mode TYP MAX UNIT 25 mV 67 BTL mode 20 SE mode 10 150 dB 900 nA 900 nA mA µA 300 operating characteristics, VDD = 5 V, TA = 25°C, RL = 4 Ω, Gain = 2 V/V, BTL mode (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP PO THD + N Output power THD = 1%, f = 1 kHz Total harmonic distortion plus noise Maximum output power bandwidth PO = 1 W, THD = 5% f = 20 Hz to 15 kHz BOM Supply ripple rejection ratio f = 1 kHz,, CB = 0.47 µF BTL mode 65 SE mode 60 CB = 0.47 µF, µ f = 20 Hz to 20 kHz BTL mode 17 Noise output voltage SE mode 44 Vn MAX UNIT 2 W 0.22% >15 kHz dB µVRMS TYPICAL CHARACTERISTICS Table of Graphs FIGURE vs Output power THD+N Vn SNR vs Gain Total harmonic distortion plus noise vs Frequency 2 3, 5, 7, 9, 11 vs Output voltage 12 Output noise voltage vs Bandwidth 13 Supply ripple rejection ratio vs Frequency 14, 15 Crosstalk vs Frequency 16, 17, 18 Shutdown attenuation vs Frequency 19 Signal-to-noise ratio vs Bandwidth Closed loop respone PO 1, 4, 6, 8, 10 Output power PD Power dissipation ZI Input impedance 20 21, 22 POST OFFICE BOX 655303 vs Load resistance 23, 24 vs Output power 25, 26 vs Ambient temperature 27 vs Gain 28 • DALLAS, TEXAS 75265 5 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION PLUS NOISE vs VOLTAGE GAIN 1% RL = 4 Ω 1% RL = 8 Ω RL = 3 Ω 0.1% AV = +20 to 4 dB f = 1 kHz BTL 0.01% 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 PO = 1 W for AV≥6dB VO = 1 VRMS for AV≤4 dB RL = 8 Ω BTL THD+N –Total Harmonic Distortion + Noise THD+N –Total Harmonic Distortion + Noise 10% 3 0.1% 0.01% –40 –30 PO – Output Power – W Figure 1 PO = 1 W 0.1% PO = 1.75 W 1k 10k 20k THD+N –Total Harmonic Distortion + Noise THD+N –Total Harmonic Distortion + Noise PO = 0.5 W 100 10 20 RL = 3 Ω AV = +20 to +4 dB BTL f = 20 kHz 1% f = 1 kHz 0.1% 0.01% 0.01 f – Frequency – Hz Figure 3 6 0 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10% RL = 3 Ω AV = +20 to 0 dB BTL 1% 0.01% 20 –10 Figure 2 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 10% –20 A V - Voltage Gain - dB f = 20 Hz 0.1 1 PO – Output Power – W Figure 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10% RL = 4 Ω AV = +20 to +4 dB BTL 1% PO= 0.25 W 0.1% PO=1.5 W PO= 1 W THD+N –Total Harmonic Distortion + Noise THD+N –Total Harmonic Distortion + Noise 10% 0.01% 20 100 1k f – Frequency – Hz RL = 4 Ω AV = +20 to +4 dB BTL 1% f = 20 kHz f = 1 kHz 0.1% f = 20 Hz 0.01% 0.01 10k 20k 0.1 1 PO – Output Power – W Figure 5 Figure 6 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10% RL = 8 Ω AV = +20 to +4 dB BTL THD+N –Total Harmonic Distortion + Noise THD+N –Total Harmonic Distortion + Noise 10% 1% P0 = 0.25 W 0.1% PO = 0.5 W P0 = 1 W 0.01% 20 10 100 1k 10k 20k RL = 8 Ω AV = +20 to +4 dB BTL 1% f = 20 kHz 0.1% f = 1 kHz f = 20 Hz 0.01% 0.01 f – Frequency – Hz Figure 7 0.1 1 PO – Output Power – W 10 Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10% RL = 32 Ω AV = +14 to +4 dB SE THD+N –Total Harmonic Distortion + Noise THD+N –Total Harmonic Distortion + Noise 10% 1% 0.1% PO = 25 mW 0.01% PO = 75 mW PO = 50 mW 0.001% 20 100 1k f – Frequency – Hz RL = 32 Ω AV = +14 to +4 dB SE 1% f = 20 kHz 0.1% f = 1 kHz 0.01% 0.01 10k 20k f = 20 Hz 0.1 PO – Output Power – W Figure 9 Figure 10 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT VOLTAGE 10% RL = 10 kΩ AV = +14 to 0 dB SE THD+N –Total Harmonic Distortion + Noise THD+N –Total Harmonic Distortion + Noise 10% 1% 0.1% VO = 1 VRMS 0.01% 0.001% 20 100 1k 10k 20k 1% f = 20 kHz 0.1% f = 1 kHz 0.01% RL = 10 kΩ AV = +14 to +4 dB SE 0.001% 0.2 0.4 f – Frequency – Hz 0.6 0.8 f = 20 Hz 1 1.2 Figure 12 POST OFFICE BOX 655303 1.4 1.6 VO – Output Voltage – VRMS Figure 11 8 1 • DALLAS, TEXAS 75265 1.8 2 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 TYPICAL CHARACTERISTICS OUTPUT NOISE VOLTAGE vs BANDWIDTH SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY 0 RL = 8 Ω CB = 0.47 µF BTL VDD = 5 V RL = 4 Ω 140 Supply Ripple Rejection Ratio – dB Vn – Output Noise Voltage – µV RMS 160 120 100 80 60 AV = +20 dB 40 AV = +6 dB 20 0 0 100 1k BW – Bandwidth – Hz –20 AV = +20 dB –40 –60 –80 AV = +6 dB –100 –120 10k 20k 20 100 Figure 13 1k f – Frequency – Hz Figure 14 SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY CROSSTALK vs FREQUENCY 0 –40 RL = 32 Ω CB = 0.47 µF SE –20 –50 –60 –40 Crosstalk – dB Supply Ripple Rejection Ratio – dB 10k 20k AV = 0 dB –60 PO = 1 W RL = 8 Ω AV = +20 dB BTL –70 LEFT TO RIGHT –80 –90 –80 RIGHT TO LEFT AV = +14 dB –100 –100 –110 –120 20 100 1k f – Frequency – Hz 10k 20k –120 20 100 1k 10k 20k f – Frequency – Hz Figure 15 Figure 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 TYPICAL CHARACTERISTICS CROSSTALK vs FREQUENCY CROSSTALK vs FREQUENCY –40 Crosstalk – dB –60 –60 –70 LEFT TO RIGHT –80 –90 VO = 1 VRMS RL = 10 kΩ AV = +6 dB SE –50 Crosstalk – dB –50 –40 PO = 1 W RL = 8 Ω AV = +6 dB BTL RIGHT TO LEFT –70 LEFT TO RIGHT –80 –90 RIGHT TO LEFT –100 –100 –110 –110 –120 20 100 1k –120 20 10k 20k 100 f – Frequency – Hz Figure 17 Figure 18 SHUTDOWN ATTENUATION vs FREQUENCY 120 VI = 1 VRMS SNR – Signal-To-Noise Ratio – dB Shutdown Attenuation – dB PO = 1 W RL = 8 Ω BTL 115 –20 RL = 10 kΩ, SE –40 –60 RL = 32 Ω, SE –80 –100 RL = 8 Ω, BTL 110 AV = +20 dB 105 100 95 AV = +6 dB 90 85 80 100 1k 10k 20k 0 f – Frequency – Hz 100 1k BW – Bandwidth – Hz Figure 19 10 10k 20k SIGNAL-TO-NOISE RATIO vs BANDWIDTH 0 –120 20 1k f – Frequency – Hz Figure 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10k 20k TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 TYPICAL CHARACTERISTICS CLOSED LOOP RESPONSE 180° 30 25 RL = 8 Ω AV = +20 dB BTL Gain 90° 15 Phase 0° 10 Phase Gain – dB 20 5 –90° 0 –5 –10 10 –180° 100 1k 10k 100k 1M f – Frequency – Hz Figure 21 CLOSED LOOP RESPONSE 180° 30 25 RL = 8 Ω AV = +6 dB BTL 90° 15 Phase 0° 10 Phase Gain – dB 20 5 Gain –90° 0 –5 –10 10 –180° 100 1k 10k 100k 1M f – Frequency – Hz Figure 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 TYPICAL CHARACTERISTICS OUTPUT POWER vs LOAD RESISTANCE OUTPUT POWER vs LOAD RESISTANCE 3.5 3 AV = +14 to 0 dB SE 1250 PO – Output Power – mW PO – Output Power – W 1500 AV = +20 to 0 dB BTL 2.5 2 10% THD+N 1.5 1 1000 750 500 10% THD+N 250 0.5 1% THD+N 1% THD+N 0 0 8 16 24 32 40 48 RL – Load Resistance – Ω 56 0 64 0 8 Figure 23 0.4 3Ω 1.6 0.35 1.4 PD – Power Dissipation – W PD – Power Dissipation – W 64 POWER DISSIPATION vs OUTPUT POWER 1.8 4Ω 1.2 1 0.8 0.6 8Ω 0.4 0.5 1.5 1 PO – Output Power – W 2 4Ω 0.3 0.25 0.2 8Ω 0.15 0.1 32 Ω f = 1 kHz BTL Each Channel 0.2 f = 1 kHz BTL Each Channel 0.05 2.5 0 0 0.1 Figure 25 12 56 Figure 24 POWER DISSIPATION vs OUTPUT POWER 0 0 24 32 16 40 48 RL – Load Resistance – Ω 0.4 0.5 0.6 0.2 0.3 PO – Output Power – W Figure 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0.7 0.8 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION POWER DISSIPATION vs AMBIENT TEMPERATURE 7 ΘJA1 = 45.9°C/W ΘJA2 = 45.2°C/W ΘJA3 = 31.2°C/W ΘJA4 = 18.6°C/W ΘJA4 PD – Power Dissipation – W 6 5 4 ΘJA3 3 ΘJA1,2 2 1 0 –40 –20 20 40 60 80 100 120 140 160 0 TA – Ambient Temperature – °C Figure 27 INPUT IMPEDANCE vs GAIN 90 ZI – Input Impedance – kΩ 80 70 60 50 40 30 20 10 –40 –30 –20 –10 0 AV – Gain – dB 10 20 Figure 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION VDD 0.47 µF UP 100 kΩ 1 100 kΩ 2 L OUT+ 3 DOWN 4 0.47 µF LLINE 0.47 µF L HP 5 6 7 0.47 µF 8 9 0.47 µF 10 L OUT– 11 0.47 µF 12 GND GND UP RLINEIN DOWN SHUTDOWN LOUT+ ROUT+ LLINEIN RHPIN LHPIN VDD PVDD PVDD RIN CLK LOUT– ROUT– LIN SE/BTL BYPASS PC-BEEP GND GND R LINE 24 23 22 Shutdown 21 20 R OUT+ 0.47 µF R HP 19 0.1 µF 18 17 47 nF 0.1 µF VDD 10 µF 16 R OUT– 15 SE/BTL 14 13 GND PC-BEEP 0.47 µF Figure 29. Typical TPA0162 Application Circuit selection of components Figure 30 and Figure 31 are a schematic diagrams of typical notebook computer application circuits. 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION Right CIRHP Head– 0.47 µF phone Input Signal 20 CIRLINE Right 0.47 µF 23 Line Input 8 Signal CRIN 0.47 µF PC BEEP 14 Input Signal CPCB 0.47 µF 17 RHPIN RLINEIN R MUX RIN PC-BEEP – + ROUT+ 21 PCBeep CLK Up CCLK 47 nF COUTR 330 µF 2 3 100 kΩ 15 UP – + Gain/ MUX SE/BTL Control DOWN ROUT– 16 VDD 100 kΩ VDD 100 kΩ Down Depop Circuitry Power Management Left CILHP Head– 0.47 µF phone Input Signal CILLINE Left 0.47 µF Line Input Signal 6 LHPIN 5 LLINEIN 10 1 kΩ PVDD 18 VDD 19 BYPASS SHUTDOWN 11 GND L MUX See Note A VDD CSR 0.1 µF VDD CSR 0.1 µF 22 CBYP 0.47 µF To System Control – + LOUT+ 4 – + LOUT– 9 1 kΩ 1,12, 13,24 COUTR 330 µF LIN CLIN 0.47 µF 100 kΩ NOTE A: A 0.1 µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise signals, a larger electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier. Figure 30. Typical TPA0162 Application Circuit Using Single-Ended Inputs and Input MUX POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION N/C Right Negative Differential Input 20 Signal CCRIN– 0.47 µF 23 Right CRIN+ Positive 0.47 µF Differential 8 Input Signal PC BEEP 14 Input Signal CPCB 0.47 µF 17 RHPIN RLINEIN R MUX – + RIN PC-BEEP Up 100 kΩ 15 CLK COUTR 330 µF – + UP Gain/ DOWN MUX SE/BTL Control ROUT– 100 kΩ Down Depop Circuitry Power Management 6 5 10 LHPIN LLINEIN 16 VDD 1 kΩ 100 kΩ VDD Left CIlHP Head– 0.47 µF phone Input Signal CILLINE Left 0.47 µF Line Input Signal 21 PCBeep CCLK 47 nF 2 3 ROUT+ PVDD 18 VDD 19 BYPASS SHUTDOWN 11 GND L MUX See Note A VDD CSR 0.1 µF VDD CSR 0.1 µF 22 To System Control – + LOUT+ 4 – + LOUT– 9 CBYP 0.47 µF 1 kΩ 1,12, 13,24 COUTR 330 µF LIN CLIN 0.47 µF 100 kΩ NOTE A: A 0.1 µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise signals, a larger electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier. Figure 31. Typical TPA0162 Application Circuit Using Differential Inputs 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION input resistance Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest value to over 6 times that value. As a result, if a single capacitor is used in the input high pass filter, the –3 dB or cut-off frequency will also change by over 6 times. If an additional resistor is connected from the input pin of the amplifier to ground, as shown in the figure below, the variation of the cut-off frequency will be much reduced. Rf C RI IN Input Signal R The input resistance at each gain setting is given in Figure 28. The –3 dB frequency can be calculated using equation 1: f –3 dB + ǒø Ǔ 1 2p C R R (1) I If the filter must be more accurate, the value of the capacitor should be increased while value of the resistor to ground should be decreased. In addition, the order of the filter could be increased. input capacitor, CI In the typical application an input capacitor, CI, is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, CI and the input impedance of the amplifier, ZI, form a high-pass filter with the corner frequency determined in equation 2. –3 dB f c(highpass) + 2 p Z1 C (2) I I fc POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION input capacitor, CI (continued) The value of CI is important to consider as it directly affects the bass (low frequency) performance of the circuit. Consider the example where ZI is 710 kΩ and the specification calls for a flat bass response down to 40 Hz. Equation 2 is reconfigured as equation 3. C I + 2 p 1Z fc (3) I In this example, CI is 5.6 nF so one would likely choose a value in the range of 5.6 nF to 1 µF. A further consideration for this capacitor is the leakage path from the input source through the input network (CI) and the feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely higher that the source dc level. Note that it is important to confirm the capacitor polarity in the application. power supply decoupling, CS The TPA0162 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device VDD lead works best. For filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio power amplifier is recommended. midrail bypass capacitor, CBYP The midrail bypass capacitor, CBYP, is the most critical capacitor and serves several important functions. During startup or recovery from shutdown mode, CBYP determines the rate at which the amplifier starts up. The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and THD+N. Bypass capacitor, CBYP, values of 0.47 µF to 1 µF ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance. output coupling capacitor, CC In the typical single-supply SE configuration, an output coupling capacitor (CC) is required to block the dc bias at the output of the amplifier thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by equation 4. –3 dB f c(high) + 2 p R1 C (4) L C fc 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION output coupling capacitor, CC (continued) The main disadvantage, from a performance standpoint, is the load impedances are typically small, which drives the low-frequency corner higher degrading the bass response. Large values of CC are required to pass low frequencies into the load. Consider the example where a CC of 330 µF is chosen and loads vary from 3 Ω, 4 Ω, 8 Ω, 32 Ω, 10 kΩ, and 47 kΩ. Table 2 summarizes the frequency response characteristics of each configuration. Table 1. Common Load Impedances Vs Low Frequency Output Characteristics in SE Mode RL CC Lowest Frequency 3Ω 330 µF 161 Hz 4Ω 330 µF 120 Hz 8Ω 330 µF 60 Hz 32 Ω 330 µF 15 Hz 10,000 Ω 330 µF 0.05 Hz 47,000 Ω 330 µF 0.01 Hz As Table 1 indicates, most of the bass response is attenuated into a 4-Ω load, an 8-Ω load is adequate, headphone response is good, and drive into line level inputs (a home stereo for example) is exceptional. using low-ESR capacitors Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor. bridged-tied load versus single-ended mode Figure 32 shows a class-AB audio power amplifier (APA) in a BTL configuration. The TPA0162 BTL amplifier consists of two class-AB amplifiers driving both ends of the load. There are several potential benefits to this differential drive configuration but initially consider power to the load. The differential drive to the speaker means that as one side is slewing up, the other side is slewing down, and vice versa. This in effect doubles the voltage swing on the load as compared to a ground referenced load. Plugging 2 × VO(PP) into the power equation, where voltage is squared, yields 4× the output power from the same supply rail and load impedance (see equation 5). + O(PP) (rms) 2 Ǹ2 V V Power + V (5) 2 (rms) R L POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION bridged-tied load versus single-ended mode (continued) VDD VO(PP) 2x VO(PP) RL VDD –VO(PP) Figure 32. Bridge-Tied Load Configuration In a typical computer sound channel operating at 5 V, bridging raises the power into an 8-Ω speaker from a singled-ended (SE, ground reference) limit of 250 mW to 1 W. In sound power that is a 6-dB improvement — which is loudness that can be heard. In addition to increased power there are frequency response concerns. Consider the single-supply SE configuration shown in Figure 33. A coupling capacitor is required to block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 µF to 1000 µF) so they tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the system. This frequency limiting effect is due to the high pass filter network created with the speaker impedance and the coupling capacitance and is calculated with equation 6. fc + 2 p R1 C (6) L C For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimized by eliminating the bulky coupling capacitor. VDD –3 dB VO(PP) CC RL VO(PP) fc Figure 33. Single-Ended Configuration and Frequency Response 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION bridged-tied load versus single-ended mode (continued) Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable considering that the BTL configuration produces 4× the output power of the SE configuration. Internal dissipation versus output power is discussed further in the crest factor section. single-ended operation In SE mode (see Figure 32 and Figure 33), the load is driven from the primary amplifier output for each channel (OUT+, terminals 21 and 4). The amplifier switches single-ended operation when the SE/BTL terminal is held high. This puts the negative outputs in a high-impedance state, and reduces the amplifier’s gain to 1 V/V. BTL amplifier efficiency Class-AB amplifiers are notoriously inefficient. The primary cause of these inefficiencies is voltage drop across the output stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage drop that varies inversely to output power. The second component is due to the sinewave nature of the output. The total voltage drop can be calculated by subtracting the RMS value of the output voltage from VDD. The internal voltage drop multiplied by the RMS value of the supply current, IDDrms, determines the internal power dissipation of the amplifier. An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power supply to the power delivered to the load. To accurately calculate the RMS and average values of power in the load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 34). IDD VO IDD(avg) V(LRMS) Figure 34. Voltage and Current Waveforms for BTL Amplifiers Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are very different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified shape whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform. The following equations are the basis for calculating amplifier efficiency. Efficiency of a BTL amplifier + P PL (7) SUP Where: P + L and P SUP V rms 2 L R , and V L + Ǹ2P , LRMS + VDD IDDavg V therefore, P and I DDavg + 1p ŕ POST OFFICE BOX 655303 V P + L 2R 2 L p V P sin(t) dt R L 0 • DALLAS, TEXAS 75265 + p1 P [cos(t)] p 0 R L V + p2VRP L 21 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION BTL amplifier efficiency (continued) Therefore, P SUP + 2 VpDDR VP L substituting PL and PSUP into equation 7, V Efficiency of a BTL amplifier Where: V P + Ǹ 2 P Therefore, h BTL + p L Ǹ R +2 V L V DD P p RL + 4pVVP DD L 2 P 4 V 2 P 2R L R L (8) DD PL = Power delivered to load PSUP = Power drawn from power supply VLRMS = RMS voltage on BTL load RL = Load resistance VP = Peak voltage on BTL load IDDavg = Average current drawn from the power supply VDD = Power supply voltage ηBTL = Efficiency of a BTL amplifier Table 2 employs equation 4 to calculate efficiencies for four different output power levels. Note that the efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at full output power is less than in the half power range. Calculating the efficiency for a specific system is the key to proper power supply design. For a stereo 1-W audio system with 8-Ω loads and a 5-V supply, the maximum draw on the power supply is almost 3.25 W. Table 2. Efficiency vs Output Power in 5-V 8-Ω BTL Systems OUTPUT POWER (W) EFFICIENCY (%) PEAK VOLTAGE (V) INTERNAL DISSIPATION (W) 0.25 31.4 2.00 0.55 0.50 44.4 2.83 0.62 1.00 62.8 4.00 4.47† 0.59 1.25 70.2 † High peak voltages cause the THD to increase. 0.53 A final point to remember about class-AB amplifiers (either SE or BTL) is how to manipulate the terms in the efficiency equation to utmost advantage when possible. Note that in equation 8, VDD is in the denominator. This indicates that as VDD goes down, efficiency goes up. 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION crest factor and thermal considerations Class-AB power amplifiers dissipate a significant amount of heat in the package under normal operating conditions. A typical music CD requires 12 dB to 15 dB of dynamic range, or headroom above the average power output, to pass the loudest portions of the signal without distortion. In other words, music typically has a crest factor between 12 dB and 15 dB. When determining the optimal ambient operating temperature the internal dissipated power at the average output power level must be used. From the TPA0162 data sheet, one can see that when the TPA0162 is operating from a 5-V supply into a 3-Ω speaker that 4 W peaks are available. Converting watts to dB: P + 10Log dB ǒǓ P P W ref ǒ Ǔ + 10Log 4W + 6 dB 1W (9) Subtracting the headroom restriction to obtain the average listening level without distortion yields: 6 dB – 15 dB = –9 dB (15 dB crest factor) 6 dB – 12 dB = –6 dB (12 dB crest factor) 6 dB – 9 dB = –3 dB (9 dB crest factor) 6 dB – 6 dB = 0 dB (6 dB crest factor) 6 dB – 3 dB = 3 dB (3 dB crest factor) Converting dB back into watts: P W + 10PdBń10 Pref + 63 mW (18 dB crest factor) + 125 mW (15 dB crest factor) + 250 mW (9 dB crest factor) + 500 mW (6 dB crest factor) + 1000 mW (3 dB crest factor) + 2000 mW (15 dB crest factor) (10) This is valuable information to consider when attempting to estimate the heat dissipation requirements for the amplifier system. Comparing the absolute worst case, which is 2 W of continuous power output with a 3 dB crest factor, against 12 dB and 15 dB applications drastically affects maximum ambient temperature ratings for the system. Using the power dissipation curves for a 5-V, 3-Ω system, the internal dissipation in the TPA0162 and maximum ambient temperatures is shown in Table 3. Table 3. TPA0162 Power Rating, 5-V, 3-Ω, Stereo PEAK OUTPUT POWER (W) AVERAGE OUTPUT POWER POWER DISSIPATION (W/Channel) MAXIMUM AMBIENT TEMPERATURE 4 2 W (3 dB) 1.7 – 3°C 4 1000 mW (6 dB) 1.6 6°C 4 500 mW (9 dB) 1.4 24°C 4 250 mW (12 dB) 1.1 51°C 4 125 mW (15 dB) 0.8 78°C 4 63 mW (18 dB) 0.6 96°C POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION crest factor and thermal considerations (continued) Table 4. TPA0162 Power Rating, 5-V, 8-Ω, Stereo PEAK OUTPUT POWER AVERAGE OUTPUT POWER POWER DISSIPATION (W/Channel) MAXIMUM AMBIENT TEMPERATURE 2.5 W 1250 mW (3 dB crest factor) 0.55 100°C 2.5 W 1000 mW (4 dB crest factor) 0.62 94°C 2.5 W 500 mW (7 dB crest factor) 0.59 97°C 2.5 W 250 mW (10 dB crest factor) 0.53 102°C The maximum dissipated power, PDmax, is reached at a much lower output power level for an 8 Ω load than for a 3 Ω load. As a result, this simple formula for calculating PDmax may be used for an 8 Ω application: P Dmax + 2V 2 DD p2R L (11) However, in the case of a 3 Ω load, the PDmax occurs at a point well above the normal operating power level. The amplifier may therefore be operated at a higher ambient temperature than required by the PDmax formula for a 3 Ω load. The maximum ambient temperature depends on the heat sinking ability of the PCB system. The derating factor for the PWP package is shown in the dissipation rating table on page 4. Converting this to ΘJA: 1 + 45°CńW + Derating1 Factor + 0.022 Θ JA (12) To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are per channel so the dissipated power needs to be doubled for two channel operation. Given ΘJA, the maximum allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be calculated with the following equation. The maximum recommended junction temperature for the TPA0162 is 150°C. The internal dissipation figures are taken from the Power Dissipation vs Output Power graphs. T A Max + TJ Max * ΘJA PD + 150 * 45 (0.6 2) + 96°C (15 dB crest factor) (13) NOTE: Internal dissipation of 0.6 W is estimated for a 2-W system with 15 dB crest factor per channel. Tables 3 and 4 show that for some applications no airflow is required to keep junction temperatures in the specified range. The TPA0162 is designed with thermal protection that turns the device off when the junction temperature surpasses 150°C to prevent damage to the IC. Tables 3 and 4 were calculated for maximum listening volume without distortion. When the output level is reduced the numbers in the table change significantly. Also, using 8-Ω speakers dramatically increases the thermal performance by increasing amplifier efficiency. 24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION SE/BTL operation The ability of the TPA0162 to easily switch between BTL and SE modes is one of its most important cost saving features. This feature eliminates the requirement for an additional headphone amplifier in applications where internal stereo speakers are driven in BTL mode but external headphone or speakers must be accommodated. Internal to the TPA0162, two separate amplifiers drive OUT+ and OUT–. The SE/BTL input (terminal 15) controls the operation of the follower amplifier that drives LOUT– and ROUT– (terminals 9 and 16). When SE/BTL is held low, the amplifier is on and the TPA0162 is in the BTL mode. When SE/BTL is held high, the OUT– amplifiers are in a high output impedance state, which configures the TPA0162 as an SE driver from LOUT+ and ROUT+ (terminals 4 and 21). IDD is reduced by approximately one-half in SE mode. Control of the SE/BTL input can be from a logic-level CMOS source or, more typically, from a resistor divider network as shown in Figure 35. 20 23 RHPIN RLINEIN R MUX – + 8 ROUT+ 21 RIN COUTR 330 µF – + ROUT– VDD 16 1 kΩ 100 kΩ SE/BTL 15 100 kΩ Figure 35. TPA0162 Resistor Divider Network Circuit Using a readily available 1/8-in. (3.5 mm) stereo headphone jack, the control switch is closed when no plug is inserted. When closed the 100-kΩ/1-kΩ divider pulls the SE/BTL input low. When a plug is inserted, the 1-kΩ resistor is disconnected and the SE/BTL input is pulled high. When the input goes high, the OUT– amplifier is shut-down causing the speaker to mute (virtually open-circuits the speaker). The OUT+ amplifier then drives through the output capacitor (CO) into the headphone jack. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION PC BEEP operation The PC BEEP input allows a system beep to be sent directly from a computer through the amplifier to the speakers with few external components. The input is normally activated automatically, but may be selected manually by pulling PCB ENABLE high. When the PC BEEP input is active, both of the LINEIN and HPIN inputs are deselected and both the left and right channels are driven in BTL mode with the signal from PC BEEP. The gain from the PC BEEP input to the speakers is fixed at 0.3 V/V and is independent of the volume setting. When the PC BEEP input is deselected, the amplifier will return to the previous operating mode and volume setting. Furthermore, if the amplifier is in shutdown mode, activating PC BEEP will take the device out of shutdown and output the PC BEEP signal, then return the amplifier to shutdown mode. When PCB ENABLE is held low, the amplifier will automatically switch to PC BEEP mode after detecting a valid signal at the PC BEEP input. The preferred input signal is a square wave or pulse train with an amplitude of 1 Vpp or greater. To be a accurately detected, the signal must have a minimum of 1 Vpp amplitude, rise and fall times of less than 0.1 µs and a minimum of 8 rising edges. When the signal is no longer detected, the amplifier will return to its previous operating mode and volume setting. When PCB ENABLE is held high, PC BEEP is selected and the LINEIN and HPIN inputs are deactivated regardless of the input signal. PCB ENABLE has an internal 100 kΩ pulldown resistor and will trip at approximately VDD/2. If it is desired to ac couple the PC BEEP input, the value of the coupling capacitor should be chosen to satisfy the following equation: C PCB w 2p f PCB 1 (100 k ) W (14) The PC BEEP input can also be dc coupled to avoid using this coupling capacitor. The pin normally sits at midrail when no signal is present. 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 APPLICATION INFORMATION Input MUX operation Right Headphone Input Signal CIRHP 0.47 µF CIRLINE 0.47 µF 20 RHPIN 23 RLINEIN R MUX Right Line Input Signal 8 – + ROUT+ 21 – + ROUT– 16 RIN CRIN 0.47 µF Figure 36. TPA0162 Example Input MUX Circuit Another advantage of using the MUX feature is setting the gain of the headphone channel to –1. This provides the optimum distortion performance into the headphones where clear sound is more important. Refer to the SE/BTL operation section for a description of the headphone jack control circuit. shutdown modes The TPA0162 employs a shutdown mode of operation designed to reduce supply current, IDD, to the absolute minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state, IDD = 150 µA. SHUTDOWN should never be left unconnected because amplifier operation would be unpredictable. Table 5. Shutdown and Mute Mode Functions INPUTS† AMPLIFIER STATE SE/BTL SHUTDOWN INPUT OUTPUT Low High Line BTL X Low X Mute High High HP SE † Inputs should never be left unconnected. X = do not care POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27 TPA0162 2-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL SLOS249B – JUNE 1999 – REVISED MARCH 2000 MECHANICAL DATA PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE 20 PINS SHOWN 0,30 0,19 0,65 20 0,10 M 11 Thermal Pad (See Note D) 4,50 4,30 0,15 NOM 6,60 6,20 Gage Plane 1 10 0,25 A 0°– 8° 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 14 16 20 24 28 A MAX 5,10 5,10 6,60 7,90 9,80 A MIN 4,90 4,90 6,40 7,70 9,60 DIM 4073225/F 10/98 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusions. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. E. Falls within JEDEC MO-153 PowerPAD is a trademark of Texas Instruments Incorporated. 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 2000, Texas Instruments Incorporated