ETC XR-T6164AID

XRT6164A
...the analog plus company
TM
Digital Line
Interface Transceiver
March 2001 3
APPLICA TIONS
FEA TURES
D Single 5V Supply
D Compatible with CCITT G.703 64Kbps Co-Directional Interface Recommendation When Used With Either XRT6165 or XRT6166
D Low Power
D Converts Balanced Bipolar Transmit and Receive
Signals Propagated Over Two Twisted Pair Cables
to TTL Compatible Dual-Rail Data
D Links Remote Equipment Equipped With CCITT
G.703 64Kbps Co Directional Interfaces Over DIstances Up to 500 Meters Without Equlaization
D Receive Data Comparator Threshold Storage
Provides Ping-Pong Operation Capability
D Loss of Signal Alarm
D Dual Matched Driver Outputs
GENERAL
D Data Adaption Unit (DAU)
D General Purpose TTL Compatible Line Interface
DESCRIPTION
The XRT6164A is a bipolar analog chip intended for
general purpose line interface applications at bit rates up
to 1.544Mbps (T1). It contains both receive and transmit
circuitry in a 16 pin dual-in-line plastic (PDIP) package.
The receiver is designed for short line applications having
a cable loss up to 10dB measured at the half bit rate. The
ORDERING
transmitter has open collector line driver outputs that are
capable of handling up to 40mA.
When used in conjunction with either XRT6165 or
XRT6166, the chip set provides a 64Kbps codirectional
interface as specified in CCITT G.703.
INFORMA TION
Part No.
Package
Operating
Temperature
Range
XR-T6164AIP
16 Lead 300 Mil PDIP
-10°°C to +85°°C
XR-T6164AID
16 Lead 300 Mil JEDEC SOIC
-10°°C to +85°°C
Rev. 1.01
E2001
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017
1
XRT6164A
BLOCK
DIAGRAM
PEAK CAP
Positive
Data
Comparator
14
+
RX+I/P
-
16
Peak
Detector
RX-I/P
1
15
S+R
5
S-R
3
RX ALARM
2
I/P BIAS
TTL
Buffer
Threshold
Generator
+
-
TCM CON
12
Negative
Data
Comparator
TCM
Control
TTL
Buffer
TTL
Buffer
VCCA
13
GNDA
4
TX+I/P
11
10
TX+O/P
TX-I/P
6
8
TX-O/P
Bias
VCCD
9
GNDD
7
Open
Collector
Driver
Open
Collector
Driver
Figure 1. XRT6164A
Rev. 1.01
2
Block Diagram
XRT6164A
PIN CONFIGURA
TION
RX-I/P
I/P BIAS
RX ALARM
GNDA
S-R
TX-I/P
GNDD
TX-O/P
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
RX-I/P
I/P BIAS
RX ALARM
GNDA
S-R
TX-I/P
GNDD
TX-O/P
RX+I/P
TCM CON
PEAK CAP
VCCA
S+R
TX+I/P
TX+O/P
VCCD
16 Lead PDIP (0.300”)
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
16 Lead SOIC (Jedec,
RX+I/P
TCM CON
PEAK CAP
VCCA
S+R
TX+I/P
TX+O/P
VCCD
0.300”)
PIN DESCRIPTION
Pin#
Symbol
Type
Description
1
RX-I/P
I
Receiver
Negative
2
I/P BIAS
O
Receive
Input Bias.
3
RX ALARM
O
Loss of Signal Alarm.
4
GNDA
5
S-R
O
Receive
6
TX-I/P
I
Transmit
7
GNDD
8
TX-O/P
9
VCCD
10
TX+O/P
Analog
Bipolar
Line analog input.
Input.
Connects to center tap of input transformer secondary winding.
Active low.
Ground.
Negative
Negative
Output from negative bipolar input pulses (active low).
Data Output.
Input Data.
Input for negative output driver (active low).
Digital Ground.
O
Transmit
Negative
Output
Driver .
Open collector, drives output transformer primary.
+5V ± 5% Digital Supply .
O
Transmit
11
TX+I/P
I
Transmit
12
S+R
O
Receive
13
VCCA
14
PEAK CAP
15
TCM CON
I
16
RX+I/P
I
Positive
Positive
Positive
+5V ± 5% Analog
Peak Detector
Output
Input Data.
Data Output.
Positive
Input for positive output driver (active low).
Output from positive bipolar input pulses (active low).
Stores peak detector voltage.
Multiplex
Control.
discharge paths (active low).
Receiver
Open collector, drives output transformer primary.
Supply .
Capacitor .
T ime Compression
Driver .
Bipolar
Input.
Rev.1.01
3
When active, disconnects peak detector charge and
Line analog input.
XRT6164A
ELECTRICAL
CHARACTERISTICS
Test Conditions:
VCC = 5V ± 5%, TA = -10 °C to 85 °C, Unless Otherwise Specified
Parameters
Min.
Typ.
Max.
Units
4.75
5
5.25
V
Analog Supply Current
7
10
mA
Digital Supply Current
17
22
mA
1
2.2
Vp
Measured from Pins 1 or 16 with Respect to Pin 2
10
dB
Maximum Cable Loss Range
DC Electrical
Conditions
Characteristics
Supply Voltage
Receiver
Input Signal
Dynamic Range
Input Impedance
20
kW
Measured Between Pins 1 And 16
Input Slicing Threshold
50
%
Percent of Peak Input Signal Amplitude
Input Bias Voltage
1.45
V
Measured at Pin 2
Loss of Signal Alarm Threshold
150
mVp
Loss of Signal Alarm Level
Hysteresis
±
Peak Detector Leakage
1.5
dB
-80
Data Output Low
V
Measured at Pins 5 or 12, IOUT = +1.6mA
V
Measured at Pins 5 or 12, IOUT = -40mA
V
Measured at Pin 3; IOUT = +1.6mA
V
Measured at Pin 3; IOUT = -40mA
0.8
V
Measured at Pin 15; IIN Min = -500mA, IIN Max =
+5mA
0.8
V
Measured at Pins 6, 11; IIN = -700mA
3.0
Alarm Output Low
0.4
Alarm Output High
VCC 0.5
TCM Input Low Voltage
Difference Between Alarm-on and Alarm-off
Levels
mA
0.4
Data Output High
Measured from Pins 1 or 16 with Respect to Pin 2
Transmitter
Input Low Voltage
Input High Voltage
V
Measured at Pins 6, 11; IIN = +5mA
Output Low Voltage
2.2
1.2
V
Measured at Pins 8, 10; IOUT = -40mA
Output Low Current
40
mA
Measured at Pins 8, 10; VOUT = 1.2V
mA
Measured at Pins 8, 10; VOUT = 10V Outputs in
off state
2.2
Vp
Pin 1, 16 with Respect to Pin 21
Output Rise Time
80
ns
Pins 5, 12; CL = 15pF, 10% to 90%
Output Fall Time
80
ns
Pins 5, 12; CL =15pF, 90% to 10%
Output Leakage Current
AC Electrical
-100
Characteristics
Receiver
Input Level
Notes
1 Higher input voltages
Bold face parameters
1
are possible if a resistive input attenuator is used.
are covered by production test and guaranteed over operating
Rev. 1.01
4
temperature
range.
XRT6164A
ELECTRICAL
CHARACTERISTIC
Parameters
(CONT’D)
Min.
Max.
Units
Output Rise Time
80
ns
Pins 8, 10; RL = 130, CL = 15pF, 10% to 90%
Output Fall Time
80
ns
Pins 8, 10; RL = 130, CL = 15pF, 90% to 10%
Rising Edge Delay
100
ns
Pins 8, 10; RL = 130, CL = 15pF, 50% to 50%
(I/P to O/P)
Falling Edge Delay
100
ns
Pins 8, 10; RL = 130, CL = 15pF, 50% to 50%
(I/P to O/P)
AC Electrical
Characteristics
Typ.
Conditions
(Cont’d)
Transmitter
Notes
Bold face parameters
are covered
by production
test and guaranteed
Specifications
ABSOLUTE
MAXIMUM
are subject
to change
Supplier
without
temperature
range.
notice
RA TINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V
Magnetic
over operating
Storage Temperature . . . . . . . . . . . . -65°C to +150°C
Information:
Pulse
Telecom Product Group
P.O. Box 12235
San Diego, CA 92112
Tel. (619) 674-8100
Fax. (619) 674-8262
Transpower Technologies, Inc.
24 Highway 28, Suite 202
Crystal Bay, NV 89402 0187
Tel. (702) 831 0140
Fax. (702) 831 3521
Rev.1.01
5
XRT6164A
SYSTEM
detector output voltage by disconnecting the peak
detector storage capacitor charge and discharge paths.
Since the receive data comparator bias voltage is stored
during transmit mode, it is immediately available when
receive mode resumes.
DESCRIPTION
The XRT6164A is a general purpose line interface chip
that contains the receive and transmit circuitry necessary
to convert TTL logic levels to a bipolar signal both to and
from a twisted pair cable.
Transmitter
Receiver
The XRT6164A transmitter section contains two matched
open collector output drivers that are capable of driving
the line transformer directly with a current up to 40mA.
The transmitter output drivers include diode clamps to
ensure non-saturating operation. Transmitter digital
inputs, which are active-low, are TTL compatible.
External resistors are used between the transmitter
outputs and the output transformer primary to set the
output pulse amplitude.
The XRT6164A receiver section converts a balanced
bipolar signal that has been attenuated and distorted by
up to 10dB of twisted pair cable to active-low TTL
compatible logic levels.
The cable is transformer coupled to the receiver
differential inputs (RX+IP, RX-IP) which are biased
through the input transformer secondary winding by a
voltage generated on-chip (I/P BIAS). The bipolar receive
signal is applied to a peak detector, and to a pair of data
comparators. The peak detector output voltage charges
an external capacitor connected to PEAK CAP. This
voltage generates a data comparator bias level that is
approximately 50% of the peak input pulse amplitude.
Thus, data slicing is automatically accomplished at the
optimum level over the full cable loss range. TTL
compatible output stages buffer the receiver digital
outputs (S+R, S-R) and provide active low signals
corresponding to received positive and negative input
pulses.
APPLICA TION INFORMA TION
Figure 2 shows a general line driver application circuit
using the XRT6164A. This device converts bipolar
transmit and receive signals in the 64Kbps to 1.544Mbps
range to active-low TTL compatible logic levels.
Bipolar signals that have been attenuated and distorted
by twisted pair cable are transformer-coupled to the line
side of the XRT6164A as shown on the left side of
Figure 2 . Suggested transformers for both the input and
output applications are the Pulse types PE-65535 or
TTI 7147 for 64Kbps use and the PE-65835 for
1.544Mbps applications.
Loss of input signal is detected by a comparator that
monitors input signal level. An active-low TTL compatible
logic level (RX ALARM) indicates signal loss.
Comparator hysteresis prevents chatter on this output.
The right side of Figure 2 shows the TTL compatible
digital inputs and outputs. Please refer to the pin
description section of this data sheet for detailed
information about each signal.
Ping-pong operation is made possible by the time
compression multiplex control input (TCM CON). A logic
0 applied to this pin during transmission stores the peak
Rev. 1.01
6
XRT6164A
+5V
0.1mF
Receive
Input
TIP
1:2
9
13
VCCA VCCD
RX+I/P
480
1
RING
PE-65535
TTI-7147
Transmit
Output
16
0.1mF
TIP
2
14
0.1mF
I/P BIAS
1:2
+5V
300
300
8
TX+O/P
TX-O/P
0.1mF
Figure 2. XRT6164A
5
S-R
TCM CON
10
12
3
RX ALARM
PEAK CAP
0.1mF
RING
PE-65535
TTI-7147
XRT6164A
RX-I/P
S+R
TX+I/P
GNDA GNDD
4
15
11
TX-I/P
7
Line Driver Application
Rev.1.01
7
6
RXDATA+
RXDATARX ALARM
TCM CON
TX DATA+
TX DATA-
XRT6164A
16 LEAD PLASTIC DUAL-IN-LINE
(300 MIL PDIP)
Rev . 1.00
16
9
1
8
E1
E
D
A2
Seating
Plane
A
L
a
A1
B
INCHES
SYMBOL
eA
eB
B1
e
MILLIMETERS
MIN
MAX
A
0.145
0.210
3.68
5.33
A1
0.015
0.070
0.38
1.78
A2
0.115
0.195
2.92
4.95
B
0.014
0.024
0.36
0.56
B1
0.030
0.070
0.76
1.78
C
0.008
0.014
0.20
0.38
D
0.745
0.840
18.92
21.34
E
0.300
0.325
7.62
8.26
E1
0.240
0.280
6.10
7.11
e
eA
MIN
0.100 BSC
MAX
2.54 BSC
0.300 BSC
7.62 BSC
eB
0.310
0.430
7.87
10.92
L
0.115
0.160
2.92
4.06
a
0°°
15°°
0°°
15°°
Note:
The control dimension
is the inch column
Rev. 1.01
8
C
XRT6164A
16 LEAD SMALL OUTLINE
(300 MIL JEDEC SOIC)
Rev . 1.00
D
16
9
E
H
1
8
C
A
Seating
Plane
e
a
B
A1
L
INCHES
SYMBOL
MILLIMETERS
MIN
MAX
MIN
MAX
A
0.093
0.104
2.35
2.65
A1
0.004
0.012
0.10
0.30
B
0.013
0.020
0.33
0.51
C
0.009
0.013
0.23
0.32
D
0.398
0.413
10.10
10.50
E
0.291
0.299
7.40
7.60
e
0.050 BSC
1.27 BSC
H
0.394
0.419
10.00
10.65
L
0.016
0.050
0.40
1.27
a
0°
8°
0°
8°
Note:
The control dimension
is the millimeter
Rev.1.01
9
column
XRT6164A
Notes
Rev. 1.01
10
XRT6164A
Notes
Rev.1.01
11
XRT6164A
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are
free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary
depending upon a user’s specific application. While the information in this publication has been carefully checked;
no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or
malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly
affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation
receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the
user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 2001 EXAR Corporation
Datasheet March 2001
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Rev. 1.01
12