ZL40800 and ZL40802 6 GHz Fixed Modulus Prescalers ÷ 8 and ÷ 16 Data Sheet Features • • • • • July 2003 3.45V Single Supply Operation Low Power Dissipation: 190mW typ Broadband: DC to 6GHz SSB Phase Noise (–153dBc/Hz @ 10KHz) Pout 3dBm Ordering Information ZL40800/DCA ZL40800/DCB ZL40802/DCA ZL40802/DCB ZL40800 – Divide by 8 ZL40802 – Divide by 16 Description The ZL40800 and ZL40802 are Bipolar 3.45V supply, very low power prescalers for professional applications with a fixed modulus of 8 or 16. The ultra low close in (1KHz offset) SSB phase noise performance is ideal for narrow band communications systems or systems with ultra low jitter budgets such as next generation fibre optic communications. The devices are broadband from DC to 6GHz. Applications • • • • • • • SOIC SOIC SOIC SOIC -40°C to 85°C Prescaler Modulus • • (tubes) 8 pin (tape and reel) 8 pin (tubes) 8 pin (tape and reel) 8 pin DC to 6 GHz PLL applications HyperLan LMDS Instrumentation Satellite Communications Fibre Optic Communications; OC48, OC192 Ultra Low Jitter Clock Systems See Figure 1 and Application Note for RF Prescalers for more details. VCC IN VCC OUT 1 8 200 Ohm OUTPUT 7 6 OUTPUT B Vref Div N 400 Ohm INPUT 2 INPUT B 3 • 10mA GND GND 4 5 Figure 1 - Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved. ZL40800 and ZL40802 Data Sheet Vcc IN 1 8 Vcc OUT INPUT 2 7 OUTPUT INPUT Bar GND 3 4 6 5 OUTPUT Bar GND SOIC (N) Figure 2 - Pin Connections - Top View Application Configuration Figure 3 shows a recommended application configuration. This example shows the device set up for single ended operation. Application Diagram C1: 1nF C2: 10nF Rsource: C4: 100pF 1 8 2 7 3 6 4 5 R2: 400 C3: 100pF R1: 400 Rfilter C5: 10nF C6: 10nF Rload Note: Dotted Components Optional Figure 3 - Recommended circuit configuration This represents the circuit used to complete characterisation. The tabulated Electrical performance is guaranteed using this application circuit. Unpopulated evaluation boards are available, type No. ZLE40008. Fully populated evaluation boards are also available, type Nos. ZLE40800 and ZLE40802. 2 Zarlink Semiconductor Inc. ZL40800 and ZL40802 Data Sheet Circuit Options The application circuit includes some optional components that may be required to improve tolerance of system noise present in the application. Dummy R source may be added to the inverting input to provide a better matched source impedance at the input. This will improve the rejection of common mode noise present within the system. Dummy R load may be added to the inverting output to provide better matched load at the output. This will reduce the radiated EMI at the output and reduce the Output Noise present on the supply rail. R1 and R2 400 Ohm Pull ups are added to increase the headroom present at the amplifier output. This enhances the operation at maximum supply and temperature. An alternative is to provide an inductive choke in place of R1 and R2. These components provide a parallel DC Path to Vcc increasing the bandwidth of the output stage and providing a virtually flat output power across frequency. See Fig 12 and 13. Rfilter can be inserted between the Vcc in and the Vcc_out to provide additional filtering to the input Vcc. The input Vcc powers the input bias reference only and can be a sensitive point to system noise. The nominal input current at Vcc_IN s 0.35mA. An alternative would be to use an inductive choke. C1 is additional Supply Filtering and should be added with Rfilter. The IC includes 10pF of on Chip Supply Filtering. Input and Output Circuit Figure 4 shows the equivalent input and output circuit. Vcc_Out Vref • 1.0nH Input bar 1.0nH Gnd • • • • • 0.5pF • 0.8pF • Output Output Bar • 10mA • 1.0nH 1.0nH • • 0.2pF • 400 Ohm Input 400 Ohm 0.5pF • 200 Ohm • I/O Circuits Vcc_In 200 Ohm • • • Figure 4 - Input and Output Equivalent Circuit 3 Zarlink Semiconductor Inc. Gnd ZL40800 and ZL40802 Data Sheet Increase Output Power Output Match and Narrow Band Operating Range The device has been characterised with a mismatch at the output. This is a broadband configuration. 3dB more output power is available if the application matches the load to the output impedance. Phase Noise in dBC/Hz ZL40802 Phase Noise vs Offset Freq Pin = -6dBm, Vcc = 3.6V, Temp = 25C @ 1,3 & 5GHz -130 -135 -140 5GHz 3GHz 1GHz -145 -150 -155 -160 100 1000 10000 100000 Offset Frequency in Hz Figure 5 - ZL40802 Typical Phase Noise Absolute Maximum Ratings Parameter Symbol Min Max Units Vcc -0.5 6 V 12 dBm +0.5 V 1 Supply voltage 2 RFin 3 All I/O ports 4 ESD protection 2k 5 Storage temperature -55 +150 °C Symbol Min Max Units Vcc 3.3 3.6 V -0.5 V Mil-std 883B / 3015 cat1 Operating Ranage Parameter 1 Supply voltage 2 RFin Frequency Range 0.1 6 GHz 3 Operating Junction Temperature -40 125 °C 4 Junc’n to Amb’t resistance Rth (j-a) 150 °C/W 4 layer FR4 Board 5 Junc’n to Amb’t resistance Rth (j-c) 60 °C/W 4 layer FR4 Board 4 Zarlink Semiconductor Inc. ZL40800 and ZL40802 Data Sheet AC/DC Electrical Characteristics Electrical Characteristics† Characteristic Pin Min. Typ. Icc_in (Supply current) 1 Icc_out (Supply current) 8 29 52 Icc_out (Supply current) 8 31 55 Input frequency 2,3 1 Input sensitivity 2,3 Input overload 2,3 Phase Noise Max. 0.35 Units Conditions mA ZL40800 Div8 & ZL40802 Div16 86 mA ZL40800 Div8 89 mA ZL40802 Div16 6 GHz RMS sinewave, -10 dBm fin = 1GHz to 6GHz, Note 1 10 dBm fin = 1GHz to 6GHz, Note 1 6,7 -150 dBC/Hz @ 1KHz Offset Fin = 3GHz Output voltage 6,7 1 Vp-p Differential Into 50ohm pull up resistors Output power 6,7 dBm fin = 1GHz to 6GHz, Pin = -10dBm Note 2 Output t-rise 6,7 110 ps fin = 1GHz to 6GHz, Pin = -10dBm Output t-fall 6,7 110 ps fin = 1GHz to 6GHz, Pin = -10dBm T – prop delay 2,6 250 ps 50% IN to 50% OUT Jitter 6,7 0.1 ps Output Duty Cycle 6,7 45 Input Edge Speed 2,3 500 -20 4 -7 -2 50 2 55 % V/us fin = 1GHz to 6GHz, In = -10dBm For < 1GHz input operation † These characteristics are guaranteed by design and characterisation over the following range of operating conditions unless otherwise stated: Tamb = -40C to + 85C, Vcc = 3.3V to 3.6V. Note 1: Pin = power measured into 50 ohm Load from 50 Ohm Source. Note 2: Pout Single Ended AC coupled Single 50 Ohm Termination 5 Zarlink Semiconductor Inc. ZL40800 and ZL40802 Data Sheet Typical Input Sensitivity (Sinewave Drive) 15 5 Edge Speed >500V/us 0 -5 Guaranteed Operating Range -40C to 85C -10 -15 -20 -25 -30 -35 0 1 2 3 4 5 6 7 8 Input Frequency (GHz) Figure 6 - Typical Input Sensitivity (sine wave drive) Single Ended AC Coupled Single Termination ( + 400 Ohm or Choke Pull Up ) 400 Ohm 200 Ohm 400 Ohm Vcc out 200 Ohm Optional Balance 50 Ohm Transmission Line 50 Ohm Vin into 50 Ohm (dBm) 10 Gnd Pre-scaler Output Figure 7 - Single Ended AC Coupled Single Termination 6 Zarlink Semiconductor Inc. 9 ZL40800 and ZL40802 Data Sheet ZL40800 Phase Noise vs Offset Pin = 2dBm, Vcc = 3.6V, Temp = 25C Phaase Noise in dBC/Hz -130 -135 -140 5GHz 3GHz 1GHz -145 -150 -155 -160 100 1000 10000 100000 Offset frequency in Hz Figure 8 - ZL40800 Typical Phase Noise Phase Noise (dBc/Hz) ZL40800: Phase Noise vs Input Frequency @ 2.5dBm Pin, 3.6V Supply, 25C -120 -125 -130 -135 -140 -145 -150 -155 -160 100 Hz 1 KHz 10 KHz 100 KHz 0 1 2 3 4 5 6 Input Frequency (GHz) Figure 9 - ZL40800 Phase Noise vs Input Frequency 7 Zarlink Semiconductor Inc. ZL40800 and ZL40802 Data Sheet Phase Noise (dBc/Hz) ZL40800: Phase Noise v Pin, 3.6V Supply, Fin = 3GHz, T = 25C -120 100 Hz -130 1 KHz -140 10 KHz -150 100 KHz -160 -10 -5 0 5 Pin (dBm) Figure 10 - ZL40800 Phase Noise vs Input Power Phase Noise (dBc/Hz) ZL40800: Phase Noise v Vcc Fin = 3GHz, Pin = -6dBm, T =25C -120 100 Hz -130 1 KHz -140 10 KHz -150 100 KHz -160 3.2 3.3 3.4 3.5 3.6 3.7 Supply Voltage (V) Figure 11 - ZL40800 Phase Noise vs Vcc 8 Zarlink Semiconductor Inc. ZL40800 and ZL40802 Data Sheet Single Ended or Differential Load Figure 12 and Figure 13 illustrate the output waveform when measured differential and single ended with a 6GHz waveform at the input at a level of +2dBm. The single ended output contains some input frequency breakthrough which contributes to the distortion present. This is a common mode signal which is rejected if the output is taken differentially. Differential operation also provides an additional 3dB. Differential Operation reduces the radiated EMI in the system and reduces the susceptibility to common mode system noise. ZL40800_Dev1 (/8) with 400R pull-ups Frequency_sweep, Vcc = 3.6v Device 1,Temperature = 25°C Device 1,Temperature = 85°C 1 -1 -2 -3 -4 -5 -6 0 1E+09 2E+09 3E+09 4E+09 5E+09 6E+09 7E+09 8E+09 i/p frequency (Hz) Figure 12 - ZL40800 Pout / Input Frequency ZL40802_dev1_Frequency_sweep, Vcc = 3.3v Device 1,Temperature = -40°C Device 1,Temperature = 85°C Device 1,Temperature = 25°C 0 -1 -2 o/p level (dBm) o/p level (dBm) 0 -3 -4 -5 -6 -7 -8 1000000000 10000000000 i/p frequency (Hz) Figure 13 - ZL40800Pout v Input Frequency (Vcc=3.3V, T= -40C,25C, 85C) 9 Zarlink Semiconductor Inc. ZL40800 and ZL40802 Figure 14 - ZL40800 Single Ended Out @ 5Ghz +2dBm Figure 15 - ZL40800 Differential Out @ 5Ghz +2dBm 10 Zarlink Semiconductor Inc. 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