74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer Rev. 02 — 9 May 2008 Product data sheet 1. General description The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC139; 74AHCT139 is a high-speed, dual 2-to-4 line decoder/demultiplexer. This device has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application. The 74AHC139; 74AHCT139 is identical to the HEF4556 of the HE4000B family. 2. Features n n n n Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC Input levels: u For 74AHC139: CMOS level u For 74AHCT139: TTL level n ESD protection: u HBM EIA/JESD22-A114E exceeds 2000 V u MM EIA/JESD22-A115-A exceeds 200 V u CDM EIA/JESD22-C101C exceeds 1000 V n Multiple package options n Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC139D −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74AHC139PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74AHC139 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer Table 1. Ordering information …continued Type number Package Temperature range Name Description Version 74AHCT139D −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74AHCT139PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74AHCT139 4. Functional diagram 1 1E 1Y0 2 3 1A0 1Y1 1A1 1Y2 1Y3 2Y0 14 13 2A0 2Y1 2A1 2Y2 2Y3 4 DX 0 0 1 G 3 1 2 2 5 0 3 6 1 3 7 5 6 7 2 3 1 X/Y 0 1 1 2 2 EN 3 4 5 6 7 12 11 DX 0 0 1 G 3 1 2 14 10 0 13 9 15 2E 15 4 3 12 11 10 9 14 13 15 X/Y 0 1 2 EN (a) mna779 1 2 3 (b) 12 11 10 9 mna781 a = demultiplexer and b = decoder Fig 1. Logic symbol Fig 2. IEC logic symbol 2 1A0 3 1A1 1 1E 14 2A0 13 2A1 DECODER 1Y0 4 1Y1 5 1Y2 6 1Y3 7 2Y0 12 2Y1 11 DECODER 2Y2 10 2Y3 15 9 2E mna780 Fig 3. Functional diagram 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 2 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 5. Pinning information 5.1 Pinning 1E 1 16 VCC 1A0 2 15 2E 1A1 3 14 2A0 1Y0 4 13 2A1 139 1Y1 5 12 2Y0 1Y2 6 11 2Y1 1Y3 7 10 2Y2 GND 8 9 2Y3 001aad029 Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description 1E 1 enable input (active LOW) 1A0 2 address input 1A1 3 address input 1Y0 4 output 1Y1 5 output 1Y2 6 output 1Y3 7 output GND 8 ground (0 V) 2Y3 9 output 2Y2 10 output 2Y1 11 output 2Y0 12 output 2A1 13 address input 2A0 14 address input 2E 15 enable input (active LOW) VCC 16 supply voltage 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 3 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 6. Functional description Table 3. Function table[1] Control Input nE nA0 nA1 nY0 nY1 nY2 nY3 H X X H H H H L [1] Output L L L H H H H L H L H H L H H H L H H H H H H L H = HIGH voltage level; L = LOW voltage level; X = don’t care. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage Conditions input clamping current VI < −0.5 V [1] IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V [1] IO output current VO = −0.5 V to (VCC + 0.5 V) ICC IIK Min Max Unit −0.5 +7.0 V −0.5 +7.0 V −20 - mA −20 +20 mA −25 +25 mA supply current - +75 mA IGND ground current −75 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation - 500 mW Tamb = −40 °C to +125 °C [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K. For TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K. 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 4 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 8. Recommended operating conditions Table 5. Operating conditions Symbol Parameter Conditions Min Typ Max Unit 2.0 5.0 5.5 V 74AHC139 VCC supply voltage VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C ∆t/∆V input transition rise and fall rate VCC = 3.0 V to 3.6 V - - 100 ns/V VCC = 4.5 V to 5.5 V - - 20 ns/V 74AHCT139 VCC supply voltage 4.5 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C ∆t/∆V input transition rise and fall rate - - 20 ns/V VCC = 4.5 V to 5.5 V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74AHC139 VIH VIL VOH VOL HIGH-level input voltage VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V LOW-level input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V HIGH-level VI = VIH or VIL output voltage IO = −50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = −50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = −50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = −4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = −8.0 mA; VCC = 4.5 V 3.94 - - 3.80 - 3.70 - V LOW-level VI = VIH or VIL output voltage IO = 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 5 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions VI = 5.5 V or GND; VCC = 0 V to 5.5 V −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max - - 0.1 - 1.0 - 2.0 µA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 4.0 - 40 - 80 µA CI input capacitance - 3 10 - 10 - 10 pF CO output capacitance - 4 - - - - - pF VI = VCC or GND 74AHCT139 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = −50 µA 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.80 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 µA IO = −8.0 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 µA IO = 8.0 mA II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 4.0 - 40 - 80 µA ∆ICC additional per input pin; supply current VI = VCC − 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 3 10 - 10 - 10 pF CO output capacitance - 4 - - - - - pF VI = VCC or GND 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 6 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max CL = 15 pF - 5.5 11.0 1.0 13.0 1.0 14.0 ns CL = 50 pF - 7.9 14.5 1.0 16.5 1.0 18.5 ns - 3.9 7.2 1.0 8.5 1.0 9.0 ns - 5.6 9.2 1.0 10.5 1.0 11.5 ns CL = 15 pF - 4.8 9.2 1.0 11.0 1.0 11.5 ns CL = 50 pF - 6.9 12.7 1.0 14.5 1.0 16.0 ns - 3.4 6.3 1.0 7.5 1.0 8.0 ns - 4.9 8.3 1.0 9.5 1.0 10.5 ns - 26 - - - - - pF - 4.7 7.2 1.0 8.5 1.0 9.0 ns - 6.5 9.2 1.0 10.5 1.0 11.5 ns - 3.6 6.3 1.0 7.5 1.0 8.0 ns - 5.2 8.3 1.0 9.5 1.0 10.5 ns - 23 - - - - - pF 74AHC139 tpd [2] propagation nAn to nYn; see Figure 5 delay VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF [2] nE to nYn; see Figure 6 VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF CPD power fi = 1 MHz; VI = GND to VCC dissipation capacitance [3] 74AHCT139; VCC = 4.5 V to 5.5 V tpd [2] propagation nAn to nYn; see Figure 5 delay CL = 15 pF CL = 50 pF [2] nE to nYn; see Figure 6 CL = 15 pF CL = 50 pF CPD power fi = 1 MHz; VI = GND to VCC dissipation capacitance [3] [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 7 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 11. Waveforms VI VM nAn input GND t PHL t PLH VOH VM nYn output VOL mna782 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Address input to output propagation delays VI VM nE input GND tPHL tPLH VOH VM nYn output VOL mna783 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Enable input to output propagation delays Table 8. Measurement points Type Input Output VM VM 74AHC139 0.5 × VCC 0.5 × VCC 74AHCT139 1.5 V 0.5 × VCC 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 8 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer VI negative pulse tW 90 % VM VM 10 % GND tr tf tr VI positive pulse GND tf 90 % VM VM 10 % tW VCC G VI VO DUT RT CL 001aah768 Test data is given in Table 9. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Fig 7. Load circuitry for measuring switching times Table 9. Test data Type Input Load Test VI tr, tf CL 74AHC139 VCC ≤ 3.0 ns 15 pF, 50 pF tPLH, tPHL 74AHCT139 3.0 V ≤ 3.0 ns 15 pF, 50 pF tPLH, tPHL 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 9 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig 8. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT109-1 (SO16) 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 10 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 Fig 9. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Package outline SOT403-1 (TSSOP16) 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 11 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT139_2 20080509 Product data sheet - 74AHC_AHCT139_1 Modifications: 74AHC_AHCT139_1 • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Table 6: the conditions for input leakage current have been changed. 19990901 Product specification 74AHC_AHCT139_2 Product data sheet - - © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 12 of 14 74AHC139; 74AHCT139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74AHC_AHCT139_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 9 May 2008 13 of 14 NXP Semiconductors 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 9 May 2008 Document identifier: 74AHC_AHCT139_2