ETC 74F32SJX

Revised August 2000
74F32
Quad 2-Input OR Gate
General Description
This device contains four independent gates, each of which
performs the logic OR function.
Ordering Code:
Order Number
Package Number
74F32SC
74F32SJ
74F32MTC
74F32PC
Package Description
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC14
N14A
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Unit Loading/Fan Out
Pin Names
Description
U.L.
Input IIH/IIL
HIGH/LOW
Output IOH/IOL
An, Bn
Inputs
1.0/1.0
20 µA/−0.6 mA
On
Outputs
50/33.3
−1 mA/20 mA
© 2000 Fairchild Semiconductor Corporation
DS009463
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74F32 Quad 2-Input OR Gate
April 1988
74F32
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Free Air Ambient Temperature
Junction Temperature under Bias
−55°C to +150°C
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
3-STATE Output
−0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Current Applied to Output
in LOW State (Max)
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
4000V
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
VCC
Units
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
0.8
V
VCD
Input Clamp Diode Voltage
−1.2
V
Min
V
Min
VOH
Output HIGH
Voltage
VOL
Output LOW
2.0
10% VCC
2.5
5% VCC
2.7
V
10% VCC
Input HIGH
Current
IBVI
Input HIGH Current
Breakdown Test
ICEX
Output HIGH
Leakage Current
VID
Input Leakage
IOD
IOH = −1 mA
0.5
V
Min
IOL = 20 mA
5.0
µA
Max
VIN = 2.7V
7.0
µA
Max
VIN = 7.0V
50
µA
Max
VOUT = VCC
V
0.0
3.75
µA
0.0
−0.6
mA
Max
VIN = 0.5V
−150
mA
Max
VOUT = 0V
4.75
Test
Recognized as a LOW Signal
IIN = −18 mA
IOH = −1 mA
Voltage
IIH
Conditions
Recognized as a HIGH Signal
Output Leakage
Circuit Current
IID = 1.9 µA
All Other Pins Grounded
VIOD = 150 mV
All Other Pins Grounded
IIL
Input LOW Current
IOS
Output Short-Circuit Current
ICCH
Power Supply Current
6.1
9.2
mA
Max
VO = HIGH
ICCL
Power Supply Current
10.3
15.5
mA
Max
VO = LOW
−60
AC Electrical Characteristics
Symbol
Parameter
TA = +25°C
TA = −55°C to +125°C
TA = 0°C to +70°C
VCC = +5.0V
VCC = +5.0V
VCC = +5.0V
CL = 50 pF
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
Max
Min
Max
tPLH
Propagation Delay
3.0
4.2
5.6
3.0
7.5
3.0
6.6
tPHL
An, Bn to On
3.0
4.0
5.3
2.5
7.5
3.0
6.3
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Units
ns
74F32
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
3
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74F32
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
www.fairchildsemi.com
4
74F32
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
5
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74F32 Quad 2-Input OR Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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