1CY74FCT162652T Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16652T CY74FCT162652T 16-Bit Registered Transceivers SCCS061B - July 1994 - Revised September 2001 Features Functional Description • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temperature range of −40˚C to +85˚C • VCC = 5V ± 10% CY74FCT16652T Features: • 64 mA sink current, 32 mA source current • Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25˚C CY74FCT162652T Features: • Balanced 24 mA output drivers • Reduced system switching noise • Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25˚C These 16-bit, high-speed, low-power, registered transceivers that are organized as two independent 8-bit bus transceivers with three-state D-type registers and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal storage registers. OEAB and OEBA control pins are provided to control the transceiver functions. SAB and SBA control pins are provided to select either real-time or stored data transfer. Data on the A or B data bus, or both, can be stored in the internal D flip-flops by LOW-to-HIGH transitions at the appropriate clock pins (CLKAB or CLKBA), regardless of the select or enable control pins. When SAB and SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines will remain at its last state. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16652T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162652T has 24-mA balanced output drivers with current-limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162652T is ideal for driving transmission lines. Logic Block Diagrams 1OEAB 2OEAB 1OEBA 2OEBA 1CLKBA 2CLKBA 1SBA 2SBA 1CLKAB 2CLKAB 1SAB 2SAB B REG B REG D D C C 2A1 1A1 A REG A REG D D 1B1 C TO 7 OTHER CHANNELS FCT16652-1 2 B1 C TO 7 OTHER CHANNELS Copyright FCT16652-2 © 2001, Texas Instruments Incorporated CY74FCT16652T CY74FCT162652T Pin Configuration SSOP/TSSOP Top View 1OEAB 1 56 1CLKAB 2 55 1OEBA 1CLKBA 1SAB 3 54 1SBA GND 4 53 1A 1 5 52 1B1 GND 1A 2 6 51 1B2 VCC 7 50 VCC 1A 3 8 49 1B3 1A 4 9 48 1B4 1A 5 10 47 1B5 GND 11 46 GND 1A 6 12 45 1B6 1A 7 13 44 1B7 1A 8 14 43 1B8 2A 1 15 42 2B1 2A 2 16 41 2B2 2A3 17 40 2B3 GND 18 39 GND 2A 4 19 38 2B4 2A 5 20 37 2B5 2A 6 21 36 2B6 V CC 22 35 VCC 2A 7 23 34 2B7 2A 8 2B8 GND 33 24 FCT16652–1 32 25 2SAB 26 31 2SBA 2CLKAB 27 30 2CLKBA 2OEAB 28 29 GND 2OEBA FCT16652-3 Pin Description Name Description A Data Register A Inputs Data Register B Outputs B Data Register B Inputs Data Register A Outputs CLKAB, CLKBA Clock Pulse Inputs SAB, SBA Output Data Source Select Inputs OEAB, OEBA Output Enable Inputs 2 CY74FCT16652T CY74FCT162652T Function Table[1] Data I/O[2] Inputs OEAB OEBA CLKAB CLKBA SAB SBA A B L L H H H or L H or L X X X X Input Input Operation or Function X H H H H or L X X[3] X X Input Input Unspecified[2] Output Store A, Hold B Store A in Both Registers L L X L H or L X X X X[3] Unspecified[2] Input Input Hold A, Store B Store B in both Registers L L X X X L Output Input Real Time B Data to A Bus Stored B Data to A Bus L L X H or L X H H H X X L X Input Output Real Time A Data to B Bus Stored A Data to B Bus H H H or L X H X H L H or L H or L H H Output Output Stored A Data to B Bus and Stored B Data to A Bus Isolation Store A and B Data Notes: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care =LOW-to-HIGH Transition 2. The data output functions may be enabled or disabled by various signals at the OEAB or OEBA inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. 3. Select control=L; clocks can occur simultaneously. Select control=H; clocks must be staggered to load both registers. 3 CY74FCT16652T CY74FCT162652T BUS A BUS B OEAB L OEBA L CLKAB X CLKBA X SAB X BUS A SBA L OEAB H BUS B OEBA L Real-Time Transfer Bus B to BusA OEBA H X H CLKAB CLKBA X X CLKBA X SAB L SBA X Real-Time Transfer BusA to Bus B BUS A OEAB X L L CLKAB X SAB X X X BUS B BUS A SBA X X X OEAB H BUS A OEBA L Storage from A and/or B CLKAB H or L CLKBA H or L SAB H SBA H Transfer Stored Data to A and/or B Maximum Ratings[4] (Above which the useful life may be impaired. For user guidelines, not tested.) Power Dissipation .......................................................... 1.0W Storage Temperature .....................Com’l −55°C to +125°C Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) Ambient Temperature with Power Applied .................................Com’l −55°C to +125°C Operating Range DC Input Voltage .................................................−0.5V to +7.0V Range DC Output Voltage ..............................................−0.5V to +7.0V Industrial DC Output Current (Maximum Sink Current/Pin) ...........................−60 to +120 mA Ambient Temperature VCC −40°C to +85°C 5V ± 10% Note: 4. Stresses greater than those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 4 CY74FCT16652T CY74FCT162652T DC Electrical Characteristics Over the Operating Range Parameter Test Conditions[5] Description VIH Input HIGH Voltage Logic HIGH Level VIL Input LOW Voltage Logic LOW Level VH Input Hysteresis VIK Input Clamp Diode Voltage VCC=Min., IIN=−18 mA IIH Input HIGH Current IIL Input LOW Current IOZH Min. Typ.[6] Max. 2.0 Unit V 0.8 100 mV −1.2 V VCC=Max., VI=VCC ±1 µA VCC=Max., VI=GND ±1 µA High Impedance Output Current (Three-State Output pins) VCC=Max., VOUT=2.7V ±1 µA IOZL High Impedance Output Current (Three-State Output pins) VCC=Max., VOUT=0.5V ±1 µA IOS Short Circuit Current[8] VCC=Max., VOUT=GND −80 −200 mA IO Output Drive Current[8] VCC=Max., VOUT=2.5V −50 −180 mA ±1 µA Max. Unit IOFF Power-Off Disable VCC=0V, VOUT −0.7 V −140 ≤4.5V[7] Output Drive Characteristics for CY74FCT16652T Parameter VOH VOL Test Conditions[5] Min. Typ.[6] VCC=Min., IOH=−3 mA 2.5 3.5 VCC=Min., IOH=−15 mA 2.4 3.5 VCC=Min., IOH=−32 mA 2.0 3.0 Description Output HIGH Voltage Output LOW Voltage VCC=Min., IOL=64 mA V 0.2 0.55 V Min. Typ.[6] Max. Unit Output Drive Characteristics for CY74FCT162652T Parameter Test Conditions[5] Description Output LOW Current[8] VCC=5V, VIN=VIH or VIL, VOUT=1.5V 60 115 150 mA IODH Output HIGH Current[8] VCC=5V, VIN=VIH or VIL, VOUT=1.5V −60 −115 −150 mA VOH Output HIGH Voltage VCC=Min., IOH=−24 mA 2.4 3.3 VOL Output LOW Voltage VCC=Min., IOL=24 mA IODL V 0.3 0.55 V Typ. Max. Unit Capacitance (TA = +25˚C, f = 1.0 MHz) Parameter Description[10] Test Conditions CIN Input Capacitance VIN = 0V 4.5 6.0 pF COUT Output Capacitance VOUT = 0V 5.5 8.0 pF Notes: 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 6. Typical values are at VCC=5.0V, +25°C ambient. 7. Tested at TA= +25°C. 8. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 9. Duration of the condition cannot exceed one second. 10. This parameter is measured at characterization but not tested. 5 CY74FCT16652T CY74FCT162652T Power Supply Characteristics Param. Test Conditions[11] Description VIN<0.2V VIN>VCC−0.2V Min. Typ.[12] Max. Unit — 5 500 µA — 0.5 1.5 mA ICC Quiescent Power Supply Current VCC=Max. ∆ICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN=3.4V[13] ICCD Dynamic Power Supply Current[14] VCC=Max. Outputs Open OEAB=OEAB=GND One Input Toggling 50% Duty Cycle VIN=VCC or VIN=GND — 75 120 µA/ MHz IC Total Power Supply Current[15] VCC=Max. Outputs Open fo=10 MHz (CLKBA) 50% Duty Cycle OEAB=OEBA=GND One-Bit Toggling f1=5 MHz 50% Duty Cycle VIN=VCC or VIN=GND — 0.8 1.7 mA VIN=3.4V or VIN=GND — 1.3 3.2 mA VCC=Max. Outputs Open fo=10 MHz (CLKBA) 50% Duty Cycle OEAB=OEBA=GND Sixteen Bits Toggling f1=2.5 MHz 50% Duty Cycle VIN=VCC or VIN=GND — 3.8 6.5[16] mA VIN=3.4V or VIN=GND — 8.3 20.0[16] mA Notes: 11. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 12. Typical values are at VCC=5.0V +25° ambient. 13. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 14. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. = IQUIESCENT + IINPUTS + IDYNAMIC 15. IC IC = ICC+∆ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) = Duty Cycle for TTL inputs HIGH DH = Number of TTL inputs at DH NT ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 = Number of inputs changing at f1 N1 All currents are in milliamps and all frequencies are in megahertz. 16. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 6 CY74FCT16652T CY74FCT162652T Switching Characteristics Over the Operating Range[17] CY74FCT16652AT CY74FCT162652AT Parameter Description Min. Max. Unit Fig. No.[18] tPLH tPHL Propagation Delay Bus to Bus 1.5 6.3 ns 1, 3 tPZH tPHL Output Enable Time OEAB or OEBA to Bus 1.5 9.8 ns 1, 7, 8 tPHZ tPLZ Output Disable Time OEAB or OEBA to Bus 1.5 6.3 ns 1, 7, 8 tPLH tPHL Propagation Delay Clock to Bus 1.5 6.3 ns 1, 5 tPLH tPHL Propagation Delay SBA or SAB to Bus 1.5 7.7 ns 1, 5 tSU Set-Up time HIGH or LOW Bus to Clock 2.0 — ns 4 tH Hold Time HIGH or LOW Bus to Clock 1.5 — ns 4 tW Clock Pulse Width HIGH or LOW 5.0 — ns 5 — 0.5 ns tSK(O) Output Skew[19] CY74FCT16652CT CY74FCT162652CT Parameter Description Min. Max. Unit Fig. No.[18] tPLH tPHL Propagation Delay Bus to Bus 1.5 5.4 ns 1, 3 tPZH tPHL Output Enable Time OEAB or OEBA to Bus 1.5 7.8 ns 1, 7, 8 tPHZ tPLZ Output Disable Time OEAB or OEBA to Bus 1.5 6.3 ns 1, 7, 8 tPLH tPHL Propagation Delay Clock to Bus 1.5 5.7 ns 1, 5 tPLH tPHL Propagation Delay SBA or SAB to Bus 1.5 6.2 ns 1, 5 tSU Set-Up Time HIGH or LOW Bus to Clock 2.0 — ns 4 tH Hold Time HIGH or LOW Bus to Clock 1.5 — ns 4 tW Clock Pulse Width HIGH or LOW 5.0 — ns 5 tSK(O) Output Skew[19] — 0.5 ns Notes: 17. Minimum limits are specified, but not tested, on propagation delays. 18. See “Parameter Measurement Information” in the General Information section. 19. Skew between any two outputs of the same package switching in the same direction. This parameter ensured by design. 7 CY74FCT16652T CY74FCT162652T Ordering Information CY74FCT16652 Speed (ns) Ordering Code Package Name Package Type Operating Range 5.4 CY74FCT16652CTPVC/PVCT O56 56-Lead (300-Mil) SSOP Industrial 6.3 CY74FCT16652ATPVC/PVCT O56 56-Lead (300-Mil) SSOP Industrial Ordering Information CY74FCT162652 Speed (ns) 5.4 6.3 Ordering Code Package Name Package Type 74FCT162652CTPACT Z56 56-Lead (240-Mil) TSSOP CY74FCT162652CTPVC O56 56-Lead (300-Mil) SSOP 74FCT162652CTPVCT O56 56-Lead (300-Mil) SSOP CY74FCT162652ATPVC O56 56-Lead (300-Mil) SSOP 74FCT162652ATPVCT O56 56-Lead (300-Mil) SSOP 8 Operating Range Industrial Industrial CY74FCT16652T CY74FCT162652T Package Diagrams 56-Lead Shrunk Small Outline Package O56 56-Lead Thin Shrunk Small Outline Package Z56 9 PACKAGE OPTION ADDENDUM www.ti.com 27-Sep-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 74FCT162652ATPVCG4 ACTIVE SSOP DL 56 74FCT162652ATPVCT ACTIVE SSOP DL 74FCT162652CTPACT ACTIVE TSSOP 74FCT162652CTPVCG4 ACTIVE 74FCT162652CTPVCT 20 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM DGG 56 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SSOP DL 56 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74FCT162652ETPACT OBSOLETE TSSOP DGG 56 TBD Call TI Call TI 74FCT162652ETPVCT OBSOLETE SSOP DL 56 TBD Call TI Call TI 74FCT16652ATPVCG4 ACTIVE SSOP DL 56 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74FCT16652ATPVCTG4 ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74FCT16652CTPVCG4 ACTIVE SSOP DL 56 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74FCT16652CTPVCTG4 ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT162652ATPVC ACTIVE SSOP DL 56 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT162652CTPVC ACTIVE SSOP DL 56 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT162652ETPAC OBSOLETE TSSOP DGG 56 TBD Call TI Call TI CY74FCT162652ETPVC OBSOLETE SSOP DL 56 TBD Call TI Call TI CY74FCT16652ATPVC ACTIVE SSOP DL 56 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT16652ATPVCT ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT16652CTPVC ACTIVE SSOP DL 56 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CY74FCT16652CTPVCT ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 20 20 20 20 20 CY74FCT16652ETPAC OBSOLETE TSSOP DGG 56 TBD Call TI Call TI CY74FCT16652ETPACT OBSOLETE TSSOP DGG 56 TBD Call TI Call TI CY74FCT16652ETPVC OBSOLETE SSOP DL 56 TBD Call TI Call TI CY74FCT16652ETPVCT OBSOLETE SSOP DL 56 TBD Call TI Call TI FCT162652ATPVCTG4 ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM FCT162652CTPACTE4 ACTIVE TSSOP DGG 56 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM FCT162652CTPACTG4 ACTIVE TSSOP DGG 56 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM FCT162652CTPVCTG4 ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 27-Sep-2007 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 11.35 18.67 3.1 16.0 32.0 Q1 74FCT162652ATPVCT SSOP DL 56 1000 330.0 32.4 74FCT162652CTPACT TSSOP DGG 56 2000 330.0 24.4 8.6 15.6 1.8 12.0 24.0 Q1 74FCT162652CTPVCT SSOP DL 56 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1 CY74FCT16652ATPVCT SSOP DL 56 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1 CY74FCT16652CTPVCT SSOP DL 56 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) 74FCT162652ATPVCT SSOP DL 56 1000 346.0 346.0 49.0 74FCT162652CTPACT TSSOP DGG 56 2000 346.0 346.0 41.0 74FCT162652CTPVCT SSOP DL 56 1000 346.0 346.0 49.0 CY74FCT16652ATPVCT SSOP DL 56 1000 346.0 346.0 49.0 CY74FCT16652CTPVCT SSOP DL 56 1000 346.0 346.0 49.0 Pack Materials-Page 2 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0.025 (0,635) 0.0135 (0,343) 0.008 (0,203) 48 0.005 (0,13) M 25 0.010 (0,25) 0.005 (0,13) 0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03) Gage Plane 0.010 (0,25) 1 0°–ā8° 24 0.040 (1,02) A 0.020 (0,51) Seating Plane 0.110 (2,79) MAX 0.004 (0,10) 0.008 (0,20) MIN PINS ** 28 48 56 A MAX 0.380 (9,65) 0.630 (16,00) 0.730 (18,54) A MIN 0.370 (9,40) 0.620 (15,75) 0.720 (18,29) DIM 4040048 / E 12/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). 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