INTEGRATED CIRCUITS DATA SHEET 74LVC1G18 1-of-2 non-inverting demultiplexer with 3-state deselected output Product specification 2003 Jul 25 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 5.5 V The 74LVC1G18 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. • 5 V tolerant input/output for interfacing with 5 V logic • High noise immunity Input can be driven from either 3.3 or 5 V devices. These features allow the use of these devices in a mixed 3.3 and 5 V environment. • Complies with JEDEC standard: – JESD8-7 (1.65 to 1.95 V) – JESD8-5 (2.3 to 2.7 V) This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. – JESD8B/JESD36 (2.7 to 3.6 V). • ESD protection: – HBM EIA/JESD22-A114-A exceeds 2000 V The 74LVC1G18 is a 1-of-2 non-inverting demultiplexer with a 3-state output. The 74LVC1G18 buffers the data on input pin A and passes it either to output 1Y or 2Y, depending on whether the state of the select input (pin S) is LOW or HIGH. – MM EIA/JESD22-A115-A exceeds 200 V. • ±24 mA output drive (VCC = 3.0 V) • CMOS low power consumption • Latch-up performance exceeds 250 mA • Direct interface with TTL levels • SOT363 and SOT457 package • Specified from −40 to +85 °C and −40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C. SYMBOL tPHL/tPLH PARAMETER propagation delay input A to output nY CI input capacitance CPD power dissipation capacitance per gate CONDITIONS UNIT VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ 5.1 ns VCC = 2.5 V; CL = 30 pF; RL = 500 Ω 3.2 ns VCC = 2.7 V; CL = 50 pF; RL = 500 Ω 3.2 ns VCC = 3.3 V; CL = 50 pF; RL = 500 Ω 3.0 ns VCC = 5.0 V; CL = 50 pF; RL = 500 Ω 2.3 ns 2.5 pF 28.8 pF VCC = 3.3 V; notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; ∑ (CL × VCC2 × fo) = sum of outputs. 2. The condition is VI = GND to VCC. 2003 Jul 25 TYPICAL 2 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 FUNCTION TABLE See note 1. INPUT OUTPUT S A 1Y 2Y L L L Z L H H Z H L Z L H H Z H Note 1. H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE MARKING 74LVC1G18GW −40 to +125 °C 6 SC-88 plastic SOT363 VW 74LVC1G18GV −40 to +125 °C 6 SC-74 plastic SOT457 V18 PINNING PIN SYMBOL DESCRIPTION 1 S data select 2 GND ground (0 V) 3 A data input 4 2Y data output 5 VCC supply voltage 6 1Y data output handbook, halfpage handbook, halfpage S 1 GND 2 A 6 1Y 18 3 5 VCC 4 2Y 1 S 3 A 1Y 6 2Y 4 MNB087 MNB088 Fig.1 Pin configuration. 2003 Jul 25 Fig.2 Logic symbol. 3 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 1.65 5.5 V VI input voltage 0 5.5 V VO output voltage active mode 0 VCC V VCC = 0 V; Power-down or high-impedance state 0 5.5 V −40 +125 °C VCC = 1.65 to 2.7 V 0 20 ns/V VCC = 2.7 to 5.5 V 0 10 ns/V Tamb operating ambient temperature tr, tf input rise and fall times LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER VCC supply voltage CONDITIONS MIN. MAX. UNIT −0.5 +6.5 V IIK input diode current VI < 0 − −50 mA VI input voltage note 1 −0.5 +6.5 V IOK output diode current VO > VCC or VO < 0 − ±50 mA VO output voltage active mode; notes 1 and 2 −0.5 Power-down mode; notes 1 and 2 −0.5 IO output source or sink current VO = 0 to VCC VCC + 0.5 V +6.5 V − ±50 mA ICC, IGND VCC or GND current − ±100 mA Tstg storage temperature −65 +150 °C PD power dissipation − 300 mW Tamb = −40 to +125 °C Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. 2003 Jul 25 4 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC (V) OTHER Tamb = −40 to +85 °C; note 1 VIH VIL VOL VOH 1.65 to 1.95 0.65 × VCC − − V 2.3 to 2.7 1.7 − − V 2.7 to 3.6 2.0 − − V 4.5 to 5.5 0.7 × VCC − − V 1.65 to 1.95 − − 0.35 × VCC V 2.3 to 2.7 − − 0.7 V 2.7 to 3.6 − − 0.8 V 4.5 to 5.5 − − 0.3 × VCC V IO = 100 µA 1.65 to 5.5 − − 0.1 V IO = 4 mA 1.65 − − 0.45 V IO = 8 mA 2.3 − − 0.3 V IO = 12 mA 2.7 − − 0.4 V IO = 24 mA 3.0 − − 0.55 V IO = 32 mA 4.5 − − 0.55 V HIGH-level input voltage LOW-level input voltage LOW-level output voltage VI = VIH or VIL HIGH-level output voltage VI = VIH or VIL IO = −100 µA 1.65 to 5.5 VCC − 0.1 − − V IO = −4 mA 1.65 1.2 − − V IO = −8 mA 2.3 1.9 − − V IO = −12 mA 2.7 2.2 − − V IO = −24 mA 3.0 2.3 − − V IO = −32 mA 4.5 3.8 − − V ILI input leakage current VI = 5.5 V or GND 5.5 − ±0.1 ±5 µA IOZ 3-state output OFF-state VI = VIH or VIL; current VO = VCC or GND 5.5 − ±0.1 ±10 µA Ioff power OFF leakage current 0 − ±0.1 ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 − 0.1 10 µA ∆ICC additional quiescent supply current per pin 2.3 to 5.5 − 5 500 µA 2003 Jul 25 VI or VO = 5.5 V VI = VCC − 0.6 V; IO = 0 5 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP. MAX. UNIT VCC (V) Tamb = −40 to +125 °C VIH VIL VOL VOH HIGH-level input voltage 1.65 to 1.95 0.65 × VCC − − V 2.3 to 2.7 1.7 − − V 2.7 to 3.6 2.0 − − V 4.5 to 5.5 0.7 × VCC − − V 1.65 to 1.95 − − 0.35 × VCC V 2.3 to 2.7 − − 0.7 V 2.7 to 3.6 − − 0.8 V 4.5 to 5.5 − − 0.3 × VCC V IO = 100 µA 1.65 to 5.5 − − 0.1 V IO = 4 mA 1.65 − − 0.70 V IO = 8 mA 2.3 − − 0.45 V IO = 12 mA 2.7 − − 0.60 V IO = 24 mA 3.0 − − 0.80 V IO = 32 mA 4.5 − − 0.80 V IO = −100 µA 1.65 to 5.5 VCC − 0.1 − − V IO = −4 mA 1.65 0.95 − − V IO = −8 mA 2.3 1.7 − − V IO = −12 mA 2.7 1.9 − − V IO = −24 mA 3.0 2.0 − − V LOW-level input voltage LOW-level output voltage VI = VIH or VIL HIGH-level output voltage VI = VIH or VIL IO = −32 mA 4.5 3.4 − − V ILI input leakage current VI = 5.5 V or GND 5.5 − − ±20 µA IOZ 3-state output OFF-state VI = VIH or VIL; current VO = VCC or GND 5.5 − − ±20 µA Ioff power OFF leakage current 0 − − ±20 µA ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 − − 40 µA ∆ICC additional quiescent supply current per pin 2.3 to 5.5 − − 5000 µA VI or VO = 5.5 V VI = VCC − 0.6 V; IO = 0 Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2003 Jul 25 6 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 AC CHARACTERISTICS GND = 0 V. TEST CONDITIONS SYMBOL PARAMETER MIN. WAVEFORMS TYP. MAX. UNIT VCC (V) Tamb = −40 to +85 °C; note 1 tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay input A to output nY 3-state output enable time input S to output nY 3-state output disable time input S to output nY see Figs 3 and 5 see Figs 4 and 5 see Figs 4 and 5 1.65 to 1.95 1.0 5.1 10.0 ns 2.3 to 2.7 1.0 3.2 5.5 ns 2.7 1.0 3.2 5.4 ns 3.0 to 3.6 1.0 3.0 5.0 ns 4.5 to 5.5 1.0 2.3 3.8 ns 1.65 to 1.95 1.0 5.8 11.0 ns 2.3 to 2.7 1.0 3.6 6.2 ns 2.7 1.0 3.6 6.0 ns 3.0 to 3.6 1.0 3.1 5.2 ns 4.5 to 5.5 1.0 2.4 3.6 ns 1.65 to 1.95 1.0 4.8 9.0 ns 2.3 to 2.7 1.0 2.7 5.3 ns 2.7 1.0 3.5 5.2 ns 3.0 to 3.6 1.0 3.3 4.9 ns 4.5 to 5.5 0.5 2.2 3.3 ns Tamb = −40 to +125 °C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay input A to output nY 3-state output enable time input S to output nY 3-state output disable time input S to output nY see Figs 3 and 5 see Figs 4 and 5 see Figs 4 and 5 1.65 to 1.95 1.0 − 12.5 ns 2.3 to 2.7 0.5 − 6.9 ns 2.7 0.5 − 6.8 ns 3.0 to 3.6 0.5 − 6.3 ns 4.5 to 5.5 0.5 − 4.8 ns 1.65 to 1.95 1.0 − 13.8 ns 2.3 to 2.7 0.5 − 7.8 ns 2.7 0.5 − 7.5 ns 3.0 to 3.6 0.5 − 6.5 ns 4.5 to 5.5 0.5 − 4.5 ns 1.65 to 1.95 1.0 − 11.3 ns 2.3 to 2.7 0.5 − 6.6 ns 2.7 0.5 − 6.5 ns 3.0 to 3.6 0.5 − 6.1 ns 4.5 to 5.5 0.5 − 4.1 ns Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C. 2003 Jul 25 7 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 AC WAVEFORMS handbook, halfpage VI VM VM A input GND tPHL tPLH VOH VM nY output VOL VM MNB089 INPUT VCC VM VI tr = tf 1.65 to 1.95 V 0.5 × VCC VCC ≤ 2.0 ns 2.3 to 2.7 V 0.5 × VCC VCC ≤ 2.0 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns 4.5 to 5.5 V 0.5 × VCC VCC ≤ 2.5 ns VOL and VOH are typical output voltage drop that occur with the output load. Fig.3 Input A to output nY propagation delays. 2003 Jul 25 8 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 VI handbook, full pagewidth S input VM GND t PLZ t PZL VCC nY output LOW-to-OFF OFF-to-LOW VM VX VOL t PZH t PHZ VOH VY nY output HIGH-to-OFF OFF-to-HIGH VM GND output enabled output disabled output enabled MNB090 INPUT VCC VM 1.65 to 1.95 V 0.5 × VCC VCC ≤ 2.0 ns 2.3 to 2.7 V 0.5 × VCC VCC ≤ 2.0 ns 2.7 V 1.5 V 2.7 V ≤ 2.5 ns 3.0 to 3.6 V 1.5 V 2.7 V ≤ 2.5 ns 4.5 to 5.5 V 0.5 × VCC VCC ≤ 2.5 ns VI tr = tf VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.15 V at VCC < 2.7 V; VY = VOH − 0.3 V at VCC ≥ 2.7 V; VY = VOH − 0.15 V at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load. Fig.4 3-state enable and disable times S to nY. 2003 Jul 25 9 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 VEXT handbook, full pagewidth VCC PULSE GENERATOR VI RL VO D.U.T. CL RT RL MNA616 VCC VEXT CL RL VCC 30 pF 1 kΩ open GND 2 × VCC 2.3 to 2.7 V VCC 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V 50 pF 500 Ω open GND 6V 3.0 to 3.6 V 2.7 V 50 pF 500 Ω open GND 6V 4.5 to 5.5 V VCC 50 pF 500 Ω open GND 2 × VCC 1.65 to 1.95 V VI tPLH/tPHL tPZH/tPHZ tPZL/tPLZ Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.5 Load circuitry for switching times. 2003 Jul 25 10 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 PACKAGE OUTLINES Plastic surface mounted package; 6 leads SOT363 D E B y X A HE 6 v M A 4 5 Q pin 1 index A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION SOT363 2003 Jul 25 REFERENCES IEC JEDEC EIAJ SC-88 11 EUROPEAN PROJECTION ISSUE DATE 97-02-28 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 Plastic surface mounted package; 6 leads SOT457 D E B y A HE 6 5 X v M A 4 Q pin 1 index A A1 c 1 2 3 Lp bp e w M B detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.1 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION SOT457 2003 Jul 25 REFERENCES IEC JEDEC EIAJ SC-74 12 EUROPEAN PROJECTION ISSUE DATE 97-02-28 01-05-04 Philips Semiconductors Product specification 1-of-2 non-inverting demultiplexer with 3-state deselected output 74LVC1G18 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Jul 25 13 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA75 © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613508/01/pp14 Date of release: 2003 Jul 25 Document order number: 9397 750 11667