FAIRCHILD 74VCXH162374

Revised March 2000
74VCXH162374
Low Voltage 16-Bit D-Type Flip-Flop with Bushold
and 26Ω Series Resistors in Outputs
General Description
Features
The VCXH162374 contains sixteen non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and output enable (OE) are common to
each byte and can be shorted together for full 16-bit operation.
The VCXH162374 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The 74VCXH162374 is also designed with 26Ω series
resistors in the outputs. This design reduces line noise in
applications such as memory address drivers, clock drivers
and bus transceivers/transmitters.
The 74VCXH162374 is designed for low voltage (1.65V to
3.6V) VCC applications with output compatibility up to 3.6V.
The 74VCXH162374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintaining low CMOS power dissipation.
■ 1.65V–3.6V VCC supply operation
■ 3.6V tolerant control inputs and outputs
■ Bushold data inputs eliminates the need for external
pull-up/pull-down resistors
■ 26Ω series resistors in outputs
■ tPD (CLK to O n)
3.4 ns max for 3.0V to 3.6V VCC
4.8 ns max for 2.3V to 2.7V VCC
9.6 ns max for 1.65V to 1.95V VCC
■ Static Drive (IOH/IOL)
±12 mA @ 3.0V VCC
±8 mA @ 2.3V VCC
±3 mA @ 1.65V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number
Package
Package Descriptions
Number
74VCXH162374MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
74VCXH162374MTX
(Note 1)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1: Use this Order Number to receive devices in Tape and Reel.
Logic Symbol
Pin Descriptions
Pin Names
© 2000 Fairchild Semiconductor Corporation
DS500226
Description
OEn
Output Enable Input (Active LOW)
CPn
Clock Pulse Input
I0–I15
Bushold Inputs
O0–O15
Outputs
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74VCXH162374 Low Voltage 16-Bit D-Type Flip-Flop with Bushold
January 2000
74VCXH162374
Connection Diagram
Truth Tables
Inputs
Outputs
OE1
I0–I7
O0–O7
L
H
H
L
L
L
L
L
X
O0
X
H
X
Z
CP1
Inputs
Outputs
OE2
I8–I15
O8–O15
L
H
H
L
L
L
L
L
X
O0
X
H
X
Z
CP2
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, control inputs may not float)
Z = High Impedance
O0 = Previous O0 before HIGH-to-LOW of CP
Functional Description
flop will store the state of their individual I inputs that meet
the setup and hold time requirements on the LOW-to-HIGH
Clock (CPn) transition. With the Output Enable (OEn) LOW,
the contents of the flip-flops are available at the outputs.
When OEn is HIGH, the outputs go to the high impedance
state. Operations of the OEn input does not affect the state
of the flip-flops.
The 74VCXH162374 consists of sixteen edge-triggered
flip-flops with individual D-type inputs and 3-STATE true
outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control
pins can be shorted together to obtain full 16-bit operation.
Each clock has a buffered clock and buffered Output
Enable common to all flip-flops within that byte. The
description which follows applies to each byte. Each flip-
Logic Diagram
Byte 1 (0:7)
Byte 2 (8:15)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Recommended Operating
Conditions (Note 4)
−0.5V to +4.6V
Supply Voltage (VCC)
DC Input Voltage (VI)
Power Supply
−0.5V to 4.6V
OEn, CPn
Operating
−0.5V to VCC to 0.5V
I0 – I15
1.65V to 3.6V
Data Retention Only
Output Voltage (VO)
1.2V to 3.6V
−0.3V to VCC
Input Voltage
−0.5V to +4.6V
Outputs 3-STATED
Outputs Active (Note 3)
Output Voltage (VO)
−0.5V to VCC +0.5V
Output in Active States
DC Input Diode Current (IIK)
0V to VCC
Output in “OFF” State
VI < 0V
−50 mA
0.0V to 3.6V
Output Current in IOH/IOL
VCC = 3.0V to 3.6V
±12 mA
VO < 0V
−50 mA
VCC = 2.3V to 2.7V
±8 mA
VO > VCC
+50 mA
VCC = 1.65V to 2.3V
DC Output Diode Current (IOK)
DC Output Source/Sink Current
±50 mA
(IOH/IOL)
−40°C to +85°C
Minimum Input Edge Rate (∆t/∆V)
VIN = 0.8V to 2.0V, VCC = 3.0V
DC VCC or GND Current per
±100 mA
Supply Pin (ICC or GND)
Storage Temperature Range (TSTG)
±3 mA
Free Air Operating Temperature (TA)
10 ns/V
Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
−65°C to +150°C
Note 3: IO Absolute Maximum Rating must be observed.
Note 4: Floating or unused control inputs must be held HIGH or LOW.
DC Electrical Characteristics (2.7V < VCC ≤ 3.6V)
Symbol
Parameter
Conditions
VCC
(V)
Min
2.0
VIH
HIGH Level Input Voltage
2.7 − 3.6
VIL
LOW Level Input Voltage
2.7 − 3.6
VOH
HIGH Level Output Voltage
VOL
II
II(HOLD)
II(OD)
IOH = −100 µA
LOW Level Output Voltage
Input Leakage Current
Bushold Input Minimum
0.8
V
V
2.7 − 3.6
VCC − 0.2
V
2.7
2.2
V
IOH = −8 mA
3.0
2.4
V
IOH = −12 mA
3.0
2.2
V
IOL = 100 µA
2.7 − 3.6
0.2
V
IOL = 6 mA
2.7
0.4
V
IOL = 8 mA
3.0
0.55
V
IOL = 12 mA
3.0
0.8
V
Control Pins
0 ≤ VI ≤ 3.6V
2.7 − 3.6
±5.0
µA
Data Pins
VI = V CC or GND
2.7 − 3.6
±5.0
µA
VIN = 0.8V
3.0
75
Drive Hold Current
VIN = 2.0V
3.0
−75
Bushold Input Over-Drive
(Note 5)
3.6
450
3.6
−450
Current to Change State
(Note 6)
3-STATE Output Leakage
0 ≤ VO ≤ 3.6V
IOFF
Power-OFF Leakage Current
0 ≤ (VO) ≤ 3.6V
ICC
Quiescent Supply Current
VI = V IH or VIL
Increase in ICC per Input
Units
IOH = −6 mA
IOZ
∆ICC
Max
µA
µA
2.7 − 3.6
±10
µA
0
10
µA
VI = V CC or GND
2.7 − 3.6
20
µA
VCC ≤ (VO) ≤ 3.6V (Note 7)
2.7 − 3.6
±20
µA
VIH = VCC −0.6V
2.7 − 3.6
750
µA
Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 7: Outputs disabled or 3-STATE only.
3
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74VCXH162374
Absolute Maximum Ratings(Note 2)
74VCXH162374
DC Electrical Characteristics (2.3V ≤ VCC ≤ 2.7V)
Symbol
Parameter
Conditions
V CC
(V)
Min
1.6
VIH
HIGH Level Input Voltage
2.3 − 2.7
VIL
LOW Level Input Voltage
2.3 − 2.7
VOH
HIGH Level Output Voltage
VOL
IOH = −100 µA
LOW Level Output Voltage
Control Pins
V
V
VCC − 0.2
V
2.3
2.0
V
IOH = −6 mA
2.3
1.8
V
IOH = −8 mA
2.3
1.7
IOL = 100 µA
2.3 − 2.7
0.2
V
IOL = 6 mA
2.3
0.4
V
IOL = 8 mA
2.3
0.6
V
0 ≤ VI ≤ 3.6V
2.3 − 2.7
±5.0
µA
VI = VCC or GND
2.3 − 2.7
±5.0
µA
II(HOLD)
Bushold Input Minimum
VIN = 0.7V
2.3
45
Drive Hold Current
VIN = 1.6V
2.3
−45
IOZ
0.7
2.3 − 2.7
Input Leakage Current
II(OD)
Units
IOH = −4 mA
II
Data Pins
Max
Bushold Input Over-Drive
(Note 8)
2.7
300
Current to Change State
(Note 9)
2.7
−300
3-STATE Output Leakage
0 ≤ VO ≤ 3.6V
VI = VIH or VIL
2.3 − 2.7
V
µA
µA
±10
µA
IOFF
Power-OFF Leakage Current
0 ≤ (VO) ≤ 3.6V
0
10
µA
ICC
Quiescent Supply Current
VI = VCC or GND
2.3 − 2.7
20
µA
VCC ≤ (VO) ≤ 3.6V (Note 10)
2.3 − 2.7
±20
µA
Max
Units
Note 8: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 9: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 10: Outputs disabled or 3-STATE only.
DC Electrical Characteristics (1.65V ≤ VCC < 2.3V)
Symbol
Parameter
Conditions
VCC
(V)
Min
0.65 × VCC
VIH
HIGH Level Input Voltage
1.65 - 2.3
VIL
LOW Level Input Voltage
1.65 - 2.3
VOH
HIGH Level Output Voltage
IOH = −100 µA
VOL
LOW Level Output Voltage
II(HOLD)
II(OD)
IOZ
Input Leakage Current
V
1.65 - 2.3
VCC − 0.2
IOH = −3 mA
1.65
1.25
IOL = 100 µA
1.65 - 2.3
0.2
V
1.65
0.3
V
IOL = 3 mA
II
V
0.35 × VCC
V
V
Control Pins
0 ≤ VI ≤ 3.6V
1.65 - 2.3
±5.0
µA
Data Pins
VI = VCC or GND
1.65 - 2.3
±5.0
µA
Bushold Input Minimum
VIN = 0.57V
1.65
25
Drive Hold Current
VIN = 1.07V
1.65
−25
Bushold Input Over-Drive
(Note 11)
1.95
200
Current to Change State
(Note 12)
1.95
−200
3-STATE Output Leakage
0 ≤ VO ≤ 3.6V
VI = VIH or VIL
µA
µA
1.65 - 2.3
±10
µA
IOFF
Power-OFF Leakage Current
0 ≤ (VO) ≤ 3.6V
0
10
µA
ICC
Quiescent Supply Current
VI = VCC or GND
1.65 - 2.3
20
µA
VCC ≤ (VO) ≤ 3.6V (Note 13)
1.65 - 2.3
±20
µA
Note 11: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 12: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 13: Outputs disabled or 3-STATE only.
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4
(Note 14)
TA = −40°C to +85°C, CL = 30 pF, RL = 500Ω
Symbol
Parameter
VCC = 3.3V ± 0.3V
Min
VCC = 2.5V ± 0.2V
Max
Min
Max
Min
Units
Max
fMAX
Maximum Clock Frequency
250
tPHL, tPLH
Prop Delay CP to On
0.8
3.4
1.0
4.8
1.5
9.6
ns
tPZL, tPZH
Output Enable Time
0.8
3.9
1.0
5.4
1.5
9.8
ns
tPLZ, tPHZ
Output Disable Time
0.8
4.0
1.0
4.4
1.5
7.9
tS
Setup Time
1.5
tH
Hold Time
1.0
1.0
1.0
ns
tW
Pulse Width
1.5
1.5
4.0
ns
tOSHL
Output to Output Skew
(Note 15)
tOSLH
200
VCC = 1.8V ± 0.15V
100
1.5
0.5
MHz
2.5
0.5
ns
ns
0.75
ns
Note 14: For CL = 50PF, add approximately 300 ps to the AC maximum specification.
Note 15: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol
VOLP
VOLV
VOHV
Parameter
Quiet Output Dynamic Peak VOL
Quiet Output Dynamic Valley VOL
Quiet Output Dynamic Valley VOH
Conditions
CL = 30 pF, VIH = VCC, VIL = 0V
CL = 30 pF, VIH = VCC, VIL = 0V
CL = 30 pF, VIH = VCC, VIL = 0V
V CC
(V)
TA = +25°C
Typical
1.8
0.15
2.5
0.25
3.3
0.35
1.8
−0.15
2.5
−0.25
3.3
−0.35
1.8
1.55
2.5
2.05
3.3
2.65
Units
V
V
V
Capacitance
Symbol
Parameter
Conditions
TA = +25°C
Typical
Units
CIN
Input Capacitance
VCC = 1.8V, 2.5V or 3.3V, VI = 0V or VCC
6
pF
COUT
Output Capacitance
VI = 0V or VCC, VCC = 1.8V, 2.5V or 3.3V
7
pF
CPD
Power Dissipation Capacitance
20
pF
VI = 0V or VCC, f = 10 MHz,
VCC = 1.8V, 2.5V or 3.3V
5
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74VCXH162374
AC Electrical Characteristics
74VCXH162374
AC Loading and Waveforms
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V;
VCC x 2 at VCC = 2.5 ± 0.2V; 1.8V ± 0.15V
tPZH, tPHZ
GND
FIGURE 1. AC Test Circuit
FIGURE 3. 3-STATE Output High Enable and
Disable Times for Low Voltage Logic
FIGURE 2. Waveform for Inverting and
Non-Inverting Functions
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
FIGURE 6. Setup Time, Hold Time and
Recovery Time for Low Voltage Logic
FIGURE 5. Propagation Delay, Pulse Width and
tREC Waveforms
Symbol
VCC
3.3V ± 0.3V
2.5V ± 0.2V
1.8V ± 0.15V
Vmi
1.5V
VCC/2
VCC/2
Vmo
1.5V
VCC/2
VCC/2
VX
VOL +0.3V
VOL +0.15V
VOL +0.15V
VY
VOH −0.3V
VOH −0.15V
VOH −0.15V
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74VCXH162374 Low Voltage 16-Bit D-Type Flip-Flop with Bushold
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Body Width
Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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