32-Position Manual Up/Down Control Potentiometer AD5228 FUNCTIONAL BLOCK DIAGRAM FEATURES 32-position digital potentiometer 10 kΩ, 50 kΩ, 100 kΩ end-to-end terminal resistance Simple manual up/down control Self-contained, requires only 2 pushbutton tactile switches Built-in adaptive debouncer Discrete step-up/step-down control Autoscan up/down control with 4 steps per second Pin-selectable zero-scale/midscale preset Low potentiometer mode tempco, 5 ppm/°C Low rheostat mode tempco, 35 ppm/°C Digital control compatible Ultralow power, IDD = 0.4 µA typ and 3 µA max Low operating voltage, 2.7 V to 5.5 V Automotive temperature range, −40°C to +105°C Compact thin SOT-23-8 (2.9 mm × 3 mm) Pb-free package APPLICATIONS Mechanical potentiometer and trimmer replacements LCD backlight, contrast, and brightness controls Digital volume control Portable device-level adjustments Electronic front panel-level controls Programmable power supply GENERAL DESCRIPTION The AD5228 is Analog Devices’ latest 32-step-up/step-down control digital potentiometer emulating mechanical potentiometer operation1. Its simple up/down control interface allows manual control with just two external pushbutton tactile switches. The AD5228 is designed with a built-in adaptive debouncer that ignores invalid bounces due to contact bounce commonly found in mechanical switches. The debouncer is adaptive, accommodating a variety of pushbutton tactile switches that generally have less than 10 ms of bounce time during contact closures. When choosing the switch, the user should consult the timing specification of the switch to ensure its suitability in an AD5228 application. D E C O D E UP/DOWN CONTROL LOGIC VDD R1 R2 AD5228 A W DISCRETE STEP/AUTO SCAN DETECT B PUSH-UP BUTTON PD ADAPTIVE DEBOUNCER ZERO- OR MIDSCALE PRESET PUSH-DOWN BUTTON PRE 04422-0-001 PU GND Figure 1. The AD5228 can increment or decrement the resistance in discrete steps or in autoscan mode. When the PU or PD button is pressed briefly (no longer than 0.6 s), the resistance of the AD5228 changes by one step. When the PU or PD button is held continuously for more than a second, the device activates the autoscan mode and changes four resistance steps per second. The AD5228 can also be controlled digitally; its up/down features simplify microcontroller usage. The AD5228 is available in a compact thin SOT-23-8 (TSOT-8) package. The part is guaranteed to operate over the automotive temperature range of −40°C to +105°C. The AD5228’s simple interface, small footprint, and very low cost enable it to replace mechanical potentiometers and trimmers with typically 3× improved resolution, solid-state reliability, and faster adjustment, resulting in considerable cost saving in end users’ systems. Users who consider EEMEM potentiometers should refer to the recommendations in the Applications section. Table 1. Truth Table PU PD Operation1 0 0 1 1 0 1 0 1 RWB Decrement RWB Increment RWB Decrement RWB Does Not Change 1 RWA increments if RWB decrements and vice versa. 1 The terms digital potentiometer and RDAC are used interchangeably. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. AD5228 TABLE OF CONTENTS Electrical Characteristics ................................................................. 3 Power-Up and Power-Down Sequences.................................. 14 Interface Timing Diagrams ......................................................... 4 Layout and Power Supply Biasing ............................................ 14 Absolute Maximum Ratings............................................................ 5 Applications..................................................................................... 15 ESD Caution.................................................................................. 5 Manual Adjustable LED Driver ................................................ 15 Pin Configuration and Function Descriptions............................. 6 Adjustable Current Source for LED Driver ............................ 15 Typical Performance Characteristics ............................................. 7 Automatic LCD Panel Backlight Control................................ 16 Theory of Operation ...................................................................... 11 Audio Amplifier with Volume Control ................................... 16 Programming the Digital Potentiometers............................... 12 Constant Bias with Supply to Retain Resistance Setting...... 17 Controlling Inputs ...................................................................... 13 Outline Dimensions ....................................................................... 18 Terminal Voltage Operation Range.......................................... 13 Ordering Guide .......................................................................... 18 REVISION HISTORY Revision 0: Initial Version Rev. 0 | Page 2 of 20 AD5228 ELECTRICAL CHARACTERISTICS 10 kΩ, 50 kΩ, 100 kΩ versions: VDD = 3 V ± 10% or 5 V ± 10%, VA = VDD, VB = 0 V, −40°C < TA < +105°C, unless otherwise noted. Table 2. Parameter Symbol Conditions Min Typ1 Max Unit DC CHARACTERISTICS, RHEOSTAT MODE Resistor Differential Nonlinearity2 R-DNL RWB, A terminal = no connect −0.5 ±0.05 +0.5 LSB Resistor Integral Nonlinearity2 R-INL RWB, A terminal = no connect −0.5 ±0.1 +0.5 LSB +20 % Nominal Resistor Tolerance 3 ∆RAB/RAB −20 4 Resistance Temperature Coefficient (∆RAB/RAB) × 10 /∆T Wiper Resistance RW 35 VDD = 2.7 V 100 VDD = 5.5 V 50 ppm/°C 200 Ω Ω DC CHARACTERISTICS, POTENTIOMETER DIVIDER MODE (Specifications apply to all RDACs) Resolution N Integral Nonlinearity3 INL Differential Nonlinearity3, 5 DNL Voltage Divider Temperature Coefficient 4 (∆VW/VW) × 10 /∆T 5 Bits −0.5 ±0.05 +0.5 LSB −0.5 ±0.05 +0.5 LSB Midscale 5 ppm/°C Full-Scale Error VWFSE ≥+15 steps from midscale −1 −0.5 0 LSB Zero-Scale Error VWZSE ≤−16 steps from midscale 0 0.3 0.5 LSB VA, B, W With respect to GND 0 VDD V RESISTOR TERMINALS Voltage Range6 4 Capacitance A, B CA, B f = 1 MHz, measured to GND 140 pF Capacitance4 W CW f = 1 MHz, measured to GND 150 pF Common-Mode Leakage ICM V A = VB = V W 1 nA Input High VIH VDD = 5 V 2.4 5.5 V Input Low VIL VDD = 5 V 0 0.8 V Input Current II VIN = 0 V or 5 V ±1 µA Input Capacitance4 CI PU, PD INPUTS 5 pF POWER SUPPLIES Power Supply Range VDD Supply Standby Current Supply Active Current 7 VDD = 5 V, PU = PD = VDD IDD_STBY IDD_ACT VDD = 5 V, PU or PD = 0 V Power Dissipation PDISS VDD = 5 V Power Supply Sensitivity PSSR VDD = 5 V ± 10% 7, 8 Footnotes on next page. Rev. 0 | Page 3 of 20 2.7 5.5 V 0.4 3 µA 50 110 µA 17 µW 0.01 0.05 %/% AD5228 Parameter Symbol DYNAMIC CHARACTERISTICS 4, 9, 10, 11 Built-in Debounce and Settling Time 12 PU Low Pulse Width PD Low Pulse Width PU High Repetitive Pulse Width PD High Repetitive Pulse Width Autoscan Start Time Autoscan Time Bandwidth –3 dB Total Harmonic Distortion tDB tPU tPD tPU_REP tPD_REP tAS_START tAS BW_10 BW_50 BW_100 THD Resistor Noise Voltage eN_WB Conditions Min 6 12 12 1 1 0.6 0.16 PU or PD = 0 V PU or PD = 0 V RAB = 10 kΩ, midscale RAB = 50 kΩ, midscale RAB = 100 kΩ, midscale VA = 1 V rms, RAB = 10 kΩ, VB = 0 V dc, f = 1 kHz RWB = 5 kΩ, f = 1 kHz Typ1 0.8 0.25 460 100 50 0.05 Max 1.2 0.38 14 Unit ms ms ms µs µs s s kHz kHz kHz % nV/√Hz 1 Typicals represent average readings at 25°C, VDD = 5 V. Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. 3 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V. 4 Guaranteed by design and not subject to production test. 5 DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions. 6 Resistor Terminals A, B, and W have no limitations on polarity with respect to each other. 7 PU and PD have 100 kΩ internal pull-up resistors, IDD_ACT = VDD/100 kΩ + IOSC (internal oscillator operating current) when PU or PD is connected to ground. 8 PDISS is calculated based on IDD_STBY × VDD only. IDD_ACT duration should be short. Users should not hold PU or PD pin to ground longer than necessary to elevate power dissipation. 9 Bandwidth, noise, and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest bandwidth. The highest R value results in the minimum overall power consumption. 10 All dynamic characteristics use VDD = 5 V. 11 Note that all input control voltages are specified with tR = tF = 1 ns (10% to 90% of VDD) and timed from a voltage level of 1.6 V. Switching characteristics are measured using VDD = 5 V. 12 The debouncer keeps monitoring the logic-low level once PU is connected to ground. Once the signal lasts longer than 11 ms, the debouncer assumes the last bounce is met and allows the AD5228 to increment by one step. If the PU signal remains at low and reaches tAS_START, the AD5528 increments again, see Figure 7. Similar characteristics apply to PD operation. 2 INTERFACE TIMING DIAGRAMS tPD tPU_REP PU tDB RWB tPD_REP tDB 04422-0-006 04422-0-004 tPU PU RWB Figure 2. Increment RWB in Discrete Steps Figure 4. Decrement RWB in Discrete Steps PD RWB tAS tDB tAS_START tDB tAS RWB Figure 5. Decrement RWB in Autoscan Mode Figure 3. Increment RWB in Autoscan Mode Rev. 0 | Page 4 of 20 04422-0-007 tAS_START 04422-0-005 PU AD5228 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter VDD to GND VA, VB, VW to GND PU, PD, PRE Voltage to GND Maximum Current IWB, IWA Pulsed IWB Continuous (RWB ≤ 5 kΩ, A open)1 IWA Continuous (RWA ≤ 5 kΩ, B open)1 IAB Continuous (RAB = 10 kΩ/50 kΩ/100 kΩ)1 Operating Temperature Range Maximum Junction Temperature (TJmax) Storage Temperature Lead Temperature (Soldering, 10 s – 30 s) Thermal Resistance2 θJA Rating −0.3 V, +7 V 0 V, VDD 0 V, VDD ±20 mA ±1 mA ±1 mA ±500 µA/±100 µA/ ±50 µA −40°C to +105°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. −65°C to +150°C 245°C 230°C/W 1 Maximum terminal current is bounded by the maximum applied voltage across any two of the A, B, and W terminals at a given resistance, the maximum current handling of the switches, and the maximum power dissipation of the package. VDD = 5 V. 2 Package power dissipation = (TJmax – TA) / θJA. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 5 of 20 AD5228 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 8 VDD PD 2 7 PRE 6 B 5 W A 3 GND 4 AD5228 04422-0-003 PU 1 Figure 6. SOT-23-8 Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 Mnemonic PU 2 PD 3 4 5 6 7 A GND W B PRE 8 VDD Description Push-Up Pin. Connect to the external pushbutton. Active low. A 100 kΩ pull-up resistor is connected to VDD. Push-Down Pin. Connect to the external pushbutton. Active low. A 100 kΩ pull-up resistor is connected to VDD. Resistor Terminal A. GND ≤VA ≤ VDD. Common Ground. Wiper Terminal W. GND ≤ VW ≤ VDD. Resistor Terminal B. GND ≤ VB ≤ VDD. Power-On Preset. Output = midscale if PRE = GND; output = zero scale if PRE = VDD. Do not let the PRE pin float. No pull-up resistor is needed. Positive Power Supply, 2.7 V to 5.5 V. Rev. 0 | Page 6 of 20 AD5228 TYPICAL PERFORMANCE CHARACTERISTICS 0.10 0.10 TA = 25°C 0.08 2.7V 0.02 0 –0.02 –0.04 –0.06 –0.08 0 4 8 12 16 20 CODE (Decimal) 24 28 0.06 VDD = 5.5V 0.04 0.02 0 –0.02 –0.04 –0.06 –0.08 –0.10 32 0.10 4 8 12 16 20 CODE (Decimal) 24 TA = 25°C 0.04 0.02 0 –0.02 –0.04 04422-0-009 –0.06 0 4 8 12 16 20 CODE (Decimal) 24 28 0.06 2.7V 0.04 0.02 5.5V 0 –0.02 –0.04 –0.06 04422-0-012 VDD = 5.5V –0.08 –0.08 –0.10 32 0 Figure 8. R-INL vs. Code vs. Temperature, VDD = 5 V 4 8 12 16 20 CODE (Decimal) 24 28 32 Figure 11. INL vs. Code vs. Supply Voltages 0.10 0.10 –40°C +25°C +85°C +105°C VDD = 5.5V TA = 25°C 0.08 0.04 2.7V 5.5V 0.02 0 –0.02 –0.04 04422-0-010 –0.06 –0.08 0 4 8 12 16 20 CODE (Decimal) 24 28 32 0.06 0.04 0.02 0 –0.02 –0.04 –0.06 04422-0-013 0.06 POTENTIOMETER MODE INL (LSB) 0.08 RHEOSTAT MODE DNL (LSB) 32 0.08 POTENTIOMETER MODE INL (LSB) 0.06 –0.10 28 0.10 –40°C +25°C +85°C +105°C 0.08 RHEOSTAT MODE INL (LSB) 0 Figure 10. R-DNL vs. Code vs. Temperature, VDD = 5 V Figure 7. R-INL vs. Code vs. Supply Voltages –0.10 04422-0-011 RHEOSTAT MODE DNL (LSB) 5.5V 0.04 04422-0-008 RHEOSTAT MODE INL (LSB) 0.06 –0.10 –40°C +25°C +85°C +105°C 0.08 –0.08 –0.10 0 4 8 12 16 20 CODE (Decimal) 24 Figure 12. INL vs. Code, VDD = 5 V Figure 9. R-DNL vs. Code vs. Supply Voltages Rev. 0 | Page 7 of 20 28 32 AD5228 0.50 0.10 0.08 0.45 0.06 0.40 0.04 ZSE (LSB) 0.02 0 –0.02 0.30 0.25 VDD = 5.5V 0.20 0.15 –0.04 2.7V –0.08 0 4 8 12 16 20 CODE (Decimal) 24 28 0.05 0 –40 32 Figure 13. DNL vs. Code vs. Supply Voltages 0 80 100 0.02 0 –0.02 –0.04 04422-0-015 –0.06 4 8 12 16 20 CODE (Decimal) 24 28 0.1 –40 32 Figure 14. DNL vs. Code, VDD = 5 V –20 0 80 100 Figure 17. Supply Current vs. Temperature 120 –0.50 RAB = 100kΩ NOMINAL RESISTANCE RAB (kΩ) –0.55 –0.60 –0.65 VDD = 5.5V –0.70 –0.75 VDD = 2.7V 04422-0-016 –0.80 –0.85 –0.90 –40 20 40 60 TEMPERATURE (°C) –20 0 20 40 60 TEMPERATURE (°C) 80 80 60 Figure 15. Full-Scale Error vs. Temperature RAB = 50kΩ 40 20 0 –40 100 VDD = 5.5V 100 04422-0-019 0 04422-0-018 VDD = 5.5V 0.04 SUPPLY STANDBY CURRENT (µA) 0.06 VDD = 5.5V IDD_ACT = 50µA TYP –0.08 FSE (LSB) 20 40 60 TEMPERATURE (°C) 1 –40°C +25°C +85°C +105°C 0.08 POTENTIOMETER MODE DNL (LSB) –20 Figure 16. Zero-Scale Error vs. Temperature 0.10 –0.10 04422-0-017 0.10 –0.06 –0.10 VDD = 2.7V 0.35 5.5V 04422-0-014 POTENTIOMETER MODE DNL (LSB) TA = 25°C RAB = 10kΩ –20 0 20 40 60 TEMPERATURE (°C) 80 Figure 18. Nominal Resistance vs. Temperature Rev. 0 | Page 8 of 20 100 AD5228 120 6 REF LEVEL 0dB /DIV 6.0dB MARKER 469 390.941Hz MAG (A/R) –8.966dB TA = 25°C VDD = 5.5V VA = 50mV rms VDD = 2.7V 0 16 STEPS –6 8 STEPS 80 –12 4 STEPS GAIN (dB) 60 VDD = 5.5V 40 –18 2 STEPS –24 1 STEP –30 –36 0 –40 04422-0-020 20 –20 0 20 40 60 TEMPERATURE (°C) 80 –42 04422-0-050 WIPER RESISTANCE, RW (Ω) 100 –48 100 –54 1k 10k Figure 19. Wiper Resistance vs. Temperature 10kΩ 50kΩ 100kΩ VDD = 5.5V A = OPEN 120 STOP 1 000 000.000Hz Figure 22. Gain vs. Frequency vs. Code, RAB = 10 kΩ 6 REF LEVEL 0dB /DIV 6.0dB MARKER 97 525.233Hz MAG (A/R) –9.089dB TA = 25°C VDD = 5.5V VA = 50mV rms 0 16 STEPS –6 90 8 STEPS GAIN (dB) –12 60 30 4 STEPS –18 2 STEPS –24 1 STEP –30 –36 –30 0 4 8 12 16 20 CODE (Decimal) 24 28 –42 04422-0-051 0 04422-0-021 RHEOSTAT MODE TEMPCO, ∆RWB/∆T (ppm/°C) 150 –48 32 –54 1k 10k Figure 20. Rheostat Mode Tempco ∆RWB/∆T vs. Code 20 10 STOP 1 000 000.000Hz Figure 23. Gain vs. Frequency vs. Code, RAB = 50 kΩ 6 10kΩ 50kΩ 100kΩ VDD = VA = 5.5V VB = 0V 15 REF LEVEL 0dB /DIV 6.0dB MARKER 51 404.427Hz MAG (A/R) –9.123dB TA = 25°C VDD = 5.5V VA = 50mV rms 0 16 STEPS –6 8 STEPS –12 GAIN (dB) 5 0 –5 4 STEPS –18 2 STEPS –24 1 STEP –30 –36 –10 0 4 8 12 16 20 CODE (Decimal) 24 28 04422-0-052 –42 04422-0-022 –15 –20 1M 100k START 1 000.000Hz POTENTIOMETER MODE TEMPCO, ∆VWB/∆T (ppm/°C) 1M 100k START 1 000.000Hz –48 –54 1k 32 START 1 000.000Hz Figure 21. Potentiometer Mode Tempco ∆VWB/∆T vs. Code 10k 1M 100k STOP 1 000 000.000Hz Figure 24. Gain vs. Frequency vs. Code, RAB = 100 kΩ Rev. 0 | Page 9 of 20 AD5228 0 STEP = MIDSCALE, VA = VDD, VB = 0V PU 1 PSRR (dB) –20 VDD = 5V DC ±10% p-p AC VW VDD = 3V DC ±10% p-p AC –40 1k 10k FREQUENCY (Hz) 100k 04422-0-029 04422-0-026 –60 100 VDD = 5V VA = 5V VB = 0V 2 CH1 5.00V 1M CH2 200mV M2.00ms A CH1 T 800.000ms Figure 28. Autoscan Increment Figure 25. PSRR 1.2 ∆: 8.32ms ∆: 4.00mV VA = OPEN TA = 25°C @: 8.24ms @: 378mV 1.0 2 CH2 100mV M2.00ms A CH1 T 3.92000ms PU VW VDD = 5V VA = 5V VB = 0V 04422-0-028 CH2 100mV RAB = 100kΩ 0 4 8 12 16 20 CODE (Decimal) 24 Figure 29. Maximum IWB vs. Code 1 CH1 5.00V RAB = 50kΩ 0.4 0 3.00V Figure 26. Basic Increment 2 0.6 0.2 04422-0-027 VDD = 5V VA = 5V VB = 0V RAB = 10kΩ 0.8 04422-0-030 VW THEORETICAL IWB_MAX (mA) PU 1 CH1 5.00V 2.80V M2.00ms A CH1 T 59.8000ms 2.60V Figure 27. Repetitive Increment Rev. 0 | Page 10 of 20 28 32 AD5228 THEORY OF OPERATION The AD5228 is a 32-position manual up/down digitally controlled potentiometer with selectable power-on preset. The AD5228 presets to midscale when the PRE pin is tied to ground and to zero-scale when PRE is tied to VDD. Floating the PRE pin is not allowed. The step-up and step-down operations require the activation of the PU (push-up) and PD (push-down) pins. These pins have 100 kΩ internal pull-up resistors that the PU and PD activate at logic low. The common practice is to apply external pushbuttons (tactile switches) as shown in Figure 30. R1 R2 D E C O D E 04422-0-033 UP/DOWN CONTROL LOGIC VDD 1 AD5228 CH1 1.00V A A CH1 2.38V Figure 32. Close-Up of Initial Bounces W DISCRETE STEP/AUTO SCAN DETECT M100µs T 20.20% B PUSH-UP BUTTON PU ADAPTIVE DEBOUNCER ZERO- OR MIDSCALE PRESET 04422-0-031 PD PUSH-DOWN BUTTON PRE GND Figure 30. Typical Pushbutton Interface 1 04422-0-034 Because of the bounce mechanism commonly found in the switches during contact closures, a single pushbutton press usually generates numerous bounces during contact closure. Note that the term pushbutton refers specifically to a pushbutton tactile switch or a similar switch that has 10 ms or less bounce time during contact closure. Figure 31 shows the characteristics of one such switch, the KRS-3550 tactile switch. Figure 32 and Figure 33 show close ups of the initial bounces and end bounces, respectively. CH1 1.00V M10.0µs T 20.20% A CH1 2.38V Figure 33. Close-Up of Final Bounces The following paragraphs describes the PU incrementing operation. Similar characteristics apply to the PD decrementing operation. The AD5228 features an adaptive debouncer that monitors the duration of the logic-low level of PU signal between bounces. If the PU logic-low level signal duration is shorter than 7 ms, the debouncer ignores it as an invalid incrementing command. Whenever the logic-low level of PU signal lasts longer than 11 ms, the debouncer assumes that the last bounce is met and therefore increments RWB by one step. 04422-0-032 1 CH1 1.00V M40.0ms T 20.40% A CH1 Figure 31. Typical Tactile Switch Characteristics 2.38V Repeatedly pressing the PU button for fast adjustment without missing steps is allowed, provided that each press is not shorter than tPU, which is 12 ms (see Figure 2). As a point of reference, an advanced video game player can press a pushbutton switch in 40 ms. Rev. 0 | Page 11 of 20 AD5228 If the PU button is held for longer than 1 second, continuously holding it activates autoscan mode such that the AD5228 increments by four RWB steps per second (see Figure 3). Whenever the maximum RWB (= RAB) is reached, RWB stops incrementing regardless of the state of the PU pin. Any continuous holding of the PU pin to logic-low simply elevates the supply current. The end-to-end resistance, RAB, has 32 contact points accessed by the wiper terminal, plus the B terminal contact if RWB is used. Pushing the PU pin discretely increments RWB by one step. The total resistance becomes RS + RW as shown in Figure 34. The change of RWB can be determined by the number of discrete PU executions provided that its maximum setting is not reached during operation. ∆RWB can, therefore, be approximated as When both PU and PD buttons are pressed, RWB decrements until it stops at zero scale. All the preceding descriptions apply to PD operation. Due to the tolerance of the internal RC oscillator, all the timing information given previously is based on the typical values, which can vary ±30%. The AD5228 debouncer is carefully designed to handle common pushbutton tactile switches. Other switches that have excessive bounces and duration are not suitable to use in conjunction with the AD5228. RS RS RS RS = RAB/32 PROGRAMMING THE DIGITAL POTENTIOMETERS Rheostat Operation If only the W-to-B or W-to-A terminals are used as variable resistors, the unused terminal can be opened or shorted with W. Such operation is called rheostat mode and is shown in Figure 35. W B A W B W B 04422-0-036 A ) 3) ( ) (4) R ⎛ ⎞ ∆RWA = +⎜ 32 − PD AB + RW ⎟ 32 ⎝ ⎠ Figure 34. AD5228 Equivalent RDAC Circuit A ( R ⎛ ⎞ ∆RWA = −⎜ 32 − PU AB + RW ⎟ 32 ⎝ ⎠ 04422-0-035 B (2) PU is the number of push-up executions. PD is the number of push-down executions. RAB is the end-to-end resistance. RW is the wiper resistance contributed by the on-resistance of the internal switch. W RS R ⎛ ⎞ ∆RWB = −⎜ PD AB + RW ⎟ 32 ⎝ ⎠ where: RW RDAC UP/DOWN CTRL AND DECODE (1) Similar to the mechanical potentiometer, the resistance of the RDAC between the Wiper W and Terminal A also produces a complementary resistance, RWA. When these terminals are used, the B terminal can be opened or shorted to W. RWA can also be approximated if its maximum and minimum settings are not reached. A D0 D1 D2 D3 D4 R ⎛ ⎞ ∆RWB = +⎜ PU AB + RW ⎟ 32 ⎝ ⎠ Note that Equations 1 to 4 do not apply when PU and PD = 0 execution. Because in the lowest end of the resistor string, a finite wiper resistance is present, care should be taken to limit the current flow between W and B in this state to a maximum pulse current of no more than 20 mA. Otherwise, degradation or possible destruction of the internal switches can occur. The typical distribution of the resistance tolerance from device to device is process lot dependent, and ±20% tolerance is possible. Figure 35. Rheostat Mode Configuration Rev. 0 | Page 12 of 20 AD5228 Potentiometer Mode Operation CONTROLLING INPUTS If all three terminals are used, the operation is called potentiometer mode. The most common configuration is the voltage divider operation as shown in Figure 36. All PU and PD inputs are protected with a Zener ESD structure as shown in Figure 37. VDD VI A Figure 36. Potentiometer Mode Configuration Figure 37. Equivalent ESD Protection in PU and PD Pins The change of VWB is known provided that the AD5228 maximum or minimum scale has not been reached during operation. If the effect of wiper resistance is ignored, the transfer functions can be simplified as ∆VWB PU VA 32 PD =+ VA 32 (5) (6) R1 Unlike in rheostat mode operation where the absolute tolerance is high, potentiometer mode operation yields an almost ratiometric function of PU/32 or PD/32 with a relatively small error contributed by the RW term. The tolerance effect is, therefore, almost canceled. Although the thin film step resistor RS and CMOS switch resistance, RW, have very different temperature coefficients, the ratiometric adjustment also reduces the overall temperature coefficient effect to 5 ppm/°C except at low value codes where RW dominates. Potentiometer mode operations include an op amp input and feedback resistors network and other voltage scaling applications. The A, W, and B terminals can be input or output terminals and have no polarity constraint provided that |VAB|, |VWA|, and |VWB| do not exceed VDD-to-GND. D E C O D E UP/DOWN CONTROL LOGIC VDD R2 AD5228 A W DISCRETE STEP/AUTO SCAN DETECT B PU N1 UP 2N7002 PD ADAPTIVE DEBOUNCER ZERO- OR MIDSCALE PRESET N2 DOWN PRE GND 2N7002 Figure 38. Digital Control with External MOSFETs TERMINAL VOLTAGE OPERATION RANGE The AD5228 is designed with internal ESD diodes for protection. These diodes also set the voltage boundary of the terminal operating voltages. Positive signals present on Terminal A, B, or W that exceed VDD are clamped by the forward-biased diode. There is no polarity constraint between VA, VW, and VB, but they cannot be higher than VDD or lower than GND. VDD A W B GND Figure 39. Maximum Terminal Voltages Set by VDD and GND Rev. 0 | Page 13 of 20 04422-0-039 ∆VWB = + PU and PD pins are usually connected to pushbutton tactile switches for manual operation, but the AD5228 can also be controlled digitally. It is recommended to add external MOSFETs or transistors that simplify the logic controls. 04422-0-040 B DECODE AND DEBOUNCE CKT PU 04422-0-037 W 04422-0-038 100kΩ VC AD5228 POWER-UP AND POWER-DOWN SEQUENCES LAYOUT AND POWER SUPPLY BIASING Because of the ESD protection diodes that limit the voltage compliance at Terminals A, B, and W (Figure 39), it is important to power on VDD before applying any voltage to Terminals A, B, and W. Otherwise, the diodes are forward-biased such that VDD is powered on unintentionally and can affect other parts of the circuit. Similarly, VDD should be powered down last. The ideal power-on sequence is in the following order: GND, VDD, and VA/B/W. The order of powering VA, VB, and VW is not important as long as they are powered on after VDD. The states of the PU and PD pins can be logic high or floating, but they should not be logic low during power-on. It is always a good practice to use compact, minimum lead length layout design. The leads to the input should be as direct as possible with a minimum conductor length. Ground paths should have low resistance and low inductance. It is also good practice to bypass the power supplies with quality capacitors. Low ESR (equivalent series resistance) 1 µF to 10 µF tantalum or electrolytic capacitors should be applied at the supplies to minimize any transient disturbance and to filter low frequency ripple. Figure 39 illustrates the basic supply bypassing configuration for the AD5228. AD5228 VDD + C2 10µF C1 0.1µF VDD 04422-0-041 GND Figure 40. Power Supply Bypassing Rev. 0 | Page 14 of 20 AD5228 APPLICATIONS MANUAL ADJUSTABLE LED DRIVER ADJUSTABLE HIGH POWER LED DRIVER The AD5228 can be used in many electronics-level adjustments such as LED drivers for LCD panel backlight controls. Figure 41 shows a manually adjustable LED driver. The AD5228 sets the voltage across the white LED D1 for the brightness control. Since U2 handles up to 250 mA, a typical white LED with VF of 3.5 V requires a resistor, R1, to limit U2 current. This circuit is simple but not power efficient. The U2 shutdown pin can be toggled with a PWM signal to conserve power. 5V C2 0.1µF VDD PD – U2 R1 SD 6Ω + PWM GND Figure 41. Low Cost Adjustable LED Driver ADJUSTABLE CURRENT SOURCE FOR LED DRIVER Because LED brightness is a function of current rather than of forward voltage, an adjustable current source is preferred as shown in Figure 42. The load current can be found as the VWB of the AD5228 divided by RSET. I D1 = (8) RSET RSET should be small enough to conserve power but large enough to limit maximum LED current. R3 should also be used in parallel with AD5228 to limit the LED current within an achievable range. A wider current adjustment range is possible by lowering the R2 to R1 ratio as well as changing R3 accordingly. WHITE LED D1 V– B PRE VRSET AD8591 W 10kΩ PU PUSH-DOWN BUTTON A I LED = V+ U1 AD5228 PUSH-UP BUTTON C3 0.1µF 04422-0-042 C1 1µF 5V The previous circuit works well for a single LED. Figure 43 shows a circuit that can drive three to four high power LEDs. The ADP1610 is an adjustable boost regulator that provides the voltage headroom and current for the LEDs. The AD5228 and the op amp form an average gain of 12 feedback network that servos the RSET voltage and the ADP1610 FB pin 1.2 V band gap reference voltage. As the loop is set, the voltage across RSET is regulated around 0.1 V and adjusted by the digital potentiometer. VWB RSET 5V C2 10µF R4 13.5kΩ PWM SD 1.2V FB COMP RC 100kΩ CC 390pF (7) The U1 ADP3333ARM-1.5 is a 1.5 V LDO that is lifted above or lowered below 0 V. When VWB of the AD5228 is at its minimum, there is no current through D1, so the GND pin of U1 is at –1.5 V if U3 is biased with the dual supplies. As a result, some of the U2 low resistance steps have no effect on the output until the U1 GND pin is lifted above 0 V. When VWB of the AD5228 is at its maximum, VOUT becomes VL + VAB, so the U1 supply voltage must be biased with adequate headroom. Similarly, PWM signal can be applied at the U1 shutdown pin for power efficiency. U2 IN L1 10µF ADP1610 SS VOUT SW D1 C3 10µF RT GND D2 CSS 10nF D3 C8 5V 0.1µF D4 U3 V+ + AD8541 U1 RSET 0.25Ω – U1 V– L1–SLF6025-100M1R0 D1–MBR0520LT1 AD5228 R2 1.1kΩ W B A R1 100Ω VIN VOUT U1 AD5228 ARM-1.5 SD GND 5V Figure 43. Adjustable Current Source for LEDs in Series VDD PRE B PUSH-UP BUTTON W 10kΩ A PU PD PUSH-DOWN BUTTON GND RSET 0.1Ω R1 418kΩ 5V V+ – U3 AD8591 V– + VL D1 ID 04422-0-043 PWM R3 200Ω U2 ADP3333 Figure 42. Adjustable Current Source for LED Driver Rev. 0 | Page 15 of 20 04422-0-044 10kΩ 5V AD5228 AUTOMATIC LCD PANEL BACKLIGHT CONTROL AUDIO AMPLIFIER WITH VOLUME CONTROL With the addition of a photocell sensor, an automatic brightness control can be achieved. As shown in Figure 44, the resistance of the photocell changes linearly but inversely with the light output. The brighter the light output, the lower the photocell resistance and vice versa. The AD5228 sets the voltage level that is gained up by U2 to drive N1 to a desirable brightness. With the photocell acting as the variable feedback resistor, the change in the light output changes the R2 resistance, therefore causing U2 to drive N1 accordingly to regulate the output. This simple low cost implementation of an LED controller can compensate for the temperature and aging effects typically found in high power LEDs. Similarly, for power efficiency, a PWM signal can be applied at the gate of N2 to switch the LED on and off without noticeable effect. The AD5228 and SSM2211 can form a 1.5 W audio amplifier with volume control that has adequate power and quality for portable devices such as PDAs and cell phones. The SSM2211 can drive a single speaker differentially between Pins 5 and 8 without any output capacitor. The high-pass cutoff frequency is fH1 = 1/(2 × π × R1 × C1). The SSM2211 can also drive two speakers as shown in Figure 45. However, the speakers must be configured in single-ended mode, and output coupling capacitors are needed to block the dc current. The output capacitor and the speaker load form an additional high-pass cutoff frequency as fH2 = 1/(2 × π × R5 × C3). As a result, C3 and C4 must be large to make the frequency as low as fH1. 5V 5V C6 10µF R2 10kΩ U1 VDD C7 0.1µF C5 5V 0.1µF PRE C3 470µF R2 R1 1kΩ D1 PHOTOCELL 5V 5V PUSH-UP BUTTON WHITE LED C3 0.1µF A C2 0.1µF AD5228 VDD PUSH-DOWN BUTTON R3 4.75kΩ U2 N1 2N7002 5V + V– R3 10kΩ B PRE N2 GND B – 6 V+ U2 5 + V– 8 1 7 C2 0.1µF – 2N7002 Figure 45. Audio Amplifier with Volume Control Rev. 0 | Page 16 of 20 R6 8Ω U3 R4 10kΩ Figure 44. Automatic LCD Panel Backlight Control C44 470µF AD8591 + PWM R5 8Ω SSM2211 3 GND 2 AD8531 W 10kΩ PU PD A – 04422-0-045 PUSH-UP BUTTON U1 PUSH-DOWN BUTTON V+ 4 10kΩ PU PD C1 1µF W C1 R1 1µF 10kΩ 04422-0-046 5V ±2.5V p-p AUDIO_INPUT AD5228 3.50 CONSTANT BIAS WITH SUPPLY TO RETAIN RESISTANCE SETTING TA = 25°C 3.49 VDD SW1 U1 U2 AD5228 VDD COMPONENT X COMPONENT Y GND GND + GND – GND 04422-0-047 BATTERY OR SYSTEM POWER VDD U3 VDD Figure 46. Constant Bias AD5228 for Resistance Retention Rev. 0 | Page 17 of 20 3.48 3.47 3.46 3.45 3.44 3.43 3.42 04422-0-048 BATTERY VOLTAGE (V) Users who consider EEMEM potentiometers but cannot justify the additional cost and programming for their designs can consider constantly biasing the AD5228 with the supply to retain the resistance setting as shown in Figure 46. The AD5228 is designed specifically with low power to allow power conservation even in battery-operated systems. As shown in Figure 47, a similar low power digital potentiometer is biased with a 3.4 V 450 mA/hour Li-Ion cell phone battery. The measurement shows that the device drains negligible power. Constantly biasing the potentiometer is a practical approach because most of the portable devices do not require detachable batteries for charging. Although the resistance setting of the AD5228 is lost when the battery needs to be replaced, this event occurs so infrequently that the inconvenience is minimal for most applications. 3.41 3.40 0 2 4 6 DAYS 8 10 Figure 47. Battery Consumption Measurement 12 AD5228 OUTLINE DIMENSIONS 2.90 BSC 8 7 6 5 1 2 3 4 2.80 BSC 1.60 BSC PIN 1 0.65 BSC 0.90 0.87 0.84 1.95 BSC 1.00 MAX 0.10 MAX 0.38 0.22 0.20 0.08 SEATING PLANE 8° 4° 0° 0.60 0.45 0.30 COMPLIANT TO JEDEC STANDARDS MO-193BA Figure 48. 8-Lead Small Outline Transistor Package TSOT-8 [Thin SOT-23-8] (UJ-8) Dimensions shown in millimeters ORDERING GUIDE Model1 AD5228BUJZ102-RL7 AD5228BUJZ102-R2 AD5228BUJZ502-RL7 AD5228BUJZ502-R2 AD5228BUJZ1002-RL7 AD5228BUJZ1002-R2 AD5228EVAL RAB (kΩ) 10 10 50 50 100 100 10 Temperature Range −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C −40°C to +105°C Package Code UJ UJ UJ UJ UJ UJ 1 Package Description TSOT-8 TSOT-8 TSOT-8 TSOT-8 TSOT-8 TSOT-8 Evaluation Board Full Container Quantity 3000 250 3000 250 3000 250 1 Branding D3K D3K D3L D3L D3M D3M The end-to-end resistance RAB is available in 10 kΩ, 50 kΩ, and 100 kΩ. The final three characters of the part number determine the nominal resistance value, for example,10 kΩ = 10. 2 Z = Pb-free part. Rev. 0 | Page 18 of 20 AD5228 NOTES Rev. 0 | Page 19 of 20 AD5228 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04422–0–4/04(0) Rev. 0 | Page 20 of 20