AD AD626

a
Low Cost, Single Supply
Differential Amplifier
AD626
CONNECTION DIAGRAM
8-Lead Plastic Mini-DIP (N)
and SOIC (SO) Packages
FEATURES
Pin Selectable Gains of 10 and 100
True Single Supply Operation
Single Supply Range of +2.4 V to +10 V
Dual Supply Range of ⴞ1.2 V to ⴞ6 V
Wide Output Voltage Range of 30 mV to 4.7 V
Optional Low-Pass Filtering
Excellent DC Performance
Low Input Offset Voltage: 500 ␮V max
Large Common-Mode Range: 0 V to +54 V
Low Power: 1.2 mW (VS = +5 V)
Good CMR of 90 dB typ
AC Performance
Fast Settling Time: 24 ␮s (0.01%)
Includes Input Protection
Series Resistive Inputs (RIN = 200 k⍀)
RFI Filters Included
Allows 50 V Continuous Overload
1
8
+IN
7
G = 100
6
+VS
5
OUT
1/6
ANALOG
GND
2
–VS
3
G = 30
100kV
FILTER
4
G=2
AD626
APPLICATIONS
Current Sensing
Interface for Pressure Transducers, Position Indicators,
Strain Gages, and Other Low Level Signal Sources
PRODUCT DESCRIPTION
The AD626 is a low cost, true single supply differential amplifier designed for amplifying and low-pass filtering small differential voltages from sources having a large common-mode voltage.
The AD626 can operate from either a single supply of +2.4 V to
+10 V, or dual supplies of ± 1.2 V to ± 6 V. The input commonmode range of this amplifier is equal to 6 (+VS – 1 V) which
provides a +24 V CMR while operating from a +5 V supply.
Furthermore, the AD626 features a CMR of 90 dB typ.
The amplifier’s inputs are protected against continuous overload
of up to 50 V, and RFI filters are included in the attenuator
network. The output range is +0.03 V to +4.9 V using a +5 V
supply. The amplifier provides a preset gain of 10, but gains between 10 to 100 can be easily configured with an external resistor. Furthermore, a gain of 100 is available by connecting the G
= 100 pin to analog ground. The AD626 also offers low-pass
filter capability by connecting a capacitor between the filter pin
and analog ground.
The AD626A and AD626B operate over the industrial temperature range of –40°C to +85°C. The AD626 is available in two
8-lead packages: a plastic mini-DIP and SOIC.
25
140
100
G = 10,100
VS = +5V
80
G = 100
VS = 65V
60
40
G = 10
VS = 65V
20
0
0.1
INPUT COMMON MODE RANGE – Volts
160
CMRR – dB
200kV
200kV
–IN
20
10
10
100
1k
FREQUENCY – Hz
10k
100k
1M
6VCM FOR DUAL
SUPPLIES ONLY
5
0
1
6VCM FOR SINGLE
AND DUAL SUPPLIES
15
1
2
3
4
5
POWER SUPPLY VOLTAGE – 6Volts
Common-Mode Rejection vs. Frequency
Input Common-Mode Range vs. Supply
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
REV. C
AD626–SPECIFICATIONS
SINGLE SUPPLY
(@ +VS = +5 V and TA = +25ⴗC)
Model
Parameter
GAIN
Gain Accuracy
Gain = 10
Gain = 100
Over Temperature, TA = TMIN–T MAX
Gain Linearity
Gain = 10
Gain = 100
OFFSET VOLTAGE
Input Offset Voltage
vs. Temperature
vs. Temperature
vs. Supply Voltage (PSR)
+PSR
–PSR
AD626A
Min Typ
Max
Condition
Total Error
@ VOUT ≥ 100 mV dc
@ VOUT ≥ 100 mV dc
G = 10
G = 100
@ VOUT ≥ 100 mV dc
@ VOUT ≥ 100 mV dc
RL = 10 kΩ
f = 100 Hz, VCM = +24 V
f = 10 kHz, VCM = 6 V
f = 100 Hz, VCM = –2 V
COMMON-MODE VOLTAGE RANGE
+CMV Gain = 10
–CMV Gain = 10
CMR > 85 dB
CMR > 85 dB
Negative
DYNAMIC RESPONSE
–3 dB Bandwidth
Slew Rate, T MIN to TMAX
Settling Time
POWER SUPPLY
Operating Range
Quiescent Current
TRANSISTOR COUNT
0.2
0.5
0.6
0.6
30
120
%
%
ppm/°C
ppm/°C
0.014
0.014
0.016
0.02
0.014
0.014
0.016
0.02
%
%
1.9
2.5
2.9
6
1.9
2.5
2.9
6
mV
mV
µV/°C
80
66
74
64
80
66
dB
dB
66
55
60
90
64
85
80
55
73
90
64
85
dB
dB
dB
+24
–2
+24
–2
V
V
200
100
6 (VS – l)
200
100
6 (VS – l)
kΩ
kΩ
V
RL = 10 kΩ
Gain = 10
Gain = 100
Gain = 10
Gain = 100
4.7 4.90
4.7 4.90
0.03
0.03
Short Circuit Current
+ISC
NOISE
Voltage Noise RTI
Gain = 10
Gain = 100
Gain = 10
Gain = 100
1.0
1.0
50
150
74
64
INPUT
Input Resistance
Differential
Common Mode
Input Voltage Range (Common Mode)
OUTPUT
Output Voltage Swing
Positive
Units
0.4
0.1
TMIN–TMAX , G = 10 or 100
TMIN–TMAX , G = 10 or 100
COMMON-MODE REJECTION
+CMR Gain = 10, 100
± CMR Gain = 10, 100
–CMR Gain = 10, 1001
AD626B
Min Typ
Max
4.7 4.90
4.7 4.90
0.03
0.03
V
V
V
V
12
12
mA
2
2
0.25
0.25
2
2
0.25
0.25
µV p-p
µV p-p
µV/√Hz
µV/√Hz
VOUT = +1 V dc
Gain = 10
Gain = 100
to 0.01%, 1 V Step
100
0.17 0.22
0.1 0.17
24
100
0.17 0.22
0.1 0.17
22
TA = TMIN–TMAX
Gain = 10
Gain = 100
2.4
f = 0.1 Hz–10 Hz
f = 0.1 Hz–10 Hz
f = 1 kHz
f = 1 kHz
5
0.16
0.23
12
0.20
0.29
2.4
46
# of Transistors
5
0.16
0.23
kHz
V/µs
V/µs
µs
10
0.20
0.29
V
mA
mA
46
NOTES
1
At temperatures above +25°C, –CMV degrades at the rate of 12 mV/°C; i.e., @ +25°C CMV = –2 V, @ +85°C CMV = –1.28 V.
Specifications subject to change without notice.
–2–
REV. C
AD626
DUAL SUPPLY (@ +V = ⴞ5 V and T = +25ⴗC)
S
Model
Parameter
GAIN
Gain Accuracy
Gain = 10
Gain = 100
Over Temperature, TA = TMIN–T MAX
A
AD626A
Min Typ
Max
Condition
Total Error
RL = 10 kΩ
OFFSET VOLTAGE
Input Offset Voltage
vs. Temperature
vs. Temperature
vs. Supply Voltage (PSR)
+PSR
–PSR
TMIN–TMAX , G = 10 or 100
TMIN–TMAX , G = 10 or 100
COMMON-MODE REJECTION
± CMR Gain = 10, 100
± CMR Gain = 10, 100
RL = 10 kΩ
f = 100 Hz, VCM = +24 V
f = 10 kHz, VCM = 6 V
COMMON-MODE VOLTAGE RANGE
+CMV Gain = 10
–CMV Gain = 10
CMR > 85 dB
CMR > 85 dB
INPUT
Input Resistance
Differential
Common Mode
Input Voltage Range (Common Mode)
OUTPUT
Output Voltage Swing
Positive
Negative
RL = 10 kΩ
Gain = 10, 100
Gain = 10
Gain = 100
NOISE
Voltage Noise RTI
Gain = 10
Gain = 100
Gain = 10
Gain = 100
DYNAMIC RESPONSE
–3 dB Bandwidth
Slew Rate, T MIN to TMAX
Settling Time
POWER SUPPLY
Operating Range
Quiescent Current
TRANSISTOR COUNT
0.1
0.15
0.3
0.6
30
80
%
%
ppm/°C
ppm/°C
0.045
0.01
0.055
0.015
0.045
0.01
0.055
0.015
%
%
50
500
1.0
50
250
0.5
0.5
µV
mV
µV/°C
1.0
74
64
80
66
74
64
80
66
dB
dB
66
55
90
60
80
55
90
60
dB
dB
26.5
32.5
26.5
32.5
V
V
200
110
6 (VS – 1)
200
110
6 (VS – 1)
kΩ
kΩ
V
4.7 4.90
1.65 2.1
1.45 1.8
V
V
V
12
0.5
12
0.5
mA
mA
2
2
0.25
0.25
2
2
0.25
0.25
µV p-p
µV p-p
µV/√Hz
µV/√Hz
VOUT = +1 V dc
Gain = 10
Gain = 100
to 0.01%, 1 V Step
100
0.17 0.22
0.1 0.17
24
100
0.17 0.22
0.1 0.17
22
TA = TMIN–TMAX
Gain = 10
Gain = 100
± 1.2 ± 5
1.5
1.5
f = 0.1 Hz–10 Hz
f = 0.1 Hz–10 Hz
f = 1 kHz
f = 1 kHz
46
# of Transistors
Specifications subject to change without notice.
REV. C
0.5
1.0
50
100
4.7 4.90
1.65 2.1
1.45 1.8
Short Circuit Current
+ISC
–ISC
Units
0.2
0.25
G = 10
G = 100
Gain Linearity
Gain = 10
Gain = 100
AD626B
Min Typ
Max
–3–
±6
2
2
± 1.2 ± 5
1.5
1.5
46
kHz
V/µs
V/µs
µs
±6
2
2
V
mA
mA
AD626
ABSOLUTE MAXIMUM RATINGS 1
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those indicated in the operational section of
this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
2
8-Lead Plastic Package: θJA = 100°C/W, θJC = 50°C/W.
8-Lead SOIC Package: θJA = 155°C/W, θ JC = 40°C/W.
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+36 V
Internal Power Dissipation2
Peak Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Maximum Reversed Supply Voltage Limit . . . . . . . . . . . . –34 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD626A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
ESD SUSCEPTIBILITY
An ESD classification per method 3015.6 of MIL STD 883C
has been performed on the AD626, which is a Class 1 device.
ORDERING GUIDE
Model
Temperature
Range
Package
Descriptions
Package
Options
AD626AN
AD626AR
AD626BN
AD626AR-REEL
AD626AR-REEL7
– 40°C to +85°C
– 40°C to +85°C
– 40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Plastic DIP
Small Outline IC
Plastic DIP
13" Tape and Reel
7" Tape and Reel
N-8
SO-8
N-8
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
–4–
REV. C
Typical Performance Characteristics–AD626
6
POSITIVE OUTPUT VOLTAGE – Volts
INPUT COMMON MODE RANGE – Volts
25
20
6VCM FOR SINGLE
AND DUAL SUPPLIES
15
10
6VCM FOR DUAL
SUPPLIES ONLY
5
0
VS = 65V
GAIN = 10, 100
5
4
3
2
1
0
–1
1
2
3
4
5
10
100
1k
LOAD RESISTANCE – V
SUPPLY VOLTAGE – 6Volts
Figure 4. Positive Output Voltage Swing vs. Resistive Load
Figure 1. Input Common-Mode Range vs. Supply
–6
TA = +258C
NEGATIVE OUTPUT VOLTAGE – Volts
POSITIVE OUTPUT VOLTAGE SWING – Volts
5
4
SINGLE AND
DUAL SUPPLY
3
2
DUAL SUPPLY
ONLY
1
0
0
1
2
3
SUPPLY VOLTAGE – Volts
4
–4
–3
GAIN = 10
–2
GAIN = 100
–1
0
1k
10k
LOAD RESISTANCE – V
100k
Figure 5. Negative Output Voltage Swing vs. Resistive Load
30
–5
TA = +258C
CHANGE IN OFFSET VOLTAGE – mV
NEGATIVE OUTPUT VOLTAGE SWING – Volts
–5
1
100
5
Figure 2. Positive Output Voltage Swing vs. Supply Voltage
–4
–3
DUAL SUPPLY
ONLY
–2
–1
20
10
0
0
0
1
2
3
SUPPLY VOLTAGE – Volts
4
5
0
1
2
3
4
5
WARM-UP TIME – Minutes
Figure 3. Negative Output Voltage Swing vs. Supply
Voltage
REV. C
10k
Figure 6. Change in Input Offset Voltage vs. Warm-Up
Time
–5–
AD626–Typical Performance Characteristics
100
COMMON-MODE REJECTION – dB
1000
CLOSED-LOOP GAIN
VS = 65V
DUAL SUPPLY
GAIN = 100
100
VS = +5V
SINGLE SUPPLY
GAIN = 10
10
VS = 65V
DUAL SUPPLY
0
10
100
1k
10k
FREQUENCY – Hz
100k
85
80
VS = 65
75
65
20
1M
26
28
30
100
COMMON-MODE REJECTION – dB
100
G = 10,100
VS = +5
80
G = 100
VS = 65
60
40
G = 10
VS = 65
20
1
10
100
1k
10k
100k
G = 10, 100
90
80
70
60
1M
0
20
40
60
80
INPUT SOURCE RESISTANCE MISMATCH – V
FREQUENCY – Hz
Figure 8. Common-Mode Rejection vs. Frequency
Figure 11. Common-Mode Rejection vs. Input Source
Resistance Mismatch
100
0.7
G = 10, 100
95
CURVE APPLIES TO
ALL SUPPLY VOLTAGES
AND GAINS BETWEEN 10 AND 100
0.6
ADDITIONAL GAIN ERROR – %
COMMON-MODE REJECTION – dB
24
Figure 10. Common-Mode Rejection vs. Input CommonMode Voltage for Dual Supply Operation
140
90
85
80
VS = +5
75
70
65
–5
22
INPUT COMMON-MODE VOLTAGE – Volts
160
CMRR – dB
90
70
Figure 7. Closed-Loop Gain vs. Frequency
0
0.1
95
0.5
TOTAL GAIN ERROR =
GAIN ACCURACY (FROM SPEC TABLE)
+ ADDITIONAL GAIN ERROR
0.4
0.3
0.2
0.1
0.0
0
5
10
15
20
25
10
INPUT COMMON-MODE VOLTAGE – Volts
100
SOURCE RESISTANCE MISMATCH – V
1k
Figure 12. Additional Gain Error vs. Source Resistance
Mismatch
Figure 9. Common-Mode Rejection vs. Input CommonMode Voltage for Single Supply Operation
–6–
REV. C
AD626
2mV PER VERTICAL DIVISION
QUIESCENT CURRENT – mA
0.16
0.15
G = 10
0.14
0.13
0.12
1
2
4
3
SUPPLY VOLTAGE – Volts
5
5 SECONDS PER HORIZONTAL DIVISION
Figure 16. 0.1 Hz to 10 Hz RTI Voltage Noise. VS = ±5 V,
Gain = 100
Figure 13. Quiescent Supply Current vs. Supply Voltage
for Single Supply Operation
100
2.0
QUIESCENT CURRENT – mA
80
CLOSED-LOOP GAIN
1.5
1.0
0.5
FOR VS = 65V AND +5V
60
40
20
0
0
61
62
63
64
1
65
10
SUPPLY VOLTAGE – Volts
POWER SUPPLY REJECTION – dB
Hz
1.0
VOLTAGE NSD – mV/
1M
140
10
GAIN = 10, 100
0.1
VS = 65V DUAL SUPPLY
1
10
100
1k
FREQUENCY – Hz
10k
ALL CURVES FOR
GAINS OF 10 OR 100
120
100
SINGLE & DUAL
–PSRR
80
60
SINGLE
+PSRR
40
20
0.1
100k
Figure 15. Noise Voltage Spectral Density vs. Frequency
REV. C
100k
Figure 17. Closed-Loop Gain vs. RG
Figure 14. Quiescent Supply Current vs. Supply Voltage
for Dual Supply Operation
0.01
100
1k
10k
VALUE OF RESISTOR RG – V
DUAL
DUAL
+PSRR
+PSRR
1
10
100
1k
10k
FREQUENCY – Hz
100k
1M
Figure 18. Power Supply Rejection vs. Frequency
–7–
AD626
100
100
90
90
10
10
0%
0%
Figure 19. Large Signal Pulse Response. VS = ± 5 V,
G = 10
Figure 22. Large Signal Pulse Response. VS = +5 V,
G = 100
100
100
90
90
10
10
0%
0%
Figure 23. Settling Time. V S = ±5 V, G = 10
Figure 20. Large Signal Pulse Response. V S = ± 5 V,
G = 100
100
100
90
90
10
10
0%
0%
Figure 24. Settling Time. V S = ±5 V, G = 100
Figure 21. Large Signal Pulse Response. V S = +5 V,
G = 10
–8–
REV. C
AD626
ERROR
OUT
10kV
10kV
2kV
100
+VS
90
10kV
INPUT
20V p–p
AD626
1kV
10
–VS
0%
Figure 27. Settling Time Test Circuit
THEORY OF OPERATION
Figure 25. Settling Time. V S = +5 V, G = 10
The AD626 is a differential amplifier consisting of a precision
balanced attenuator, a very low drift preamplifier (A1), and an
output buffer amplifier (A2). It has been designed so that small
differential signals can be accurately amplified and filtered in the
presence of large common-mode voltages (VCM), without the
use of any other active components.
100
Figure 28 shows the main elements of the AD626. The signal
inputs at Pins 1 and 8 are first applied to dual resistive attenuators
R1 through R4 whose purpose is to reduce the peak commonmode voltage at the input to the preamplifier—a feedback stage
based on the very low drift op amp A1. This allows the differential input voltage to be accurately amplified in the presence of
large common-mode voltages six times greater than that which
can be tolerated by the actual input to A1. As a result, the input
CMR extends to six times the quantity (VS – 1 V). The overall
common-mode error is minimized by precise laser-trimming of
R3 and R4, thus giving the AD626 a common-mode rejection
ratio (CMRR) of at least 10,000:1 (80 dB).
90
10
0%
Figure 26. Settling Time. VS = +5 V, G = 100
To minimize the effect of spurious RF signals at the inputs due
to rectification at the input to A1, small filter capacitors C1 and
C2 are included.
+VS
R1
200kV
FILTER
C1
5pF
AD626
R12
100kV
+IN
A1
A2
–IN
R2
200kV
R3
41kV
R11
10kV
R6
500V
R4
41kV
R5
4.2kV
R7
500V
R17
95kV
R15
10kV
R9
10kV
R8
10kV
R10
10kV
R14
555V
GAIN = 100
GND
Figure 28. Simplified Schematic
REV. C
OUT
C2
5pF
–9–
R13
10kV
–VS
AD626
The output of A1 is connected to the input of A2 via a 100 kΩ
(R12) resistor to facilitate the low-pass filtering of the signal of
interest (see Low-Pass Filtering section).
+INPUT
–INPUT
The 200 kΩ input impedance of the AD626 requires that the
source resistance driving this amplifier be low in value (<1 kΩ)—
this is necessary to minimize gain error. Also, any mismatch
between the total source resistance at each input will affect gain
accuracy and common-mode rejection (CMR). For example:
when operating at a gain of 10, an 80 Ω mismatch in the source
resistance between the inputs will degrade CMR to 68 dB.
1
200kV +IN
8
1/6
2
–VS
3
ANALOG
GND
The output buffer, A2, operates at a gain of 2 or 20, thus setting
the overall, precalibrated gain of the AD626 (with no external
components) at 10 or 100. The gain is set by the feedback network around amplifier A2.
The output of amplifier A2 relies on a 10 kΩ resistor to –VS for
“pulldown.” For single supply operation, (–VS = “GND”), A2
can drive a 10 kΩ ground referenced load to at least +4.7 V.
The minimum, nominally “zero,” output voltage will be 30 mV.
For dual supply operation (± 5 V), the positive output voltage
swing will be the same as for a single supply. The negative swing
will be to –2.5 V, at G = 100, limited by the ratio:
R15 + R14
NOT
CONNECTED
+VS
+VS 6
100kV
0.1mF
FILTER
G= 2
OUT
OUTPUT
5
Figure 29. AD626 Configured for a Gain of 10
+INPUT
–INPUT
1
2
3
200kV
–IN
ANALOG
GND
200kV +IN
8
1/6
G = 100
7
G=30
–VS
+VS
+VS 6
0.1mF
100kV
4
The negative range can be extended to –3.3 V (G = 100) and
–4 V (G = 10) by adding an external 10 kΩ pulldown from the
output to –VS. This will add 0.5 mA to the AD626’s quiescent
current, bringing the total to 2 mA.
7
AD626
–VS
R13 + R14 + R15
G = 100
G=30
–VS
0.1mF
4
–VS ×
200kV
–IN
0.1mF
FILTER
G= 2
OUT
OUTPUT
5
AD626
Figure 30. AD626 Configured for a Gain of 100
The AD626’s 100 kHz bandwidth at G = 10 and 100 (a 10 MHz
gain bandwidth) is much higher than can be obtained with low
power op amps in discrete differential amplifier circuits. Furthermore, the AD626 is stable driving capacitive loads up to
50 pF (G10) or 200 pF (G100). Capacitive load drive can be
increased to 200 pF (G10) by connecting a 100 Ω resistor in
series with the AD626’s output and the load.
+INPUT
–INPUT
1
2
–VS
ADJUSTING THE GAIN OF THE AD626
3
CF
FILTER
(OPTIONAL)
Gains between 10 and 100 are easily set by connecting a variable resistance between Pin 7 and Analog GND, as shown in
Figure 31. Because the on-chip resistors have an absolute tolerance of ± 20% (although they are ratio matched to within 0.1%),
at least a 20% adjustment range must be provided. The values
shown in the table in Figure 31 provide a good trade-off between gain set range and resolution, for gains from 11 to 90.
ANALOG
GND
200kV +IN
8
1/6
RH
G = 100
7
4
RG
G=30
–VS
+VS
+VS 6
100kV
0.1mF
The AD626 is easily configured for gains of 10 or 100. Figure
29 shows that for a gain of 10, Pin 7 is simply left unconnected;
similarly, for a gain of 100, Pin 7 is grounded, as shown in Figure 30.
200kV
–IN
FILTER
0.1mF
G= 2
OUT
5
OUTPUT
AD626
CORNER FREQUENCY OF FILTER =
1
2pCF (100kV)
RESISTOR VALUES FOR GAIN ADJUSTMENT
GAIN RANGE
11 – 20
20 – 40
40 – 80
80 – 100
RG(V)
RH(V)
100k
10k
1k
100
4.99k
802
80
2
Figure 31. Recommended Circuit for Gain Adjustment
–10–
REV. C
AD626
SINGLE-POLE LOW-PASS FILTERING
BRIDGE APPLICATION
A low-pass filter can be easily implemented by using the features
provided by the AD626.
Figure 34 shows the AD626 in a typical bridge application.
Here, the AD626 is set to operate at a gain of 100, using dual
supply voltages and offering the option of low-pass filtering.
By simply connecting a capacitor between Pin 4 and ground, a
single-pole low-pass filter is created, as shown in Figure 32.
+VS
+INPUT
1
–INPUT
1
2
3
200kV
–IN
200kV +IN
2
G = 100
–5V
4
CF
CF
OPTIONAL
LOW-PASS
FILTER
0.1mF
OUT
G= 2
OUTPUT
5
3
0.1mF
+10V
+VS 6
100kV
FILTER
ANALOG
GND
8
1/6
G = 100
7
G=30
7
G=30
–VS
200kV +IN
8
1/6
ANALOG
GND
200kV
–IN
+VS 6
–VS
100kV
4
FILTER
+5V
0.1mF
G= 2
OUT
5
OUTPUT
AD626
AD626
Figure 34. A Typical Bridge Application
CORNER FREQUENCY OF FILTER =
1
2pCF (100kV)
Figure 32. A One-Pole Low-Pass Filter Circuit Which
Operates from a Single +10 V Supply
CURRENT SENSOR INTERFACE
A typical current sensing application, making use of the large
common-mode range of the AD626, is shown in Figure 33. The
current being measured is sensed across resistor RS . The value
of RS should be less than 1 kΩ and should be selected so that
the average differential voltage across this resistor is typically
100 mV.
To produce a full-scale output of +4 V, a gain of 40 is used
adjustable by ± 20% to absorb the tolerance in the sense resistor.
Note that there is sufficient headroom to allow at least a 10%
overrange (to +4.4 V).
CURRENT IN
CURRENT
SENSOR
CURRENT OUT
RS
1
2
–VS
3
0.1mF
CF
OPTIONAL
LOW-PASS
FILTER
200kV
–IN
ANALOG
GND
200kV +IN
8
1/6
RH
G = 100
7
G=30
+VS 6
–VS
100kV
4
FILTER
RG
+VS
0.1mF
G= 2
OUT
5
OUTPUT
AD626
Figure 33. Current Sensor Interface
REV. C
–11–
AD626
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
C1627c–0–7/99
8-Lead SOIC
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
0.1574 (4.00)
0.1497 (3.80)
8
5
1
4
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.0196 (0.50)
3 458
0.0099 (0.25)
0.0500 (1.27)
BSC
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
88
0.0500 (1.27)
0.0098 (0.25) 08
0.0160 (0.41)
0.0075 (0.19)
8-Lead Plastic Dual-In Line (PDIP)
(N-8)
0.430 (10.92)
0.348 (8.84)
8
5
0.280 (7.11)
0.240 (6.10)
1
4
0.325 (8.25)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.210
(5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.060 (1.52)
0.015 (0.38)
0.195 (4.95)
0.115 (2.93)
0.130
(3.30)
MIN
0.015 (0.381)
0.008 (0.204)
PRINTED IN U.S.A.
0.022 (0.558) 0.070 (1.77) SEATING
0.014 (0.356) 0.045 (1.15) PLANE
–12–
REV. C