Low Cost, 300 MHz Voltage Feedback Amplifiers AD8055/AD8056 Imaging Photodiode preamps Video line drivers Differential line drivers Professional cameras Video switchers Special effects A-to-D drivers Active filters GENERAL DESCRIPTION The AD8055 (single) and AD8056 (dual) voltage feedback amplifiers offer bandwidth and slew rate typically found in current feedback amplifiers. Additionally, these amplifiers are easy to use and available at a very low cost. Despite their low cost, the AD8055 and AD8056 provide excellent overall performance. For video applications, their differential gain and phase error are 0.01% and 0.02° into a 150 Ω load and 0.02% and 0.1° while driving four video loads (37.50 Ω). 1 8 NC –IN 2 7 +VS +IN 3 6 VOUT –VS 4 5 NC NC = NO CONNECT 1 –VS 2 +IN 3 5 +VS 4 –IN AD8055 Figure 1. N-8 and R-8 Figure 2. RJ-5 OUT1 1 8 +VS –IN1 2 7 OUT +IN1 3 6 –IN2 –VS 4 5 +IN2 AD8056 01063-003 AD8055 VOUT 01063-002 NC Figure 3. N-8, R-8, and RM-8 Their 0.1 dB flatness out to 40 MHz, wide bandwidth out to 300 MHz, along with 1400 V/μs slew rate and 20 ns settling time, make them useful for a variety of high speed applications. The AD8055 and AD8056 require only 5 mA typ/amplifier of supply current and operate on a dual ±5 V or a single +12 V power supply, while capable of delivering over 60 mA of load current. The AD8055 is available in a small 8-lead PDIP, an 8-lead SOIC, and a 5-lead SOT-23, while the AD8056 is available in an 8-lead MSOP. These features make the AD8055/AD8056 ideal for portable and battery-powered applications where size and power are critical. These amplifiers in the R-8, N-8, and RM-8 packages are available in the extended temperature range of −40°C to +125°C. 5 4 RC VIN 3 2 VOUT VOUT = 100mV p-p RL = 100Ω 50Ω RG RF RL G = +1 RF = 0Ω RC = 100Ω 1 G = +2 RF = 402Ω 0 –1 –2 G = +10 RF = 909Ω –3 G = +5 RF = 1000Ω –4 –5 0.3M 1M 10M 100M FREQUENCY (Hz) 1G 01063-004 APPLICATIONS CONNECTION DIAGRAMS GAIN (dB) Low cost single (AD8055) and dual (AD8056) Easy-to-use voltage feedback architecture High speed 300 MHz, −3 dB bandwidth (G = +1) 1400 V/μs slew rate 20 ns settling to 0.1% Low distortion: −72 dBc @ 10 MHz Low noise: 6 nV/√Hz Low dc errors: 5 mV max VOS, 1.2 μA max IB Small packaging AD8055 available in 5-lead SOT-23 AD8056 available in 8-lead MSOP Excellent video specifications (RL = 150 Ω, G = +2) Gain flatness 0.1 dB to 40 MHz 0.01% differential gain error 0.02° differential phase error Drives 4 video loads (37.5 V) with 0.02% differential Gain and 0.1° differential phase Low power, ±5 V supplies 5 mA typ/amplifier power supply current High output drive current: over 60 mA 01063-001 FEATURES Figure 4. Frequency Response Rev. J Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. AD8055/AD8056 TABLE OF CONTENTS Features .............................................................................................. 1 Applications..................................................................................... 12 Applications....................................................................................... 1 Four-Line Video Driver............................................................. 12 General Description ......................................................................... 1 Single-Ended-to-Differential Line Driver............................... 12 Connection Diagrams...................................................................... 1 Low Noise, Low Power Preamp................................................ 12 Revision History ............................................................................... 2 Power Dissipation Limits .......................................................... 13 Specifications..................................................................................... 3 Resistor Selection ....................................................................... 13 Absolute Maximum Ratings............................................................ 5 Driving Capacitive Loads.......................................................... 13 Maximum Power Dissipation ..................................................... 5 Outline Dimensions ....................................................................... 14 ESD Caution.................................................................................. 5 Ordering Guide .......................................................................... 16 Typical Performance Characteristics ............................................. 6 Test Circuits..................................................................................... 11 REVISION HISTORY 2/06—Rev. I to Rev. J Changes to Format .............................................................Universal Updated Outline Dimensions ....................................................... 15 Changes to Ordering Guide .......................................................... 16 2/04—Rev. H to Rev. I Changes to Features.......................................................................... 1 Changes to Ordering Guide ............................................................ 3 6/03—Rev. G to Rev. H Changes to Absolute Maximum Ratings ....................................... 3 Updated Ordering Guide................................................................. 3 Updated Outline Dimensions ....................................................... 11 2/03—Rev. F to Rev. G Changes to Product Description .................................................... 1 Changes to Specifications ................................................................ 2 Change to Ordering Guide.............................................................. 3 Outline Dimensions Updated ....................................................... 11 10/02—Rev. E to Rev. F Text Changes to Reflect Extended Temperature Range for R-8, N-8 Packages..............................................................................1 Changes to Specifications.................................................................2 Changes to Absolute Maximum Ratings........................................3 Figure 2 Replaced ..............................................................................3 Changes to Ordering Guide .............................................................3 Outline Dimensions Updated....................................................... 11 7/01—Rev. D to Rev. E TPC 24 Replaced with New Graph .................................................7 3/01—Rev. C to Rev. D Edit to Curve in TPC 23 ...................................................................7 2/01—Rev. B to Rev. C Edits to Text at Top of Specifications Page (65 to 5)....................2 Rev. J | Page 2 of 16 AD8055/AD8056 SPECIFICATIONS TA = 25°C, VS = ±5 V, RF = 402 Ω, RL = 100 Ω, Gain = +2, unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE −3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% Rise and Fall Time, 10% to 90% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Crosstalk, Output-to-Output (AD8056) Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error AD8055A/AD8056A Min Typ Max Conditions G = +1, VO = 0.1 V p-p G=+1, VO = 2 V p-p G=+2, VO = 0.1 V p-p G=+2, VO = 2 V p-p VO = 100 mV p-p G = +1, VO = 4 V step G = +2, VO = 4 V step G = +2, VO = 2 V step G = +1, VO = 0.5 V step G = +1, VO = 4 V step G = +2, VO = 0.5 V step G = +2, VO = 4 V step 220 125 120 125 25 1000 750 fC = 10 MHz, VO = 2 V p-p, RL = 1 kΩ fC = 20 MHz, VO = 2 V p-p, RL = 1 kΩ f = 5 MHz, G = +2 f = 100 kHz f = 100 kHz NTSC, G = +2, RL = 150 Ω NTSC, G = +2, RL = 37.5 Ω NTSC, G = +2, RL = 150 Ω NTSC, G = +2, RL = 37.5 Ω DC PERFORMANCE Input Offset Voltage 300 150 160 150 40 1400 840 20 2 2.7 2.8 4 MHz MHz MHz MHz MHz V/μs V/μs ns ns ns ns ns −72 −57 −60 6 1 0.01 0.02 0.02 0.1 dBc dBc dB nV/√Hz pA/√Hz % % Degree Degree 3 5 10 0.4 1.2 TMIN to TMAX Offset Drift Input Bias Current Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Output Current 1 Short-Circuit Current1 6 TMIN to TMAX VO = ±2.5 V TMIN to TMAX 1 66 64 VCM = ±2.5 V RL = 150 Ω VO = ±2.0 V 2.9 55 Rev. J | Page 3 of 16 Unit 71 mV mV μV/°C μA μA dB dB 10 2 3.2 82 MΩ pF ±V dB 3.1 60 110 ±V mA mA AD8055/AD8056 Parameter POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE 1 AD8055A/AD8056A Min Typ Max Conditions ±4.0 AD8055 TMIN to 125°C TMIN to 85°C AD8056 TMIN to 125°C TMIN to 85°C +VS = +5 V to +6 V, −VS = −5 V −VS = –5 V to −6 V, +VS = +5 V AD8055ART AD8055AR, AD8055AN, AD8056AR, AD8056AN, AD8056ARM Output current is limited by the maximum power dissipation in the package. See Figure 5. Rev. J | Page 4 of 16 ±5.0 5.4 7.6 10 13.9 ±6.0 6.5 7.3 12 13.3 66 69 −40 −40 72 86 +85 +125 Unit V mA mA mA mA mA mA dB dB °C °C AD8055/AD8056 ABSOLUTE MAXIMUM RATINGS Table 2. Storage Temperature Range N, R Operating Temperature Range (A Grade) Lead Temperature (Soldering 10 sec) MAXIMUM POWER DISSIPATION Ratings 13.2 V ±VS ±2.5 V Observe Power Derating Curves −65°C to +150°C −40°C to +125°C 300°C While the AD8055/AD8056 are internally short-circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150°C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves. 2.5 MAXIMUM POWER DISSIPATION (W) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The maximum power that can be safely dissipated by the AD8055/AD8056 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150°C. Exceeding this limit temporarily can cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result in device failure. 2.0 PDIP-8 SOIC-8 1.5 1.0 MSOP-8 0.5 SOT-23-5 0 –55 –45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105 115 125 AMBIENT TEMPERATURE (°C) Figure 5. Plot of Maximum Power Dissipation vs. Temperature for AD8055/AD8056 ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. J | Page 5 of 16 01063-005 Parameter Supply Voltage Input Voltage (Common Mode) Differential Input Voltage Output Short-Circuit Duration AD8055/AD8056 TYPICAL PERFORMANCE CHARACTERISTICS 0V 5ns 1V Figure 6. Small Step Response, G = +1 (See Figure 34) 01063-011 20mV 01063-007 0V 5ns Figure 9. Large Step Response, G = −1 (See Figure 35) 5 4 3 RG 01063-008 Figure 7. Large Step Response, G = +1 (See Figure 34) RF RL G = +1 RF = 0Ω RC = 100Ω G = +2 RF = 402Ω 1 0 –1 G = +10 RF = 909Ω –3 5ns VOUT = 100mV p-p RL = 100Ω 50Ω –2 1V VOUT G = +5 RF = 1000Ω –4 –5 0.3M 1M 10M 100M FREQUENCY (Hz) 1G 01063-012 GAIN (dB) 2 0V RC VIN Figure 10. Small Signal Frequency Response, G = +1, G = +2, G = +5, G = +10 5 VOUT = 2V p-p RL = 100Ω 4 3 0V G = +1 RF = 0Ω 1 0 G = +2 RF = 402Ω –1 –2 G = +10 RF = 909Ω 20mV 5ns Figure 8. Small Step Response, G = −1 (See Figure 35) 01063-010 –3 G = +5 RF = 1000Ω –4 –5 0.3M 1M 10M 100M FREQUENCY (Hz) 1G 01063-013 GAIN (dB) 2 Figure 11. Large Signal Frequency Response, G = +1, G = +2, G = +5, G = +10 Rev. J | Page 6 of 16 AD8055/AD8056 –40 0.5 VOUT = 100mV G = +2 RL = 100Ω RF = 402Ω 0.4 0.3 DISTORTION (dBc) 0.2 OUTPUT (dB) G = +2 RL = 1kΩ –50 0.1 0 –0.1 –0.2 –0.3 –60 SECOND –70 THIRD –80 1M 10M 100M FREQUENCY (Hz) 1G –90 01063-014 –0.5 0.3M 0 0.4 Figure 12. 0.1 dB Flatness 1.6 2.0 2.4 VOUT (V p-p) 3.2 3.6 4.0 4.5 5.0 4.5 5.0 G = +1 RL = 100Ω RF = 0Ω 9 –80 THIRD –90 8 7 6 5 FALL TIME 4 3 2 RISE TIME 100k 1M FREQUENCY (Hz) 10M 100M 01063-015 1 0 0 Figure 13. Harmonic Distortion vs. Frequency 0.5 1.0 1.5 2.0 2.5 3.0 VIN (V p-p) 3.5 4.0 01063-018 SECOND –70 –100 10k 2.8 10 VOUT = 2V p-p G = +2 RL = 100Ω RISE TIME AND FALL TIME (ns) HARMONIC DISTORTION (dBc) 1.2 Figure 15. Distortion vs. VOUT @ 20 MHz –50 –60 0.8 01063-017 –0.4 Figure 16. Rise Time and Fall Time vs. VIN 10 –70 –80 SECOND 8 7 6 5 4 FALL TIME 3 2 –90 0 100k 1M FREQUENCY (Hz) 10M 100M 01063-016 –100 10k RISE TIME 1 THIRD 0 0.5 1.0 1.5 2.0 2.5 3.0 VIN (V p-p) 3.5 4.0 Figure 17. Rise Time and Fall Time vs. VIN Figure 14. Harmonic Distortion vs. Frequency Rev. J | Page 7 of 16 01063-019 –60 G = +1 RL = 1kΩ RF = 0Ω 9 VOUT = 2V p-p G = +2 RL = 1kΩ RISE TIME AND FALL TIME (ns) HARMONIC DISTORTION (dBc) –50 AD8055/AD8056 0.7 10 VOUT = 0V TO +2V OR VOUT = 0V TO –2V G = +2 RL = 100Ω 0.6 0.5 G = +2 RF = 402Ω 0 –10 0.4 –20 PSRR (dB) 0.2 0.1 0 –0.1 –PSRR –40 –50 +PSRR –60 –0.2 –70 –0.3 –80 –0.4 0 10 20 30 TIME (ns) 40 50 60 –90 0.1 01063-020 –0.5 –30 1 Figure 18. Settling Time 10 FREQUENCY (MHz) 100 500 01063-023 ERROR (%) 0.3 Figure 21. PSRR vs. Frequency 10 G = +2 RL = 100Ω RF = 402Ω VIN G = +1 RL = 100Ω VS = ±5V 8 VOUT 7 6 5 4 RISE TIME 3 FALL TIME 1 0 0 0.2 0.4 0.6 0.8 1.0 VIN (V p-p) 1V 1.2 1.4 1.6 01063-024 2 50ns 01063-021 RISE TIME AND FALL TIME (ns) 9 Figure 19. Rise Time and Fall Time vs. VIN Figure 22. Overload Recovery 5.0 G = +2 RL = 1kΩ RF = 402Ω 4.0 –20 –40 3.5 CROSSTALK (dB) RISE TIME 3.0 2.5 2.0 FALL TIME 1.5 1.0 –50 –60 SIDE 2 DRIVEN –70 –80 SIDE 1 DRIVEN –90 –100 0.5 –110 0 0.2 0.4 0.6 0.8 1.0 VIN (V p-p) 1.2 1.4 1.6 –120 0.1 1 10 FREQUENCY (MHz) 100 200 Figure 20. Rise Time and Fall Time vs. VIN Figure 23. Crosstalk (Output-to-Output) vs. Frequency Rev. J | Page 8 of 16 01063-025 0 VIN = 0dBm G = +2 RL = 100Ω RF = 402Ω –30 01063-022 RISE TIME AND FALL TIME (ns) 4.5 AD8055/AD8056 0 180 –20 50Ω 402Ω 135 58Ω 402Ω PHASE (Degrees) –30 CMRR (dB) 402Ω 402Ω –10 –40 –50 –60 90 45 –70 0 –80 –45 100 500 –90 10k 100k Figure 24. CMRR vs. Frequency DIFFERENTIAL GAIN (%) VIN (1V/DIV) DIFFERENTIAL PHASE (Degrees) VOUT (2V/DIV) 50ns 0.04 0 50 40 DIFFERENTIAL PHASE (Degrees) 30 20 10 0 0.1 1 10 FREQUENCY (MHz) 100 500 01063-028 OPEN-LOOP GAIN (dB) DIFFERENTIAL GAIN (%) RL = 100Ω 60 –10 0.01 G = +2 RF = 402Ω –0.02 –0.04 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH IRE 0.04 1 BACK TERMINATED LOAD (150Ω) 0.02 0 G = +2 RF = 402Ω –0.02 –0.04 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH IRE Figure 28. Differential Gain and Differential Phase 90 70 500M 1 BACK TERMINATED LOAD (150Ω) 0.02 Figure 25. Overload Recovery 80 100M Figure 27. Phase vs. Frequency 01063-027 G = +2 RL = 100Ω RF = 402Ω VS = ±5V 1M 10M FREQUENCY (Hz) 01063-030 10 FREQUENCY (MHz) 0.04 4 VIDEO LOADS (37.5Ω) 0.02 0 G = +2 RF = 402Ω –0.02 –0.04 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH IRE 0.15 4 VIDEO LOADS (37.5Ω) 0.10 0.05 0 –0.05 –0.10 –0.15 G = +2 RF = 402Ω 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH IRE Figure 29. Differential Gain and Differential Phase Figure 26. Open-Loop Gain vs. Frequency Rev. J | Page 9 of 16 01063-031 1 01063-026 –100 0.1 01063-029 –90 AD8055/AD8056 5.0 100 VS = ±5V 4.0 RL = 1kΩ 3.5 ±VOUT (V) CURRENT NOISE (pA/ Hz) 4.5 3.0 2.5 RL = 150Ω 2.0 RL = 50Ω 1.5 10 1 1.0 –35 –15 5 25 45 65 TEMPERATURE (°C) 85 105 125 0.1 10 01063-032 0 –55 100 Figure 30. Output Swing vs. Temperature 10k 100k FREQUENCY (Hz) 1M 10M 50M Figure 32. Current Noise vs. Frequency 1000 45 40 G = +2 RF = 402Ω 35 30 |ZOUT| (Ω) 100 10 6nV/ Hz 25 20 15 10 5 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 50M –5 0.01 Figure 31. Voltage Noise vs. Frequency 0.1 1 10 FREQUENCY (MHz) 100 Figure 33. Output Impedance vs. Frequency Rev. J | Page 10 of 16 500 01063-035 0 1 10 01063-033 VOLTAGE NOISE (nV/ Hz) 1k 01063-034 0.5 AD8055/AD8056 TEST CIRCUITS 402Ω 4.7µF 0.01µF +VS 0.001µF VIN 100Ω 3 7 AD8055 50Ω 2 4 0.01µF 0.001µF VOUT HP8130A PULSE GENERATOR TR/TF = 0.67ns 6 100Ω 4.7µF 0.01µF 0.001µF –VS VIN 402Ω 2 7 AD8055 57Ω 3 4 6 VOUT 0.001µF –VS Figure 35. G = −1, RL = 100 Ω Figure 34. G = +1, RL = 100 Ω Rev. J | Page 11 of 16 100Ω 4.7µF 0.01µF 01063-006 HP8130A PULSE GENERATOR TR/TF = 1ns 4.7µF 01063-009 +VS AD8055/AD8056 APPLICATIONS FOUR-LINE VIDEO DRIVER Between these points, a feedback resistor can be used to close the loop. As in the case of a conventional op amp inverting gain stage, an input resistor is added to vary the gain. The AD8055 is a useful low cost circuit for driving up to four video lines. For such an application, the amplifier is configured for a noninverting gain of 2, as shown in Figure 36. The input video source is terminated in 75 Ω and is applied to the high impedance noninverting input. Each output cable is connected to the op amp output via a 75 Ω series back termination resistor for proper cable termination. The terminating resistors at the other ends of the lines divide the output signal by 2, which is compensated for by the gain of 2 of the op amp stage. For a single load, the differential gain error of this circuit was measured as 0.01%, with a differential phase error of 0.02°. The two load measurements were 0.02% and 0.03°, respectively. For four loads, the differential gain error is 0.02%, while the differential phase increases to 0.1°. The gain of this circuit from the input to AMP1 output is RF/RI, while the gain to the output of AMP2 is −RF /RI. The circuit therefore creates a balanced differential output signal from a single-ended input. The advantage of this circuit is that the gain can be changed by changing a single resistor, while still maintaining the balanced differential outputs. RF 402Ω +5V VIN 0.1µF RI 402Ω 3 10µF 8 49.9Ω AMP1 1 +VOUT 2 402Ω 75Ω VOUT1 +5V 75Ω 402Ω 7 3 75Ω 402Ω 402Ω VOUT2 75Ω 6 6 4 75Ω 0.1µF –5V 10µF 49.9Ω AMP2 VOUT3 5 75Ω 7 75Ω 0.1µF 75Ω –VOUT 4 VOUT4 75Ω Figure 36. Four-Line Video Driver 10µF 01063-037 AD8055 VIN 75Ω –5V Figure 37. Single-Ended-to-Differential Line Driver LOW NOISE, LOW POWER PREAMP SINGLE-ENDED-TO-DIFFERENTIAL LINE DRIVER Creating differential signals from single-ended signals is required for driving balanced, twisted pair cables, differential input ADCs, and other applications that require differential signals. This can be accomplished by using an inverting and a noninverting amplifier stage to create the complementary signals. The circuit shown in Figure 37 shows how an AD8056 can be used to make a single-ended-to-differential converter that offers some advantages over the architecture previously mentioned. Each op amp is configured for unity gain by the feedback resistors from the outputs to the inverting inputs. In addition, each output drives the opposite op amp with a gain of −1 by means of the crossed resistors. The result of this is that the outputs are complementary and there is high gain in the overall configuration. Feedback techniques similar to a conventional op amp are used to control the gain of the circuit. From the noninverting input of AMP1 to the output of AMP2 is an inverting gain. The AD8055 makes a good, low cost, low noise, low power preamp. A gain-of-10 preamp can be made with a feedback resistor of 909 Ω and a gain resistor of 100 Ω, as shown in Figure 38. The circuit has a −3 dB bandwidth of 20 MHz. 909Ω +5V 100Ω 0.1µF 2 7 AD8055 3 + 10µF VOUT 6 4 RS 0.1µF –5V 10µF 01063-038 2 10µF 01063-036 402Ω 0.1µF 402Ω AD8056 Figure 38. Low Noise, Low Power Preamp with G = +10 and BW = 20 MHz With a low source resistance (< approximately 100 Ω), the major contributors to the input-referred noise of this circuit are the input voltage noise of the amplifier and the noise of the 100 Ω resistor. These are 6 nV/√Hz and 1.2 nV/√Hz, respectively. These values yield a total input referred noise of 6.1 nV/√Hz. Rev. J | Page 12 of 16 AD8055/AD8056 5 POWER DISSIPATION LIMITS 402Ω NORMALIZED GAIN (dB) 3 The power dissipated under heavy load conditions is approximately equal to the supply voltage minus the output voltage, times the load current, plus the quiescent power previously computed. The total power dissipation is then multiplied by the thermal resistance of the package to find the temperature rise, above ambient, of the part. The junction temperature should be kept below 150°C. VIN = 0dBm 2 CL 0 CL = 20pF –1 CL = 10pF –2 CL = 0pF –3 –5 0.3 1 10 FREQUENCY (MHz) In general, to minimize peaking or to ensure the stability for larger values of capacitive loads, a small series resistor, RS, can be added between the op amp output and the capacitor, CL. For the setup depicted in Figure 40, the relationship between RS and CL was empirically derived and is shown in Figure 41. RS was chosen to produce less than 1 dB of peaking in the frequency response. Note also that after a sharp rise, RS quickly settles to approximately 25 Ω. 402Ω +5V 0.1µF AD8055 402 249 100 FET PROBE VOUT RS 6 CL 4 3 50Ω −3 dB Bandwidth (MHz) 300 160 45 20 10µF 7 2 VIN = 0dBm RG (Ω) 500 Figure 39. Capacitive Load Drive Table 3 is a guide for resistor selection for maintaining gain flatness vs. frequency for various values of gain. RF (Ω) 0 402 1k 909 100 01063-039 –4 402Ω Table 3. CL = 30pF 100Ω 1 RESISTOR SELECTION Gain +1 +2 +5 +10 50Ω 0.1µF 10µF 01063-040 The AD8055 in the SOT-23-5 package can dissipate 270 mW, while the AD8056 in the MSOP-8 package can dissipate 325 mW (at 85°C ambient) without exceeding the maximum die temperature. In the case of the AD8056, this is greater than 1.5 V rms into 50 Ω, enough to accommodate a 4 V p-p sine wave signal on both outputs simultaneously. However, because each output of the AD8055 or AD8056 is capable of supplying as much as 110 mA into a short circuit, a continuous shortcircuit condition will exceed the maximum safe junction temperature. 402Ω 4 With a 10 V supply (total VCC − VEE), the quiescent power dissipation of the AD8055 in the SOT-23-5 package is 65 mW, while the quiescent power dissipation of the AD8056 in the MSOP-8 is 120 mW. This translates into a 15.6°C rise above the ambient for the SOT-23-5 package and a 24°C rise for the MSOP-8 package. –5V Figure 40. Setup for RS vs. CL 40 35 DRIVING CAPACITIVE LOADS 30 25 RS (Ω) When driving a capacitive load, most op amps exhibit peaking in the frequency response just before the frequency rolls off. Figure 39 shows the responses for an AD8056 running at a gain of +2, with an 100 Ω load that is shunted by various values of capacitance. It can be seen that under these conditions the part is still stable with capacitive loads of up to 30 pF. 20 15 10 0 0 10 20 30 40 CL (pF) Figure 41. RS vs. CL Rev. J | Page 13 of 16 50 60 270 01063-041 5 AD8055/AD8056 OUTLINE DIMENSIONS 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 5 1 4 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) PIN 1 0.100 (2.54) BSC 0.060 (1.52) MAX 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) MIN 0.015 (0.38) GAUGE PLANE SEATING PLANE 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.430 (10.92) MAX 0.005 (0.13) MIN 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) COMPLIANT TO JEDEC STANDARDS MS-001-BA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 42. 8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-8) Dimensions shown in inches and (millimeters) 5.00 (0.1968) 4.80 (0.1890) 8 4.00 (0.1574) 3.80 (0.1497) 1 5 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 6.20 (0.2440) 4 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 0.50 (0.0196) × 45° 0.25 (0.0099) 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 43. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Rev. J | Page 14 of 16 AD8055/AD8056 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 0.65 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.80 0.60 0.40 8° 0° 0.23 0.08 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 44. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 2.90 BSC 5 4 2.80 BSC 1.60 BSC 1 2 3 PIN 1 0.95 BSC 1.90 BSC 1.30 1.15 0.90 1.45 MAX 0.15 MAX 0.50 0.30 0.22 0.08 SEATING PLANE 10° 5° 0° COMPLIANT TO JEDEC STANDARDS MO-178-AA Figure 45. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters Rev. J | Page 15 of 16 0.60 0.45 0.30 AD8055/AD8056 ORDERING GUIDE Model AD8055AN AD8055ANZ 1 AD8055AR AD8055AR-REEL AD8055AR-REEL7 AD8055ARZ1 AD8055ARZ-REEL1 AD8055ARZ-REEL71 AD8055ART-R2 AD8055ART-REEL AD8055ART-REEL7 AD8055ARTZ-R21 AD8055ARTZ-REEL71 AD8056AN AD8056ANZ1 AD8056AR AD8056AR-REEL AD8056AR-REEL7 AD8056ARZ1 AD8056ARZ-REEL1 AD8056ARZ-REEL71 AD8056ARM AD8056ARM-REEL AD8056ARM-REEL7 AD8056ARMZ1 AD8056ARMZ-REEL1 AD8056ARMZ-REEL71 1 2 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N, 13" Tape and Reel 8-Lead SOIC_N, 7" Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N, 13" Tape and Reel 8-Lead SOIC_N, 7" Tape and Reel 5-Lead SOT-23, Reel 5-Lead SOT-23, 13" Tape and Reel 5-Lead SOT-23, 7" Tape and Reel 5-Lead SOT-23, Reel 5-Lead SOT-23, 7" Tape and Reel 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N, 13" Tape and Reel 8-Lead SOIC_N, 7" Tape and Reel 8-Lead SOIC_N 8-Lead SOIC_N, 13" Tape and Reel 8-Lead SOIC_N, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel Z = Pb-free part, # denotes lead-free product may be top or bottom marked. Prior to 0542, parts were branded H3A. ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01063-0-2/06(J) Rev. J | Page 16 of 16 Package Option N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 Branding H3A H3A H3A H3A H07 2 H5A H5A H5A H5A# H5A# H5A#