15 kV ESD Protected, 2.7 V to 3.6 V Serial Port Transceivers with Green Idle™ Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E1 FEATURES FUNCTIONAL BLOCK DIAGRAMS Green Idle power-saving mode Single 2.7 V to 3.6 V power supply Operates with 3 V logic 0.1 µF to 1 µF charge pump capacitors Low EMI Low power shutdown: 20 nA Full RS-232 compliance 460 kb/s data rate One receiver active in shutdown (ADM3307E/ADM3311E/ADM3312E/ADM3315E) Two receivers active in shutdown (ADM3310E) ESD >15 kV IEC 1000-4-2 on RS-232 I/Os ESD >15 kV IEC 1000-4-2 on CMOS and RS-232 I/Os (ADM3307E) Qualified for automotive applications C1 0.1µF VCC 0.1µF CERAMIC 10µF TANTALUM + 10µF TANTALUM T1IN CMOS INPUTS1 EN C1– C1+ SD T1 T1IN CMOS INPUTS1 T2IN T3 R2 R3 R3OUT R4 R4OUT R5 T4OUT T5 R1 R1OUT T5OUT R1IN EIA/TIA-232 INPUTS2 R2IN R2 R3 R3IN 02915-001 ADM3307E 1INTERNAL 400kΩ PULL-UP RESISTOR ON EACH CMOS INPUT. 2INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT. Figure 1. ADM3307E Functional Block Diagram C4 0.1µF C3 0.1µF VCC 0.1µF CERAMIC + C5 0.1µF 10µF TANTALUM V– C2– ENABLE INPUT SHUTDOWN INPUT EN C1– C1+ SD T1 T1IN CMOS INPUTS1 EIA/TIA-232 OUTPUTS T2IN T3IN R1IN CMOS OUTPUTS EIA/TIA-232 INPUTS2 T3 R3OUT C5 0.1µF SHUTDOWN INPUT T1OUT EIA/TIA-232 OUTPUTS T3OUT R1 R2 R2OUT R4IN C3 0.1µF T2OUT T2 R1OUT R2IN R3IN VOLTAGE C3+ TRIPLER/ C2+ INVERTER GND +3V TO ±9V C3– VCC V+ C2 0.1µF T3OUT R1 R2OUT R5OUT T4 T5IN R2OUT EIA/TIA-232 OUTPUTS T3OUT R3OUT T2OUT R1OUT CMOS OUTPUTS T3 T4IN T1OUT T2 T3IN R3 R1IN R2IN EIA/TIA-232 INPUTS2 R3IN ADM3312E/ ADM3315E R5IN ADM3310E/ ADM3311E Figure 2. ADM3310E/ADM3311E Functional Block Diagram 02915-002 1INTERNAL 400kΩ PULL-UP RESISTOR ON EACH CMOS INPUT. 2INTERNAL 5kΩ (22kΩ FOR ADM3315E) PULL-DOWN RESISTOR ON 1INTERNAL 400kΩ PULL-UP RESISTOR ON EACH CMOS INPUT. 2INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT. 1 T3IN C1 V– T2OUT T2 0.1µF VOLTAGE C3+ TRIPLER/ C2+ INVERTER GND +3V TO ±9V C3– VCC C5 0.1µF T1OUT T1 T2IN C1 C2– ENABLE INPUT V– GND EACH RS-232 INPUT. 02915-003 C2 0.1µF EN SD 0.1µF V+ C3 0.1µF C3– SHUTDOWN INPUT Mobile phone handsets/data cables Laptop and notebook computers Printers Peripherals Modems PDAs/Hand-Held Devices/Palmtop Computers 0.1µF CERAMIC VOLTAGE C2+ TRIPLER/ VCC INVERTER C3+ +3V TO ±9V C1+ C2– V+ C1– ENABLE INPUT APPLICATIONS VCC C4 0.1µF + CMOS OUTPUTS C4 0.1µF C2 0.1µF Figure 3. ADM3312E/ADM3315E Functional Block Diagram Protected by U.S. Patent No. 5,606,491. Rev. I Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. 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Technical Support www.analog.com ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ........................................... 10 Applications ....................................................................................... 1 Circuit Description......................................................................... 13 Functional Block Diagrams ............................................................. 1 Enable and Shutdown ................................................................ 15 Revision History ............................................................................... 2 Layout and Supply Decoupling ................................................ 15 General Description ......................................................................... 3 ESD/EFT Transient Protection Scheme .................................. 15 Specifications..................................................................................... 4 ESD Testing (IEC 1000-4-2) ..................................................... 16 Absolute Maximum Ratings ............................................................ 6 Outline Dimensions ....................................................................... 18 ESD Caution .................................................................................. 6 Ordering Guide .......................................................................... 20 Product Selection Guide .................................................................. 7 Automotive Products ................................................................. 21 Pin Configurations and Function Descriptions ........................... 8 REVISION HISTORY 3/13—Rev. H to Rev. I Changed CP-32-2 Package to CP-32-7 Package, Throughout .... 1 Changes to Figure 4, Figure 6, Figure 8 ......................................... 8 Changes to Figure 25 ...................................................................... 13 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 20 Added Automotive Products Section........................................... 20 1/06—Rev. G to Rev. H Updated Formatting ................................................................. Universal Updated Outline Dimensions .............................................................. 18 Changes to Ordering Guide ................................................................. 20 4/04—Rev. F to Rev. G Changes to Ordering Guide ................................................................... 5 Updated Outline Dimensions .............................................................. 15 8/02—Rev. E to Rev. F ADM3307E (REV. 0), ADM3311E (REV. E), and ADM3312E (REV. A) Data Sheets Merged into REV. G of ADM33xxE Universal ADM3310E (REV. PrA Now Prelims) and ADM3315E (REV. PrA) Added .................................................................... Universal Edits to Features....................................................................................... 1 Edits to Applications ............................................................................... 1 Edits to General Description ................................................................. 1 Edits to Functional Block Diagrams ..................................................... 2 Edits to Specifications ............................................................................... Edits to Absolute Maximum Ratings .................................................... 4 ADM33xx Product Selection Guide Added ......................................... 5 Added ADM3307E, ADM3310E, ADM3312E, and ADM3315E Pin Configurations ............................................................ 6 Edits to Pin Function Descriptions ....................................................... 7 Added ADM3307E, ADM3310E, ADM3312E, and ADM3315E Truth Tables .......................................................................7 Edits to TPCs 1–14 ..................................................................................8 TPCs 15–18 Deleted ..............................................................................10 Edits to Circuit Description Section ...................................................11 Edits to Charge Pump DC-to-DC Voltage Converter Section ........11 Edits to How Does It Work Section ....................................................11 Edits to Green Idle vs. Shutdown Section ..........................................12 Edits to Doesn’t It Increase Supply Voltage Ripple? Section ............12 Edits to What About Electromagnetic Compatibility? Section .......12 Edits to Transmitter (Driver) Section .................................................12 Edits to Receiver Section ......................................................................12 Edits to Enable and Shutdown Section ...............................................12 Edits to High Baud Rate Section..........................................................13 Edits to ESD/EFT Transient Protection Scheme ...............................13 Added Figures 8a and 8b and Renumbered the Figures that Followed ..........................................................................................13 Edits to ESD Testing (IEC 1000-4-2) Section ....................................14 Edits to Figure 9 .....................................................................................14 Deleted Table II and Table III and replaced them with Table V .....14 Added RU-24 Package Outline Updated CP-32, RS-28 and RU-28 ...............................................................................................15 Rev. I | Page 2 of 24 Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E GENERAL DESCRIPTION The ADM33xxE line of driver/receiver products is designed to fully meet the EIA-232 standard while operating with a single 2.7 V to 3.6 V power supply. The devices feature an on-board charge pump dc-to-dc converter, eliminating the need for dual power supplies. This dc-to-dc converter contains a voltage tripler and a voltage inverter that internally generates positive and negative supplies from the input 3 V power supply. The dcto-dc converter operates in Green Idle mode, whereby the charge pump oscillator is gated on and off to maintain the output voltage at ±7.25 V under varying load conditions. This minimizes the power consumption and makes these products ideal for battery-powered portable devices. The ADM33xxE devices are suitable for operation in harsh electrical environments and contain ESD protection up to ±15 kV on their RS-232 lines (ADM3310E, ADM3311E, ADM3312E, and ADM3315E). The ADM3307E contains ESD protection up to ±15 kV on all I/O lines (CMOS, RS-232, EN, and SD). A shutdown facility that reduces the power consumption to 66 nW is also provided. While in shutdown, one receiver remains active (two receivers active with ADM3310E), thereby allowing monitoring of peripheral devices. This feature allows the device to be shut down until a peripheral device begins communication. The active receiver can alert the processor, which can then take the ADM33xxE device out of the shutdown mode. The ADM3307E contains five drivers and three receivers and is intended for mobile phone data lump cables and portable computing applications. The ADM3311E contains three drivers and five receivers and is intended for serial port applications on notebook/laptop computers. The ADM3310E is a low current version of the ADM3311E. This device also allows two receivers to be active in shutdown mode. The ADM3315E is a low current version of the ADM3312E, with a 22 kΩ receiver input resistance that reduces the drive requirements of the DTE. Its main applications are PDAs, palmtop computers, and mobile phone data lump cables. The ADM33xxE devices are fabricated using CMOS technology for minimal power consumption. All parts feature a high level of overvoltage protection and latch-up immunity. All ADM33xxE devices are available in a 32-lead 5 mm × 5 mm LFCSP_WQ and in a TSSOP (ADM3307E, ADM3310E, and ADM3311E in a 28-lead TSSOP; ADM3312E and ADM3315E in a 24-lead TSSOP). The ADM3311E also comes in a 28-lead SSOP. The ADM33xxE devices are ruggedized RS-232 line drivers/receivers that operate from a single supply of 2.7 V to 3.6 V. Step-up voltage converters coupled with level shifting transmitters and receivers allow RS-232 levels to be developed while operating from a single supply. Features include low power consumption, Green Idle operation, high transmission rates, and compatibility with the EU directive on electromagnetic compatibility. This EM compatibility directive includes protection against radiated and conducted interference, including high levels of electrostatic discharge. All RS-232 (and CMOS, SD, and EN for ADM3307E) inputs and outputs are protected against electrostatic discharges (up to ±15 kV). This ensures compliance with IEC 1000-4-2 requirements. These devices are ideally suited for operation in electrically harsh environments or where RS-232 cables are frequently being plugged/unplugged. They are also immune to high RF field strengths without special shielding precautions. Emissions are also controlled to within very strict limits. CMOS technology is used to keep the power dissipation to an absolute minimum, allowing maximum battery life in portable applications. The ADM3312E contains three drivers and three receivers and is intended for serial port applications, PDAs, mobile phone data lump cables, and other hand-held devices. Rev. I | Page 3 of 24 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet SPECIFICATIONS VCC = 2.7 V to 3.6 V, C1 to C5 = 0.1 µF. All specifications TMIN to TMAX, unless otherwise noted. Table 1 Parameter Operating Voltage Range VCC Power Supply Current ADM3307E Min 2.7 ADM3311E, ADM3312E ADM3310E, ADM3315E ADM3310E, ADM3311E, ADM3312E, ADM3315E Shutdown Supply Current Input Pull-Up Current Input Leakage Current, SD, EN Input Logic Threshold Low, VINL Input Logic Threshold High, VINH CMOS Output Voltage Low, VOL CMOS Output Voltage High, VOH CMOS Output Leakage Current ADM3307E ADM3310E, ADM3311E ADM3312E, ADM3315E Charge Pump Output Voltage, V+ ADM3307E, ADM3311E, ADM3312E Charge Pump Output Voltage, V− ADM3307E, ADM3311E, ADM3312E Charge Pump Output Voltage, V+ ADM3310E, ADM3315E Charge Pump Output Voltage, V− ADM3310E, ADM3315E EIA-232 Input Voltage Range EIA-232 Input Threshold Low EIA-232 Input Threshold High EIA-232 Input Hysteresis EIA-232 Input Resistance ADM3307E, ADM3310E, ADM3311E, ADM3312E ADM3315E Output Voltage Swing ADM3310E, ADM3315E ADM3307E, ADM3311E, ADM3312E Transmitter Output Resistance RS-232 Output Short-Circuit Current Typ 3.3 Max 3.6 Unit V Test Conditions/Comments 0.75 0.75 0.45 0.45 0.35 1.5 4.5 1 4.5 0.85 35 mA mA mA mA mA mA VCC = 3.0 V to 3.6 V; no load VCC = 2.7 V to 3.6 V; no load No load; VCC = 3.0 V to 3.6 V; TA = 0°C to 85°C No load; VCC = 2.7 V to 3.6 V; TA = − 40°C to +85°C VCC = 2.7 V to 3.6 V; No load RL = 3 kΩ to GND on all TOUTS 0.02 10 0.02 1 25 ±1 0.8 0.4 µA µA µA V V V V V TIN, EN, SHDN TIN, EN, SHDN; VCC = 2.7 V TIN, EN, SHDN IOUT = 1.6 mA IOUT = −200 µA µA µA EN = VCC, 0 V < ROUT < VCC EN = VCC, 0 V < ROUT < VCC +7.25 V No load −7.25 V No load +6.5 V No load −6.5 V No load 2.0 0.4 VCC − 0.6 0.04 0.05 −25 0.4 ±1 ±5 +25 V V V V 1.3 2.0 0.14 2.4 3 5 7 kΩ 14 22 31 kΩ ±5.0 ±6.4 ±5.5 ±5.5 ±5.0 V V V ±15 ±60 300 Rev. I | Page 4 of 24 TIN = GND Ω mA All transmitter outputs loaded with 3 kΩ to ground VCC = 3.0 V VCC = 2.7 V All transmitter outputs loaded with 3 kΩ to ground VCC = 0 V, VOUT = ±2 V Data Sheet Parameter Maximum Data Rate ADM3307E ADM3310E, ADM3311E, ADM3312E, ADM3315E Receiver Propagation Delay, TPHL, TPLH Receiver Output Enable Time, tER Receiver Output Disable Time, tDR Transmitter Propagation Delay, TPHL, TPLH Transition Region Slew Rate ESD PROTECTION (I/O PINS) 1 2 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Min Typ 250 460 250 720 920 460 3 0.3 0.17 100 300 500 18 ±15 ±15 ±8 Max 1 Measured at +3 V to −3 V or −3 V to +3 V. Includes CMOS I/O, SD, and EN for ADM3307E. Rev. I | Page 5 of 24 Unit Test Conditions/Comments kbps kbps kbps RL = 3 kΩ to 7 kΩ, CL = 50 pF to 1000 pF, VCC = 2.7 V RL = 3 kΩ to 7 kΩ, CL = 50 pF to 1000 pF, VCC = 3.0 V RL = 3 kΩ to 7 kΩ, CL = 50 pF to 1000 pF, VCC = 3.0 V µs µs ns ns ns V/µs kV kV kV CL = 150 pF CL = 150 pF; ADM3307E only RL = 3 kΩ, CL = 1000 pF RL = 3 kΩ, CL = 50 pF to 1000 pF 1 Human body model IEC 1000-4-2 air discharge IEC 1000-4-2 contact discharge 2 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 2 Parameter VCC V+ V− Input Voltages TIN RIN Output Voltages TOUT ROUT Short-Circuit Duration TOUT Thermal Impedance, θJA LFCSP_WQ (CP-32-7) TSSOP (RU-28) TSSOP (RU-24) SSOP (RS-28) Operating Temperature Range Industrial (A Version) Storage Temperature Range Lead Temperature (Soldering, 10 sec) ESD Rating (IEC 1000-4-2 Air) (RS-232 I/Os) ESD Rating (IEC 1000-4-2 Contact) (RS-232 I/Os) Rating −0.3 V to +4 V (VCC − 0.3 V) to +9 V +0.3 V to −9 V −0.3 V to +6 V ±30 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ±15 V −0.3 V to (VCC + 0.3 V) Continuous 32.5°C/W 68.0°C/W 68.0°C/W 76.0°C/W −40°C to +85°C −65°C to +150°C 300°C ±15 kV ±8 kV ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. I | Page 6 of 24 Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E PRODUCT SELECTION GUIDE Table 3. Product Selection Guide ICC Shutdown Max 1 1 µA RS-232 0.85 mA 1 µA RS-232 RS-232 RS-232 1 mA 1 mA 0.85 mA 1 µA 1 µA 1 µA Rx Speed 15 kV ESD 3 1 1 Mbps RS-232 CMOS, EN, and SD 3 5 2 460 kbps 3 3 3 5 3 3 1 1 1 460 kbps 460 kbps 460 kbps Supply Voltage Tx ADM3307E 2.7 V to 3.6 V 5 ADM3310E 2.7 V to 3.6 V ADM3311E ADM3312E ADM3315E 2.7 V to 3.6 V 2.7 V to 3.6 V 2.7 V to 3.6 V 1 ICC Max 1.5 mA No. Rx Active in SD Generic ICC shutdown is 20 nA typically. Rev. I | Page 7 of 24 Additional Features ±15 kV ESD protection, CMOS on RS-232, and CMOS I/Os including SD and EN pins 2 Rxs active in shutdown, Green Idle mode level 6 V, low power ADM3311E 22 kΩ Rx I/P resistance, Green Idle mode level 6 V, low power ADM3312E ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet C3– 24 V– SD 6 ADM3307E TOP VIEW (Not to Scale) 23 GND T1IN 7 22 T1OUT 21 T2OUT 20 T3OUT T4IN 10 19 T4OUT T5IN 11 18 T5OUT R1OUT 12 17 R1IN R2OUT 13 16 R2IN R3OUT 14 15 R3IN 32 31 30 29 28 27 26 25 V+ 1 ADM3310E/ ADM3311E C1– SD NC T1OUT T2OUT T3OUT R1IN R2IN 27 GND VCC 3 26 C3– C2– 4 02915-006 R3OUT R4OUT R5OUT NC NC R5IN R4IN R3IN 25 V– C1+ 6 ADM3310E/ ADM3311E T1IN 7 TOP VIEW (Not to Scale) EN 5 9 10 11 12 13 14 15 16 TOP VIEW (Not to Scale) 24 23 22 21 20 19 18 17 28 C3+ C2+ 2 24 C1– 23 SD 22 T1OUT T2IN 8 21 T2OUT T3IN 9 20 T3OUT R1OUT 10 19 R1IN R2OUT 11 18 R2IN R3OUT 12 17 R3IN R4OUT 13 16 R4IN R5OUT 14 15 R5IN C2– VCC C2+ V+ C3+ GND C3– V– V+ 1 24 C3+ 32 31 30 29 28 27 26 25 Figure 7. SSOP/TSSOP Pin Configuration C2+ 2 23 GND VCC 3 22 C3– C2 4 21 V– 20 C1– ADM3312E/ ADM3315E EN 5 ADM3312E/ ADM3315E C1+ 6 TOP VIEW (Not to Scale) 19 SD T1IN 7 18 T1OUT T2IN 8 17 T2OUT T3IN 9 16 T3OUT R1OUT 10 15 R1IN R2OUT 11 14 R2IN R3OUT 12 13 R3IN NOTES 1. THE EXPOSED PAD IS CONNECTED TO GROUND. 2. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 02915-008 9 10 11 12 13 14 15 16 C1– SD NC T1OUT T2OUT T3OUT NC NC R1OUT R2OUT R3OUT NC NC R3IN R2IN R1IN TOP VIEW (Not to Scale) 24 23 22 21 20 19 18 17 02915-007 C2– VCC C2+ V+ C3+ GND C3– V– Figure 5. SSOP/TSSOP Pin Configuration Figure 6. LFCSP_WQ Pin Configuration 1 2 3 4 5 6 7 8 25 T2IN 8 NOTES 1. THE EXPOSED PAD IS CONNECTED TO GROUND. 2. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. EN C1+ NC T1IN T2IN T3IN NC NC C1+ C1– 4 EN 5 Figure 4. ADM3307E LFCSP_WQ Pin Configuration 1 2 3 4 5 6 7 8 26 T3IN 9 NOTES 1. THE EXPOSED PAD IS CONNECTED TO GROUND. 2. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. EN C1+ NC T1IN T2IN T3IN R1OUT R2OUT C3+ C2– 3 9 10 11 12 13 14 15 16 TOP VIEW (Not to Scale) V– GND GND T1OUT T2OUT T3OUT T4OUT T5OUT C2+ 27 Figure 8. LFCSP_WQ Pin Configuration 02915-009 ADM3307E 24 23 22 21 20 19 18 17 02915-004 1 2 3 4 5 6 7 8 28 NC R1OUT R2OUT R3OUT NC R3IN R2IN R1IN EN SD NC T1IN T2IN T3IN T4IN T5IN V+ 1 VCC 2 02915-005 32 31 30 29 28 27 26 25 C1– C2– VCC V+ C2+ C3+ C1+ C3– PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 9. SSOP/TSSOP Pin Configuration Rev. I | Page 8 of 24 Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Table 4. Pin Function Descriptions Mnemonic VCC V+ V− GND C1+, C1− C2+, C2− C3+, C3− TIN TOUT RIN ROUT EN SD NC Function Power Supply Input 2.7 V to 3.6 V. Internally Generated Positive Supply, 7.25 V (6.5 V Nominal for ADM3310E, ADM3315E). Capacitor C4 is connected between VCC and V+. Internally Generated Positive Supply, −7.25 V (−6.5 V Nominal for ADM3310E, ADM3315E). Capacitor C5 is connected between GND and V−. Ground Pin. Must be connected to 0 V. External Capacitor 1 is connected between these pins. A 0.1 µF capacitor is recommended, but larger capacitors up to 1 µF can be used. External Capacitor 2 is connected between these pins. A 0.1 µF capacitor is recommended, but larger capacitors up to 1 µF can be used. External Capacitor 3 is connected between these pins. A 0.1 µF capacitor is recommended, but larger capacitors up to 1 µF can be used. Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is connected on each input. Transmitter (Driver) Outputs. Typically ±5.5 V (±6.4 V for ADM3311E and ADM3312E). Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor (22 kΩ for ADM3315E) to GND is connected on each of these inputs. Receiver Outputs. These are TTL/CMOS levels. Receiver Enable. A high level three-states all the receiver outputs. Shutdown Control. A high level disables the charge pump and reduces the quiescent current to less than 1 µA. All transmitters and most receivers are disabled. One receiver remains active in shutdown (two receivers are active in shutdown for the ADM3310E). For ADM3307E, ROUT3 is active in shutdown. For ADM3310E, ROUT4 and ROUT5 are active in shutdown. For ADM3311E, ROUT5 is active in shutdown. For ADM3312E, ROUT3 is active in shutdown. For ADM3315E, ROUT3 is active in shutdown. No Connect. Table 6. ADM3310E Truth Table Table 5. ADM3307E Truth Table SD 0 0 1 1 EN 0 1 0 1 Status TOUT1–5 ROUT1–2 ROUT3 SD Normal Operation Normal Operation Shutdown Shutdown Enabled Enabled Disabled Disabled Enabled Disabled Disabled Disabled Enabled Disabled Enabled Disabled 0 0 EN 0 1 1 1 0 1 Status TOUT1–3 ROUT1–3 ROUT4–5 Normal Operation Receivers Disabled Shutdown Shutdown Enabled Enabled Enabled Disabled Enabled Disabled Disabled Disabled Disabled Disabled Enabled Disabled Table 8. ADM3312E/ADM3315E Truth Table Table 7. ADM3311 Truth Table SD EN Status TOUT1–3 ROUT1–4 ROUT5 SD EN Status TOUT1–3 ROUT1–2 ROUT3 0 0 0 1 Enabled Enabled Enabled Disabled Enabled Disabled 1 1 0 1 Normal Operation Receivers Disabled Shutdown Shutdown Disabled Disabled Disabled Disabled Enabled Disabled 0 0 1 1 0 1 0 1 Normal Operation Normal Operation Shutdown Shutdown Enabled Enabled Disabled Disabled Enabled Disabled Disabled Disabled Enabled Disabled Enabled Disabled Rev. I | Page 9 of 24 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 9 TOUTHIGH 7 Tx O/P (V) 5 SD V+ 3 1 –1 –3 –5 02915-010 –7 0 Figure 10. Charge Pump V+ Exiting Shutdown 200 400 600 LOAD CAPACITANCE (pF) 800 1000 02915-013 TOUTLOW Figure 13. Transmitter Output vs. Load Capacitance (VCC = 3.3 V, Data Rate = 460 kbps) 40 35 SLEW RATE (V/µs) 30 SD 25 20 15 10 V– 0 0 500 1000 1500 LOAD CAPACITANCE (pF) 2000 2500 02915-014 02915-011 5 Figure 14. Slew Rate vs. Load Capacitance (VCC = 3.3 V) Figure 11. Charge Pump V− Exiting Shutdown 25 9 V+ 7 20 5 ICC (mA) 1 –1 15 10 –3 –5 5 –9 0 5 10 LOAD CURRENT (mA) 15 20 0 0 200 800 400 600 LOAD CAPACITANCE (pF) 1000 1200 Figure 15. Supply Current vs. Load Capacitance (RL = 3 kΩ) (VCC = 3.3 V, Data Rate = 460 kbps) Figure 12. Charge Pump V+/ V− vs. Load Current (VCC = 3.3 V) Rev. I | Page 10 of 24 02915-015 V– –7 02915-012 V+/V– (V) 3 Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E 25 ICC (mA) 20 15 SD 10 5 0 200 400 600 800 LOAD CAPACITANCE (pF) 1200 1000 02915-019 0 02915-016 TX O/P LOW Figure 16. Supply Current vs. Load Capacitance (RL = Infinite) (VCC = 3.3 V, Data Rate = 460 kbps) Figure 19. Transmitter Output (Low) Exiting Shutdown 10 30 8 28 460kbps 6 TxOUT VOLTAGE (V) 24 250kbps 22 20 125kbps 18 16 4 2 0 –2 –4 –6 14 –10 0 200 400 600 LOAD CAPACITANCE (pF) 800 1000 0 02915-017 10 Figure 17. Supply Current vs. Load Capacitance (VCC = 3.3 V, RL = 5 kΩ) 200 400 600 LOAD CAPACITANCE (pF) 800 1000 02915-020 –8 12 Figure 20. Transmitter Output Voltage High/Low vs. Load Capacitance (VCC = 3.3 V, CLK = 1 Mb/s, RL = 5 kΩ, ADM3307E) OSCILLATOR FREQUENCY (kHz) 300 SD 02915-018 TX O/P HIGH Figure 18. Transmitter Output (High) Exiting Shutdown 250 200 150 100 50 0 0 5 10 LOAD CURRENT (mA) 15 Figure 21. Oscillator Frequency vs. Load Current Rev. I | Page 11 of 24 20 02915-021 SUPPLY CURRENT (mA) 26 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet 25 600 500 20 ICC (mA) 300 15 10 200 0 2.6 2.8 3.0 3.2 VCC (V) 3.4 3.6 Figure 22. ICC vs. VCC (Unloaded) 0 2.6 2.8 3.0 3.2 VCC (V) 3.4 Figure 23. ICC vs. VCC (RL = 3 kΩ) Rev. I | Page 12 of 24 3.6 02915-023 5 100 02915-022 ICC (µA) 400 Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E CIRCUIT DESCRIPTION During the oscillator high phase, S10 and S11 are open, while S8 and S9 are closed. C3 is charged to 3VCC from the output of the voltage tripler over several cycles. During the oscillator low phase, S8 and S9 are open, while S10 and S11 are closed. C3 is connected across C5, whose positive terminal is grounded and whose negative terminal is the V− output. Over several cycles, C5 charges to −3 VCC. The internal circuitry consists mainly of four sections. These include the following: A charge pump voltage converter 3.3 V logic to EIA-232 transmitters EIA-232 to 3.3 V logic receivers The V+ and V− supplies may also be used to power external circuitry if the current requirements are small. See Figure 12 in the Typical Performance Characteristics section. Transient protection circuit on all I/O lines Charge Pump DC-to-DC Voltage Converter The charge pump voltage converter consists of a 250 kHz (300 kHz for ADM3307E) oscillator and a switching matrix. The converter generates a ±9 V supply from the input 3.0 V level. This is done in two stages using a switched capacitor technique. First, the 3.0 V input supply is tripled to 9.0 V using Capacitor C4 as the charge storage element. The +9.0 V level is then inverted to generate −9.0 V using C5 as the storage element. However, it should be noted that, unlike other charge pump dcto-dc converters, the charge pump on the ADM3307E does not run open-loop. The output voltage is regulated to ±7.25 V (or ±6.5 V for the ADM3310E and ADM3315E) by the Green Idle circuit and never reaches ±9 V in practice. This saves power as well as maintains a more constant output voltage. S3 S1 VCC S2 C1 + S5 C2 S4 + C4 S7 + 02915-024 VCC INTERNAL OSCILLATOR Figure 24. Charge Pump Voltage Tripler The tripler operates in two phases. During the oscillator low phase, S1 and S2 are closed and C1 charges rapidly to VCC. S3, S4, and S5 are open, and S6 and S7 are closed. During the oscillator high phase, S1 and S2 are open, and S3 and S4 are closed, so the voltage at the output of S3 is 2VCC. This voltage is used to charge C2. In the absence of any discharge current, C2 charges up to 2VCC after several cycles. During the oscillator high phase, as previously mentioned, S6 and S7 are closed, so the voltage at the output of S6 is 3VCC. This voltage is then used to charge C3. The voltage inverter is illustrated in Figure 25. Green Idle works by monitoring the output voltage and maintaining it at a constant value of around 7 V1. When the voltage rises above 7.25 V2 the oscillator is turned off. When the voltage falls below 7 V1, the oscillator is turned on and a burst of charging pulses is sent to the reservoir capacitor. When the oscillator is turned off, the power consumption of the charge pump is virtually zero, so the average current drain under light load conditions is greatly reduced. 1 2 For ADM3310E and ADM3315E, replace with 6.5 V. For ADM3310E and ADM3315E, replace with 6.25 V. C3 + S11 C5 + GND V– = –(V+) INTERNAL OSCILLATOR 02915-025 GND Charge pump type dc-to-dc converters used in RS-232 line drivers normally operate open-loop, that is, the output voltage is not regulated in any way. Under light load conditions, the output voltage is close to twice the supply voltage for a doubler and three times the supply voltage for a tripler, with very little ripple. As the load current increases, the output voltage falls and the ripple voltage increases. S10 S8 V+ S9 How Does it Work? VCC GND FROM VOLTAGE TRIPLER Green Idle is a method of minimizing power consumption under idle (no transmit) conditions while still maintaining the ability to transmit data instantly. Even under no-load conditions, the oscillator and charge pump operate at a very high frequency with consequent switching losses and current drain. V+ = 3VCC S6 What Is Green Idle? Figure 25. Charge Pump Voltage Inverter Rev. I | Page 13 of 24 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E A block diagram of the Green Idle circuit is shown in Figure 26. Both V+ and V− are monitored and compared to a reference voltage derived from an on-chip band gap device. If either V+ or V− fall below 7 V1, the oscillator starts up until the voltage rises above 7.25 V2. BAND GAP VOLTAGE REFERENCE V+ VOLTAGE COMPARATOR WITH 250mV HYSTERESIS TRANSCEIVERS V– 02915-026 START/STOP V– VOLTAGE COMPARATOR WITH 250mV HYSTERESIS Under high load conditions, the oscillator is on continuously if the charge pump output cannot reach 7.25 V2. Shutdown mode minimizes power consumption by shutting down the charge pump altogether. In this mode, the switches in the voltage tripler are configured so V+ is connected directly to VCC. V− is zero because there is no charge pump operation to charge C5. This means there is a delay when coming out of shutdown mode before V+ and V− achieve their normal operating voltages. Green Idle maintains the transmitter supply voltages under transmitter idle conditions so this delay does not occur. V+ CHARGE PUMP Under medium load conditions, it may take several cycles for C2 to charge up to 7.25 V2. The average frequency of the oscillator is higher because there are more pulses in each burst and the bursts of pulses are closer together and more frequent. Green Idle Vs. Shutdown START/STOP SHUTDOWN Data Sheet Doesn’t Green Idle Increase Supply Voltage Ripple? Figure 26. Block Diagram of Green Idle Circuit The operation of Green Idle for V+ under various load conditions is illustrated in Figure 27. Under light load conditions, C1 is maintained in a charged condition, and only a single oscillator pulse is required to charge up C2. Under these conditions, V+ may actually overshoot 7.25 V2 slightly. OVERSHOOT 7.25V 1 V+ 7V2 The ripple on the output voltage of a charge pump operating in open-loop depends on three factors: the oscillator frequency, the value of the reservoir capacitor, and the load current. The value of the reservoir capacitor is fixed. Increasing the oscillator frequency decreases the ripple voltage; decreasing the oscillator frequency increases it. Increasing the load current increases the ripple voltage; decreasing the load current decreases it. The ripple voltage at light loads is naturally lower than that for high load currents. Using Green Idle, the ripple voltage is determined by the high and low thresholds of the Green Idle circuit. These are nominally 7 V1 and 7.25 V2, so the ripple is 250 mV under most load conditions. With very light load conditions, there may be some overshoot above 7.25 V2, so the ripple is slightly greater. Under heavy load conditions where the output never reaches 7.25 V2, the Green Idle circuit is inoperative and the ripple voltage is determined by the load current, the same as in a normal charge pump. OSC LIGHT LOAD 7.25V 1 V+ 7V2 OSC MEDIUM LOAD 7.25V 1 V+ What about Electromagnetic Compatibility? 7V2 OSC 1FOR 2FOR ADM3310E AND ADM3315E REPLACE WITH 6.5V. ADM3310E AND ADM3315E REPLACE WITH 6.25V. Figure 27. Operation of Green Idle under Various Load Conditions 02915-027 HEAVY LOAD Green Idle does not operate with a constant oscillator frequency. As a result, the frequency and spectrum of the oscillator signal vary with load. Any radiated and conducted emissions also vary accordingly. Like other Analog Devices RS-232 transceiver products, the ADM33xxE devices feature slew rate limiting and other techniques to minimize radiated and conducted emissions. 1 2 For ADM3310E and ADM3315E, replace with 6.5 V. For ADM3310E and ADM3315E, replace with 6.25 V. Rev. I | Page 14 of 24 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E 3V Transmitter (Driver) Section EN INPUT The drivers convert 3.3 V logic input levels into EIA-232 output levels. With VCC = 3.0 V and driving an EIA-232 load, the output voltage swing is typically ±6.4 V (or ±5.5 V for ADM3310E and ADM3315E). Unused inputs may be left unconnected, because an internal 400 kV pull-up resistor pulls them high forcing the outputs into a low state. The input pull-up resistors typically source 8 mA when grounded, so unused inputs should either be connected to VCC or left unconnected in order to minimize power consumption. Receiver Section The receivers are inverting level shifters that accept RS-232 input levels and translate them into 3.3 V logic output levels. The inputs have internal 5 kΩ pull-down resistors (22 kΩ for the ADM3310E) to ground and are also protected against overvoltages of up to ±30 V. Unconnected inputs are pulled to 0 V by the internal 5 kΩ (or 22 kΩ for the ADM3315E) pulldown resistor. This, therefore, results in a Logic 1 output level for unconnected inputs or for inputs connected to GND. The receivers have Schmitt trigger inputs with a hysteresis level of 0.14 V. This ensures error-free reception for both noisy inputs and for inputs with slow transition times. ENABLE AND SHUTDOWN The enable function is intended to facilitate data bus connections where it is desirable to three-state the receiver outputs. In the disabled mode, all receiver outputs are placed in a high impedance state. The shutdown function is intended to shut the device down, thereby minimizing the quiescent current. In shutdown, all transmitters are disabled. All receivers are shut down, except for Receiver R3 (ADM3307E, ADM3312E, and ADM3315E), Receiver R5 (ADM3311E), and Receiver R4 and Receiver R5 (ADM3310E). Note that disabled transmitters are not three-stated in shutdown, so it is not permitted to connect multiple (RS-232) driver outputs together. The shutdown feature is very useful in battery-operated systems because it reduces the power consumption to 66 nW. During shutdown, the charge pump is also disabled. When exiting shutdown, the charge pump is restarted and it takes approximately 100 μs for it to reach its steady-state operating conditions. 3V EN INPUT 0V tDR VOH – 0.1V RECEIVER OUTPUT VOL VOL + 0.1V 02915-028 VOH 0V VOH RECEIVER OUTPUT VOL tER 3V 0.4V 02915-029 Data Sheet Figure 29. Receiver Enable Timing High Baud Rate The ADM33xxE features high slew rates, permitting data transmission at rates well in excess of the EIA/RS-232E specifications. RS-232 voltage levels are maintained at data rates up to 230 kbps (460 kbps for ADM3307E) under worst-case loading conditions. This allows for high speed data links between two terminals. LAYOUT AND SUPPLY DECOUPLING Because of the high frequencies at which the ADM33xxE oscillator operates, particular care should be taken with printed circuit board layout, with all traces being as short as possible and C1 to C3 being connected as close to the device as possible. The use of a ground plane under and around the device is also highly recommended. When the oscillator starts up during Green Idle operation, large current pulses are taken from VCC. For this reason, VCC should be decoupled with a parallel combination of 10 μF tantalum and 0.1 μF ceramic capacitors, mounted as close to the VCC pin as possible. Capacitor C1 to Capacitor C3 can have values between 0.1 μF and 1 μF. Larger values give lower ripple. These capacitors can be either electrolytic capacitors chosen for low equivalent series resistance (ESR) or nonpolarized types, but the use of ceramic types is highly recommended. If polarized electrolytic capacitors are used, polarity must be observed (as shown by C1+). ESD/EFT TRANSIENT PROTECTION SCHEME The ADM33xxE uses protective clamping structures on all inputs and outputs that clamp the voltage to a safe level and dissipate the energy present in ESD (electrostatic) and EFT (electrical fast transients) discharges. A simplified schematic of the protection structure is shown in Figure 30 and Figure 31 (see Figure 32 and Figure 33 for ADM3307E protection structure). Each input and output contains two back-to-back high speed clamping diodes. During normal operation with maximum RS-232 signal levels, the diodes have no effect as one or the other is reverse biased depending on the polarity of the signal. If, however, the voltage exceeds about ±50 V, reverse breakdown occurs and the voltage is clamped at this level. The diodes are large p-n junctions designed to handle the instantaneous current surge that can exceed several amperes. Figure 28. Receiver Disable Timing Rev. I | Page 15 of 24 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E The transmitter outputs and receiver inputs have a similar protection structure. The receiver inputs can also dissipate some of the energy through the internal 5 kΩ (or 22 kΩ for the ADM3310E) resistor to GND as well as through the protection diodes. RECEIVER INPUT Rx D1 RIN 02915-030 D2 Figure 30. Receiver Input Protection Scheme TRANSMITTER OUTPUT Tx D1 02915-031 D2 Figure 31. Transmitter Output Protection Scheme The ADM3307E protection scheme is slightly different (see Figure 32 and Figure 33). The receiver inputs, transmitter inputs, and transmitter outputs contain two back-to-back high speed clamping diodes. The receiver outputs (CMOS outputs), the SD and EN pins, contain a single reverse biased high speed clamping diode. Under normal operation with maximum CMOS signal levels, the receiver output, SD, and EN protection diodes have no effect because they are reversed biased. If, however, the voltage exceeds about 15 V, reverse breakdown occurs and the voltage is clamped at this level. If the voltage reaches −0.7 V, the diode is forward biased and the voltage is clamped at this level. The receiver inputs can also dissipate some of the energy through the internal 5 kΩ resistor to GND as well as through the protection diodes. RECEIVER INPUT RIN D1 02915-032 D1 D4 D2 02915-033 TRANSMITTER INPUT Tx Although very little energy is contained within an ESD pulse, the extremely fast rise time coupled with high voltages can cause failures in unprotected semiconductors. Catastrophic destruction can occur immediately as a result of arcing or heating. Even if catastrophic failure does not occur immediately, the device can suffer from parametric degradation that can result in degraded performance. The cumulative effects of continuous exposure can eventually lead to complete failure. I/O lines are particularly vulnerable to ESD damage. Simply touching or plugging in an I/O cable can result in a static discharge that can damage or completely destroy the interface product connected to the I/O port. Traditional ESD test methods, such as the MIL-STD-883B method 3015.7, do not fully test a product’s susceptibility to this type of discharge. This test was intended to test a product’s susceptibility to ESD damage during handling. Each pin is tested with respect to all other pins. There are some important differences between the traditional test and the IEC test. • The IEC test is carried out while power is applied to the device. Figure 32. ADM3307E Receiver Input Protection Scheme D3 IEC 1000-4-2 (previously 801-2) specifies compliance testing using two coupling methods, contact discharge and air-gap discharge. Contact discharge calls for a direct connection to the unit being tested. Airgap discharge uses a higher test voltage but does not make direct contact with the unit under testing. With air discharge, the discharge gun is moved toward the unit under testing, which develops an arc across the air gap, thus the term air discharge. This method is influenced by humidity, temperature, barometric pressure, distance, and rate of closure of the discharge gun. The contact discharge method, while less realistic, is more repeatable and is gaining acceptance in preference to the air-gap method. • The current rise time is significantly faster in the IEC test. D3 D2 TRANSMITTER OUTPUT ESD TESTING (IEC 1000-4-2) • The IEC test is much more stringent in terms of discharge energy. The peak current injected is over four times greater. RECEIVER OUTPUT Rx Data Sheet It is possible that the ESD discharge could induce latch-up in the device under test. This test, therefore, is more representative of a real world I/O discharge where the equipment is operating normally with power applied. For maximum peace of mind, however, both tests should be performed, ensuring maximum protection both during handling and later during field service. Figure 33. ADM3307E Transmitter Output Protection Scheme The protection structures achieve ESD protection up to ±15 kV on all RS-232 I/O lines (and all CMOS lines, including SD and EN for the ADM3307E). For methods used to test the protection scheme, see the ESD Testing (IEC 1000-4-2) section. Rev. I | Page 16 of 24 Data Sheet R1 R2 DEVICE UNDER TEST C1 ESD TEST METHOD The ADM33xxE devices are tested using both of the previously mentioned test methods. All pins are tested with respect to all other pins as per the Human Body Model, ESD Assoc. Std. 55.1 specification. In addition, all I/O pins are tested as per the IEC 1000-4-2 test specification. The products were tested under the following conditions: R2 C1 HUMAN BODY MODEL ESD ASSOC. STD 55.1 1.5kV 100pF IEC1000-4-2 330V 150pF 02915-034 HIGH VOLTAGE GENERATOR ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Power-On—Normal Operation Power-Off Figure 34. ESD Test Standards There are four levels of compliance defined by IEC 1000-4-2. The ADM33xxE parts meet the most stringent compliance level for both contact and air-gap discharge. This means the products are able to withstand contact discharges in excess of 8 kV and airgap discharges in excess of 15 kV. 100 IPEAK (%) 90 36.8 Table 9. IEC 1000-4-2 Compliance Levels Level 1 2 3 4 tRL tDL 02915-035 10 TIME t Figure 35. Human Body Model ESD Current Waveform 100 IPEAK (%) 90 TIME t 0.1ns TO 1ns 30ns 60ns 02915-036 10 Figure 36. IEC1000-4-2 ESD Current Waveform Rev. I | Page 17 of 24 Contact Discharge (kV) 2 4 6 8 Air Discharge (kV) 2 4 8 15 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet OUTLINE DIMENSIONS 5.10 5.00 SQ 4.90 PIN 1 INDICATOR 0.30 0.25 0.18 32 25 0.50 BSC 17 0.80 0.75 0.70 8 16 9 BOTTOM VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 0.25 MIN 112408-A TOP VIEW 3.25 3.10 SQ 2.95 EXPOSED PAD 0.50 0.40 0.30 PIN 1 INDICATOR 1 24 COMPLIANT TO JEDEC STANDARDS MO-220-WHHD. Figure 37. 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 5 mm × 5 mm Body, Very Very Thin Quad (CP-32-7) Dimensions shown in millimeters 10.50 10.20 9.90 15 28 5.60 5.30 5.00 1 8.20 7.80 7.40 14 0.65 BSC 0.38 0.22 SEATING PLANE 8° 4° 0° COMPLIANT TO JEDEC STANDARDS MO-150-AH Figure 38. 28-Lead Shrink Small Outline Package [SSOP] (RS-28) Dimensions shown in millimeters Rev. I | Page 18 of 24 0.95 0.75 0.55 060106-A 0.05 MIN COPLANARITY 0.10 0.25 0.09 1.85 1.75 1.65 2.00 MAX Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E 7.90 7.80 7.70 24 13 4.50 4.40 4.30 6.40 BSC 1 12 PIN 1 0.65 BSC 0.15 0.05 0.30 0.19 1.20 MAX SEATING PLANE 0.20 0.09 0.75 0.60 0.45 8° 0° 0.10 COPLANARITY COMPLIANT TO JEDEC STANDARDS MO-153-AD Figure 39. 24-Lead Thin Shrink Small Outline Package [TSSOP] (RU-24) Dimensions shown in millimeters 9.80 9.70 9.60 28 15 4.50 4.40 4.30 6.40 BSC 1 14 PIN 1 0.65 BSC 0.15 0.05 COPLANARITY 0.10 0.30 0.19 1.20 MAX SEATING PLANE 0.20 0.09 8° 0° 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153-AE Figure 40. 28-Lead Thin Shrink Small Outline Package [TSSOP] (RU-28) Dimensions shown in millimeters Rev. I | Page 19 of 24 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E Data Sheet ORDERING GUIDE Model 1, 2 ADM3307EARU ADM3307EARU-REEL7 ADM3307EARUZ ADM3307EARUZ-REEL ADM3307EARUZ-REEL7 ADM3307EACPZ ADM3307EACPZ-REEL ADM3307EACPZ-REEL7 ADM3307EWARUZ-RL7 ADM3310EARU ADM3310EARUZ ADM3310EARUZ-REEL ADM3310EARUZ-REEL7 ADM3310EACPZ ADM3310EACPZ-REEL ADM3310EACPZ-REEL7 ADM3311EARS ADM3311EARS-REEL ADM3311EARS-REEL7 ADM3311EARSZ ADM3311EARSZ-REEL ADM3311EARSZ-REEL7 ADM3311EARU ADM3311EARU-REEL ADM3311EARU-REEL7 ADM3311EARUZ ADM3311EARUZ-REEL ADM3311EARUZ-REEL7 ADM3311EACPZ ADM3311EACPZ-REEL ADM3311EACPZ-REEL7 ADM3312EARU ADM3312EARU-REEL7 ADM3312EARUZ ADM3312EARUZ-REEL ADM3312EARUZ-REEL7 ADM3312EACPZ ADM3312EACPZ-REEL ADM3312EACPZ-REEL7 ADM3315EARU ADM3315EARU-REEL ADM3315EARUZ ADM3315EARUZ-REEL ADM3315EARUZ-REEL7 ADM3315EACPZ ADM3315EACPZ-REEL ADM3315EACPZ-REEL7 1 2 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 28-Lead Thin Shrink Small Outline [ TSSOP] 28-Lead 7”Tape and Reel 28-Lead Thin Shrink Small Outline [ TSSOP] 28-Lead 13”Tape and Reel 28-Lead 7”Tape and Reel 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 32-Lead LFCSP_WQ 13”Tape and Reel 32-Lead LFCSP_WQ 7”Tape and Reel 28-Lead 7”Tape and Reel 28-Lead Thin Shrink Small Outline [ TSSOP] 28-Lead Thin Shrink Small Outline [TSSOP] 28-Lead TSSOP 13” Tape and Reel 28-Lead TSSOP 7” Tape and Reel 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 32-Lead LFCSP_WQ 13”Tape and Reel 32-Lead LFCSP_WQ 7” Tape and Reel 28-Lead Shrink Small Outline [SSOP] 28-Lead SSOP 13”Tape and Reel 28-Lead SSOP 7”Tape and Reel 28-Lead Shrink Small Outline [SSOP] 28-Lead SSOP 13”Tape and Reel 28-Lead SSOP 7”Tape and Reel 28-Lead Thin Shrink Small Outline [ TSSOP] 28-Lead TSSOP 13”Tape and Reel 28-Lead TSSOP 7”Tape and Reel 28-Lead Thin Shrink Small Outline [ TSSOP] 28-Lead TSSOP 13”Tape and Reel 28-Lead TSSOP 7” Tape and Reel 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 32-Lead LFCSP_WQ 13” Tape and Reel 32-Lead LFCSP_WQ 7” Tape and Reel 24-Lead Thin Shrink Small Outline [ TSSOP] 24-Lead TSSOP 7” Tape and Reel 24-Lead Thin Shrink Small Outline [TSSOP] 24-Lead TSSOP 13”Tape and Reel 24-Lead TSSOP 7” Tape and Reel 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 32-Lead LFCSP_WQ 13” Tape and Reel 32-Lead LFCSP_WQ 7” Tape and Reel 24-Lead Thin Shrink Small Outline [TSSOP] 24-Lead TSSOP 13” Tape and Reel 24-Lead Thin Shrink Small Outline [TSSOP] 24-Lead TSSOP 13” Tape and Reel 24-Lead TSSOP 7” Tape and Reel 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 32-Lead LFCSP_WQ 13” Tape and Reel 32-Lead LFCSP_WQ 7” Tape and Reel Z = RoHS Compliant Part. W = Qualified for Automotive Applications. Rev. I | Page 20 of 24 Package Option RU-28 RU-28 RU-28 RU-28 RU-28 CP-32-7 CP-32-7 CP-32-7 RU-28 RU-28 RU-28 RU-28 RU-28 CP-32-7 CP-32-7 CP-32-7 RS-28 RS-28 RS-28 RS-28 RS-28 RS-28 RU-28 RU-28 RU-28 RU-28 RU-28 RU-28 CP-32-7 CP-32-7 CP-32-7 RU-24 RU-24 RU-24 RU-24 RU-24 CP-32-7 CP-32-7 CP-32-7 RU-24 RU-24 RU-24 RU-24 RU-24 CP-32-7 CP-32-7 CP-32-7 Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E AUTOMOTIVE PRODUCTS The ADM3307EW model is available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that this automotive model may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for this model. Rev. I | Page 21 of 24 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E NOTES Rev. I | Page 22 of 24 Data Sheet Data Sheet ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E NOTES Rev. I | Page 23 of 24 ADM3307E/ADM3310E/ADM3311E/ADM3312E/ADM3315E NOTES ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02915-0-3/13(I) Rev. I | Page 24 of 24 Data Sheet