LAMBDA ADVANCED ANALOG INC. λ PRELIMINARY AHV2800 Series Hybrid - High Reliability DC/DC Converters DESCRIPTION The AHV series of DC/DC converters are designed to replace the AHE/ATO family of converters in applications requiring compliance to MIL-STD-704A through E, in particular the input surge requirement of 80 volts specified in MIL-STD-704A. The converters are designed to withstand transient input voltage of 80 volts. No input voltage or output power derating is necessary over the full military temperature range. These converters are packaged in an extremely rugged, low profile package that meets all requirements of MIL-STD-883 and MIL-PRF-38534. Parallel seam weld sealing and the use of ceramic pin feedthru seals assure long term hermeticity after exposure to extended temperature cycling. The basic circuit is a push-pull forward topology using power MOSFET switches. The nominal switching frequency is 500 KHz. A unique current injection circuit assures current balancing in the power switches. All AHV series converters use a single stage LC input filter to attenuate input ripple current. A low power 11.5 volt series regulator provides power to an epitaxial CMOS custom pulse width modulator integrated circuit. This single integrated circuit provides all PWM primary circuit functions. Power is transferred from primary to secondary through a ferrite core power transformer. An error voltage signal is generated by comparing a highly stable reference voltage with the converter output voltage and drives the PWM through a unique wideband magnetic feedback circuit. This proprietary feedback circuit provides an extremely wide bandwidth, high gain control loop, with high phase margin. The feedback control loop gain is insensitive to temperature, radiation, aging, and variations in manufacturing. The transfer function of the feedback circuit is a function of the feedback transformer turns ratio which cannot change when subjected to enviromental extremes. Manufactured in a facility fully qualified to MIL-PRF38534, these converters are available in four screening grades to satisfy a wide range of requirements. The CH grade is fully compliant to the requirements of MIL-PRF-38534 for class H. The HB grade is processed and screened to the class H requirement, but may not necessarily meet all of the other MIL-PRF-38534 requirements, e.g., element evaluation and Periodic Inspection (P.I.) not required. Both grades are tested to meet the complete group "A" test specification over the full military temperature range without output power deration. Two grades with more limited screening are also available for use in less demanding applications. Variations in electrical, mechanical and screening can be accommodated. Contact Lambda Advanced Analog for special requirements. FEATURES n 80 Transient (100 msec max.) Absolute Maximum Input n 50 VDC Absolute Maximum Input (Continuous) n 16-40 VDC Input Range n Single, Dual, and Triple Outputs n 15 Watt Output Power (No Temperature Derating) n Low Input/Output Noise n Full Military Temperature Range n Wideband PWM Control Loop n Magnetic Feedback n Low Profile Hermetic Package (.405”) n Short Circuit and Overload Protection n Constant Switching Frequency (500 KHz) n True Hermetic Package (Parallel Seam Welded, Ceramic Pin Feedthru SPECIFICATIONS (SINGLE OUTPUT MODELS) TCASE = -55°C to +125°C, VIN = +28 V ±5% unless otherwise specified ABSOLUTE MAXIMUM RATINGS Input Voltage Power Output Soldering Temperature Range -0.5 V to 50 VDC (Continuous) 80 V (100ms) Internally limited, 17.5W typical 300°C for 10 seconds (1 pin at a time) Operating -55°C to 135°C case9 Storage -65°C to +135°C Conditions -55°C - Tc - +125°C, VIN = 28 VDC TestSymbol ±5%, CL=0, unless otherwise specified STATIC CHARACTERISTICS OUTPUT VOUT Voltage Current IOUT Ripple Voltage 1 VRIP Power REGULATION Line Load POUT Subgroups VIN = 16, 28, and 40 VDC IOUT = 0 VIN = 16, 28, and 40 VDC VIN = 16, 28, and 40 VDC BW = DC to 1 MHz VIN = 16, 28, and 40 VDC Group A Min 1 2,3 1,2,3 1,2,3 1,2,3 AHV2805S Max Min 4.95 4.90 0.0 15 VRLINE VIN = 16, 28, and 40 VDC 1 IOUT = 0, Half Load and Full Load 2,3 VRLOAD VIN = 16, 28, and 40 VDC 1,2,3 IOUT = 0, Half Load and Full Load INPUT Current IIN Ripple Current EFFICIENCY IRIP EFF ISOLATION ISO CAPACITIVE LOAD 2, 3 CL LOAD FAULT POWER DISSIPATION PD IOUT = 0, Inhibit (pin 2) = 0 IOUT = 0, Inhibit (pin 2) = Open IOUT = Full Load IOUT = Full Load TC = +25°C Input to output or any pin to case (except pin 8) at 500 VDC, Tc = +25°C No effect on DC performance Tc = +25°C Overload, Tc = +25°C 4 Short circuit, Tc = +25°C SWITCHING FREQUENCY FS IOUT = Full Load DYNAMIC CHARACTERISTICS STEP LOAD CHANGES Output Transient 5 VOTLOAD 50% Load 135 100% Load No Load 135 50% Recovery 5,6 TTLOAD 50% Load 135 100% Load No Load 335 50% Load 50% Load 335 No Load STEP LINE CHANGES Output Transient VOTLINE Input step 16 to 40 VDC 3,7 Input step 40 to 16 VDC 3,7 Recovery TTLINE Input step 16 to 40 VDC 3,6,7 Input step 40 to 16 VDC 3,6,7 TURN-ON Overshoot VTON OS IOUT = OA and Full Load Delay TON D IOUT = O and Full Load 8 LOAD FAULT RECOVERY trLF VIN = 16 TO 40 VDC 5.05 5.10 3.00 60 1,2,3 AHV2812S Max Min AHV2815S Max Units 11.88 11.76 0.0 14.85 14.70 0.0 12.12 12.24 1.25 60 15 15.15 V 15.30 V 1.00 A 60 mV p-p 15 W 5 25 50 30 60 120 35 75 150 mV mV mV 18 50 50 18 50 50 18 50 50 1,2,3 1 72 72 72 mA mA mA p-p % 1 100 100 100 MΩ 4 500 1 200 8.5 8.5 200 8.5 8.5 8.5 8.5 µF W W 4 450 550 450 550 450 550 KHz 4 4 4 4 4 -300 -500 +300 +500 70 200 5 -300 -750 +300 +750 70 1500 5 -300 -750 +300 +750 70 1500 5 mVpk mVpk µS µS ms 4 4 4 4 4,5,6 4,5,6 4,5,6 300 -1000 800 800 500 -1500 800 800 500 -1500 800 800 mVpk mVpk µS µS 550 10 10 750 10 10 750 10 10 mVpk ms ms Notes: 1. Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz. 2. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but will interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on. 3. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter shall be guaranteed to the limits specified. 4. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 5. Load step transition time between 2 and 10 microseconds. 6. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent load. 7. Input step transition time between 2 and 10 microseconds. 8. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the input. 9. Above 125°C case temperature, derate output power linearly to 0 at 135°C case. 2 SPECIFICATIONS (DUAL OUTPUT MODELS) TCASE = -55°C to +125 °C, VIN = +28 V ±5% unless otherwise specified ABSOLUTE MAXIMUM RATINGS Input Voltage Power Output Soldering Temperature Range -0.5 V to 50 VDC (Continuous) 80 V (100ms) Internally limited, 17.5W typical 300°C for 10 seconds (1 pin at a time) Operating -55°C to 135°C case 13 Storage -65°C to +135°C Conditions -55°C - Tc - +125°C, VIN = 28 VDC Test Symbol STATIC CHARACTERISTICS OUTPUT Voltage 1 VOUT Current 1,2 Ripple Voltage 1,3 Power 1,2,4 REGULATION Line 1,5 Load 1 INPUT Current Ripple Current 3 IOUT VRIP POUT ±5%, CL=0, unless otherwise specified IOUT = 0 1 2,3 1,2,3 1,2,3 VIN = 16, 28, and 40 VDC VIN = 16, 28, and 40 VDC BW = DC TO 2 MHZ VIN = 16, 28, and 40 VDC 1,2,3 VRLINE VIN = 16, 28, and 40 VDC IOUT IOUT = 0, Half Load and Full Load VRLOAD VIN = 16, 28, and 40 VDC IOUT = 0, Half Load and Full Load IIN IRIP EFFICIENCY ISOLATION EFF ISO CAPACITIVE LOAD 6,7 CL LOAD FAULT POWER DISSIPATION PD Group A Subgroups IOUT = 0, inhibit (pin 2) Tied to input return (pin 10) IOUT = 0, inhibit (pin 2) = open IOUT = Full Load BW = DC to 2MHz IOUT = FULL LOAD, TC = +25°C Input to output or any pin to case (except pin 8) at 500 VDC, TC = +25°C No effect on DC performance, TC = +25°C SWITCHING FREQUENCY FS DYNAMIC CHARACTERISTICS STEP LOAD CHANGES Output Transient 9 VOTLOAD 50% Load 135 100% Load No Load 135 50% Load Recovery 9,10 TTLOAD 50% Load 135 100% Load No Load 335 50% Load 50% Load 335 No Load STEP LINE CHANGES Output Transient 7,11 VOTLINE Input step 16 to 40 VDC Input step 40 to 16 VDC Recovery 7,10,11 TTLINE Input step 16 to 40 VDC Input step 40 to 16 VDC TURN-ON Overshoot 1 VTON OS IOUT = O and Full Load Delay 1,12 TON D IOUT = O and Full Load LOAD FAULT RECOVERY 7 trLF AHV2815D Min Max ±11.88 ±12.12 ±11.76 ±12.24 0.0 ±625 60 ±14.85 ±15.15 V ±14.70 ±15.30 V 0.0 ±500 mA 60 mV p-p 15 15 Units W 1 2,3 1,2,3 30 60 120 35 75 150 mV mV mV 1,2,3 18 18 mA 1,2,3 65 50 65 50 mA mA p-p 1 1 Over Load, TC = +25°C 8 Short Circuit, TC = +25°C IOUT = FULL LOAD AHV2812D Min Max 72 100 72 100 % MΩ 4 200 200 1 8.5 8.5 550 8.5 8.5 550 4 450 4 4 4 4 4 -300 -500 4 4 4 4 4,5,6 4,5,6 4,5,6 +300 +500 70 1500 5 450 -300 -500 µf W W KHz +300 +500 70 1500 5 mVpk mVpk µs µs ms 1200 -1500 4 4 1500 -1500 4 4 mVpk mVpk ms ms 600 10 10 600 10 10 mVpk ms ms Notes: 1. Tested at each output 2. Parameter guaranteed by line and load regulation tests. 3. Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz. 4. Total power at both outputs. 5. When operating with unbalanced loads, at least 25% of the load must be on the positive output to maintain regulation. 6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on. 7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified. 8. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 9. Load step transition time between 2 and 10 microseconds. 10. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ± 1 percent of VOUT at 50 percent load. 11. Input step transition time between 2 and 10 microseconds. 12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the input. 13. Above 125°C case temperature, derate output power linearly to 0 at 135°C case. 3 SPECIFICATIONS (TRIPLE OUTPUT MODELS) TCASE = -55°C to +125°C, VIN = +28 V ±5% unless otherwise specified ABSOLUTE MAXIMUM RATINGS Input Voltage Power Output Soldering Temperature Range -0.5 V to 50 VDC (Continuous) 80 V (100ms) Internally limited, 17.5W typical 300°C for 10 seconds (1 pin at a time) Operating -55°C to 135°C case 8 Storage -65°C to +135°C Conditions -55°C - Tc - +125°C, VIN = 28 VDC Test Symbol STATIC CHARACTERISTICS OUTPUT Voltage 1 VOUT ±5%, CL=0, unless otherwise specified IOUT = 0 (main) 1 2,3 1 2,3 1,2,3 1,2,3 1,2,3 1 IOUT = 0 (dual) Current 1,2,3 Ripple Voltage Power IOUT 1,4 1,2,3 REGULATION Line 1,3 Load 1,3 INPUT Current Ripple Current 4 VRIP POUT VIN = 16, 28, and 40 VDC (main) VIN = 16, 28, and 40 VDC (dual)1 VIN = 16, 28, and 40 VDC BW = DC TO 2 MHZ (main) VIN = 16, 28, and 40 VDC BW = DC TO 2 MHZ (main) VIN = 16, 28, and 40 VDC (main) (+dual) (-dual) (total) 1,2,3 1,2,3 1,2,3 1,2,3 VIN = 16, 28, and 40 VDC IOUT = 0, 1000, 2000 mA (main) VIN = 16, 28, and 40 VDC IOUT = 0, ±104, ±208 mA (±12V) (dual) IOUT = 0, ±84, ±167 mA (±15v) VRLOAD VIN = 16, 28, and 40 VDC IOUT = 0, 1000, 2000 mA (main) VIN = 16, 28, and 40 VDC IOUT = 0, ±104, ±208 mA (±12V) (dual) IOUT = 0, ±84, ±167 mA (±15v) IRIP EFFICIENCY EFF ISOLATION ISO LOAD FAULT POWER DISSIPATION 3 PD SWITCHING FREQUENCY1 FS CAPACITIVE LOAD 6,7 CL AHV2812T Min Max AHV2815T Min Max 4.95 5.05 4.90 5.10 ±11.88 ±12.12 ±11.76 ±12.24 0.0 2000 0.0 ±208 80 4.95 5.05 V 4.90 5.10 V ±14.85 ±15.15 V ±14.70 ±15.30 V 0.0 2000 mA 0.0 ±167 mA 80 mV p-p 1,2,3 VRLINE IIN Group A Subgroups IOUT = 0 inhibit (pin 8) tied to input return (pin 10) IOUT = 0 inhibit (pin 2) = open IOUT = 2000 mA (main) IOUT = ±208 mA (±12V) IOUT = ±167 mA (±15V) BW = DC to 2MHz IOUT = 2000 mA (main) IOUT = ±208 mA (± 12V) IOUT = ±167 mA (±15V) Input to output or any pin to case (except pin 7) at 500 Vdc, Tc = +25C Over Load, TC = +25C5 Short Circuit, TC = +25C IOUT = 2000 mA (main) IOUT = ±208 mA (±12V) IOUT = ±167 mA (±15V) No effect on DC performance, TC = +25C (main) (dual) 40 10 2.5 2.5 15 W W W W 25 25 mV 1 ±30 ±35 mV 2,3 1,2,3 ±60 50 ±75 50 mV mV ±60 ±75 mV 1,2,3 15 15 mA 1,2,3 50 50 mA 1,2,3 50 50 mA p-p 1,2,3 1 72 72 % 1 100 100 MΩ 450 4 4 4 4 4 4 4 10 2.5 2.5 15 mV p-p 1,2,3 1 1 4 DYNAMIC CHARACTERISTICS STEP LOAD CHANGES Output Transient 9 VOTLOAD 50% Load 135 100% Load No Load 135 50% Load Recovery 9,10 TTLOAD 50% Load 135 100% Load No Load 335 50% Load 50% Load 335 No Load 40 Unit 8.5 8.5 550 450 500 200 -300 -400 +300 +400 100 2000 5 -300 -400 8.5 8.5 550 W W KHz 500 200 µf µf +300 +400 100 2000 5 mVpk mVpk µs µs ms STEP LINE CHANGES Output Transient 7,11 Recovery 7,10,11 VOTLINE Input step 16 to 40 VDC Input step 40 to 16 VDC TTLINE Input step 16 to 40 VDC Input step 40 to 16 VDC TURN-ON Overshoot 1 VTON OS IOUT = 0 and ±625 mA Delay 1,12 TON D IOUT = 0 and ±625 mA LOAD FAULT RECOVERY 7 trLF 4 4 4 4 1200 -1500 4 4 1200 -1500 4 4 mVpk mVpk ms ms 4 4 4 750 15 15 750 15 15 mVpk ms ms Notes: 1. Tested at each output 2. Parameter guaranteed by line and load regulation tests. 3. At least 25 percent of the total power should be taken from the (+5 volt) main output. 4. Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz. 5. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power dissipation. 6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on. 7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified. 8. Above 125°C case temperature, derate output power linearly to 0 at 135°C case. 9. Load step transition time between 2 and 10 microseconds. 10. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ± 1 percent of VOUT at 50 percent load. 11. Input step transition time between 2 and 10 microseconds. 12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 8) while power is applied to the input. STANDARD MILITARY DRAWING CROSS REFERENCE PART NUMBER AHV 28xx x F / xx Screening (see table below) Omit for industrail ES— Environmental screening HB— Military screening CH— Fully compliant and SMD Model Input Voltage Package F - Flange Output Voltage 05 - 5VDC 12 - 12VDC 15 - 15VDC Output Option S - Single Output D - Dual Output T - Triple Output Lambda Advanced Analog part no. Standardized ** military dwg. AHV2805 SF/CH AHV2812 SF/CH AHV2815 SF/CH AHV2812 DF/CH AHV2815 DF/CH AHV2812 TF/CH AHV2815 TF/CH 5962-91773 5962-92112 5962-92113 5962-92114 5962-92774 5962-92115 5962-92116 ** Pending consult factory for status. SCREENING DETAILS Requirement MIL-STD-883 Method Temperature Range No Suffix ES Suffix -20°C to +85°C -55°C to +125°C HB Suffix CH Suffix -55°C to +125°C -55°C to +125°C Element Evaluation MIL-PRF-38534 ✓ ✓ ✓ 1010 Cond B Cond C Cond C Constant Acceleration 2001 500g Cond A Cond A Burn-in 1015 96 hrs @125°C 160 hrs @125°C 160 hrs @125°C Internal Visual 2017 Temperature Cycle Final Electrical (Group A) ✈ MIL-STD-38534 & Specification 25°C 25°C Seal, Fine & Gross 1014 Cond A Cond A, C Cond A, C Cond A, C External Visual 2009 ✈ ✓ ✓ ✓ ✈ per Commercial Standards 5 -55, +25, +125°C -55, +25, +125°C BLOCK DIAGRAMS 1 2 INPUT FILTER OUTPUT FILTER 5 ERROR AMP & REF 3 CONTROLLER 10 1 4 INPUT FILTER OUTPUT FILTER 2 Single Output Models REGULATOR & OUTPUT FILTER CONTROLLER 3 Double Output Models 5 ERROR AMP & REF 10 4 5 REGULATOR & OUTPUT FILTER 1 INPUT FILTER 4 OUTPUT FILTER 8 2 CONTROLLER ERROR AMP & REF 10 3 6 Triple Output Models MECHANICAL OUTLINE 2.700 max (68.580) 2.880 max (73.152) 1.345 (34.163) 1.00 (25.400) Pin #1 1.110 (28.194) 0.800 (20.320) 2.360 (59.944) Pin #1 1.950 (49.530) 2.560 (65.024) 2.110 max (53.594) 0.162D 2 places (4.115) 0.162D 2 places (4.115) 0.410 max. 10.414 .405 max 10.287 4 x 0.400 = 1.600 (10.160) (40.640) 4 x 0.400 = 1.600 (10.160) (40.640) 0.040D x 0.260L (1.016) (6.604) 0.040D x 0.260L (1.016) (6.604) Flange Single and Dual Output Models Triple Output Models PIN DESIGNATION Input Common N/C 10 1 Inhibit Input 9 Bottom View Case Ground + Input Output Adjust Output Common 6 Input Common 5 10 1 Bottom View Case Ground Pos. Input Pos. Output Output Common Input Common 6 5 Neg. Output 10 1 Pos. Input +5VDC Output N/C Bottom View Inhibit Input Output Common Case Ground N/C Neg. Dual Output 6 5 Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Positive Input Inhibit Input Output adjust* Output common Positive output Pin 10 Input common Pin 9 N/C Pin 8 Case gnd Pin 7 N/C Pin 6 N/C + Output Inhibit Input N/C Single Output Models Pos. Dual Output Dual Output Models Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Positive Input Inhibit Input Positive output Output common Negative output Pin 10 Input common Pin 9 N/C Pin 8 Case gnd Pin 7 N/C Pin 6 N/C Triple Output Models Pin 1 Pin 2 Pin 3 Pin 4 Positive Input +5VDC output Output common Neg. Dual output (12/15VDC) Pin 5 Pos. Dual output (12/15VDC) 7 Pin 10 Input common Pin 9 N/C Pin 8 Inhibit Input Pin 7 Case gnd Pin 6 N/C APPLICATION INFORMATION Inhibit function EMI Filter Connecting the inhibit pin (Pin 2 of single and dual models, pin 8 of triple models) to the input return (Pin 10) will cause the converter to shut down and operate in a low power standby mode. Power consumption in this mode is calculated by multiplying Vin times the input current inhibited, typically 225mw at Vin equal to 28 volts. The input current inhibited is relatively constant with changes in Vin. The open circuit inhibit pin voltage is typically 11.5 volts and can be conveniently driven by an open collector driver. An internal pullup resistor enables the user to leave this pin floating if the inhibit function is not used in their particular application. All models use identical inhibit internal circuits. Forcing inhibit pin to any voltage between 0 and 6 volts will assure the converter is inhibited. The input current to this pin is 500µa maximum at Vpin2 = to 0 volts. The converter can be turned on by opening Pin 2 or forcing a voltage from 10 to 50 volts. Inhibit pin current from 10 to 50 volts is less than ±50µa. An optional EMI filter (AFC461) will reduce the input ripple current to levels below the limits imposed by MILSTD-461 CEO3 Lambda Advanced Analog *Output Adjust (Single Output Models Only) The output voltage of the AHV28XXS can be adjusted upward by connecting Output Adjust (Pin 3) and Output Common (Pin 4) as shown in Table 1. Resistance, ohm Pin 3 to 4 x 390 K 145 K 63 K 22 K 0 Output Voltage Increase, % 5V 12V 15V 0 +1.0 % +2.0 % +3.1 % +4.1 % +5.0 % 0 +1.6% +3.2 % +4.9 % +6.5 % +7.9 % Table 1: Output Adjustment Resistor Values The information in this data sheet has been carefully checked and is believed to be accurate; however no responsibility is assumed for possible errors. These specifications are subject to change without notice. LAMBDA ADVANCED ANALOG INC. λ 0 +1.7 % +3.4 % +5.1 % +6.8 % +8.3 % MIL-PRF-38534 Certified ISO9001 Registered 8 9848 2270 Martin Avenue Santa Clara CA 95050-2781 (408) 988-4930 FAX (408) 988-2702