AKM AKD4368-B

[AKD4368-B]
AKD4368-B
AK4368 Evaluation Board Rev.2
GENERAL DESCRIPTION
The AKD4368 is an evaluation board for 24bit DAC with integrated Headphone Amplifier, AK4368. The
AKD4368 has the interface with AKM’s ADC evaluation boards. Therefore, it’s easy to evaluate the
AK4368. The AKD4368 also has the digital audio interface and can achieve the interface with digital audio
systems via opt-connector.
Ordering guide
AKD4368-B
---
Evaluation board for AK4368
(Cable for connecting with printer port of IBM-AT compatible PC and control
software are packed with this. This control software does not operate on Windows
NT.)
FUNCTION
• Compatible with 2 types of interface
- Direct interface with AKM’s A/D converter evaluation boards
- On-board AK4116 as DIR which accepts optical input
• 10pin header for serial control interface
• Mini-jack for external Stereo Speaker
• On-board Class-D Speaker Amplifier (AK7830)
Vcc(5.0V)
GND
Regulator
3.3V
Opt In
(PORT1)
HPL
AK4116
(DIR)
DSP
10pin Header
(PORT2)
HP
HPR
AK4368
SPPL
AK7830
(SPK-Amp)
Control Data
10pin Header
(PORT3)
SPPR
ROUT
L/RIN
MIN
LOUT L/ROUT
Figure 1. AKD4368 Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
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Evaluation Board Manual
Operation sequence
1) Set up the power supply lines.
[VCC] (red) = 5.0V
: for SPK-Amp (typ. 5.0V)
[AGND] (black) = 0V
: for analog ground
[DGND] (black) = 0V
: for logic ground
Each supply line should be distributed from the power supply unit.
3.3V is supplied to AK4368 and AK4116 via the regulator.
2) Set up the evaluation mode, jumper pins. (See the followings.)
3) Power on.
The AK4368 and AK4116 should be resets once bringing SW1(DAC/DIR_PDN) “L” upon power-up.
And the AK7830 should be resets once bringing SW2(SPK_PDN) “L” upon power-up.
Evaluation mode
When evaluating the AK4368 using the PORT1(AK4116), it is possible to use the initial setting of the audio
interface format (24bit MSB justified). When inputting the data from the PORT2, the AK4368’s audio interface
format should be set to correspond the input data’s audio interface format. Refer to the AK4368’s datasheet.
Applicable Evaluation Mode
(1) PLL Master Mode
(2) PLL Slave Mode
(3) EXT Slave Mode
(3-1) In case of using DIR (Optical Link) <default>
(3-2) In case of connecting AK4368 with a external DSP
(1) PLL Master Mode
PORT2(DSP) is used. Nothing should be connected to PORT1(DIR). BICK and LRCK are supplied from
PORT2. It is possible to evaluate at various sampling frequencies using built-in the AK4368’s PLL.
27MHz,26MHz,19.8MHz,19.68MHz,
19.2MHz,15.36MHz,14.4MHz,13MHz,
12MHz,11.2896MHz
AK4368
DSP or μP
MCKI
MCKO
BICK
LRCK
256fs/128fs/64fs/32fs
32fs, 64fs
1fs
MCLK
BCLK
LRCK
SDTO
SDATA
Figure 2. PLL Master Mode
JP3(MCLK),JP4(BICK),JP5(LRCK) and JP6(SDTO) should be open.
JP8(LRCK2) and JP9(BICK2) should also be open.
The system clock should be connected to MCLK of PORT2. SDTI of PORT2 should be connected to SDTO of
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DSP. The JP8(LRCK2) and JP9(BICK2)’s right side should be connected to LRCK and BICK of DSP.
In case of supplying MCKO to DSP, the test pin(MCKO) should be connected to MCLK of DSP.
JP3
MCLK
JP4
BICK
JP6
SDTO
JP5
LRCK
JP8
LRCK2
JP9
BICK2
(2) PLL Slave Mode
PORT2 (DSP) is used. MCLK,BICK,LRCK and SDATA are supplied from PORT2. The test pin(MCKO)
should be connected to MCLK of DSP. Nothing should be connected to PORT1 (DIR).
MCKO is needed for a synchronous singal of BICK and LRCK.
27MHz,26MHz,19.8MHz,19.68MHz,
19.2MHz,15.36MHz,14.4MHz,13MHz,
12MHz,11.2896MHz
AK4368
DSP or μP
MCKI
256fs/128fs/64fs/32fs
MCKO
32fs, 64fs
BICK
1fs
LRCK
MCLK
BCLK
LRCK
SDTO
SDATA
Figure 3. PLL Slave Mode
JP8(LRCK2) and JP9(BICK2) should be short.
JP3(MCLK),JP4(BICK),JP5(LRCK) and JP6(SDTO) should be open.
JP3
MCLK
JP4
BICK
JP5
LRCK
JP6
SDTO
<KM081302>
JP8
LRCK2
JP9
BICK2
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[AKD4368-B]
(3) EXT Slave Mode
AK4368
DSP or μP
MCKO
256fs, 512fs or 1024fs
MCKI
MCLK
≥ 32fs
BICK
1fs
LRCK
BCLK
LRCK
SDTO
SDATA
Figure 4. EXT Slave Mode
(3-1) In case of using DIR (Optical Link) <default>
PORT1 (DIR) is used. DIR generates MCLK, BICK, LRCK and SDATA from the received data through optical
connector (TORX141). Nothing should be connected to PORT2(DSP).
JP3(MCLK),JP4(BICK),JP5(LRCK) and JP6(SDTO) should be shorted.
JP8(LRCK2) and JP9(BICK2) should also be short.
JP3
MCLK
JP4
BICK
JP6
SDTO
JP5
LRCK
JP8
LRCK2
JP9
BICK2
The AK4116 operates at fs of 32kHz or more. If the fs is slower than 32kHz, any other evaluation mode
without using DIR should be used.
(3-2) In case of connecting AK4368 with external DSP
PORT2 (DSP) is used. MCLK, BICK, LRCK and SDATA are supplied from PORT2. Nothing should be
connected to PORT1 (DIR).
JP3(MCLK),JP4(BICK),JP5(LRCK) and JP6(SDTO) should be open.
JP8(LRCK2) and JP9(BICK2) should be short.
JP3
MCLK
JP4
BICK
JP6
SDTO
JP5
LRCK
JP8
LRCK2
JP9
BICK2
Other jumper pins set up
JP1 (GND) : Analog ground and Digital ground
OPEN : Separated. <default>
SHORT : Common. (The connector “DGND” can be open.)
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The function of the toggle SW
Upper-side is “H” and lower-side is “L”.
[SW1] (DAC/DIR_PDN): Power down of AK4368 and AK4116. Keep “H” during normal operation.
[SW2] (SPK_PDN): Power down of AK7830. Keep “H” during normal operation.
Indication for LED
[LED1] (ERF): Monitor INT0 pin of the AK4116. LED turns on when some error has occurred to AK4116.
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Serial Control
The AK4368 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT3
(uP -IF) with PC by 10 wire flat cable packed with the AKD4368.
CSN
Connect
CCLK
CDTI
PC
AKD4368
10 Wire Flat Cable
10pin Connector
10pin Header
Figure 5. Connect of 10 wire flat cable
(1) 3-wire Serial Control Mode <Default>
The jumper pins should be set to the followings.
JP7
CAD0
JP10
SDA
JP2
I2C_SEL
I2C
3-wire
(2) I2C-bus Control Mode
The jumper pins should be set to the followings.
(2-1) In case of using CAD0=0 (device address bits).
JP7
CAD0
JP10
SDA
JP2
I2C_SEL
I2C
3-wire
(2-2) In case of using CAD0=1 (device address bits).
JP7
CAD0
JP10
SDA
JP2
I2C_SEL
I2C
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3-wire
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[AKD4368-B]
Input / Output circuit & Set-up jumper pin for Input / Output circuits
(1) Input Circuit
LIN, RIN and MIN Input circuits
C15
1u
J1
LIN/RIN
6
RIN
C16
1u
4
LIN
3
J2
MIN
6
C17
1u
4
MIN
3
Figure 6. MIN, LIN, RIN Input circuits
(2)
Output Circuit
1) HPL, HPR Output Circuit
HPR
HPL
C18
100u
R9
(SHORT)
R10
(SHORT)
C19
100u
6
J3
HP
4
3
Figure 7. HPL,HPR Output Circuit
2) LOUT, ROUT Output Circuit
ROUT
C20
1u
R12
220
R11
47k
LOUT
R14
220
C21
1u
6
J4
LROUT
4
3
R13
47k
Figure 8. LOUT, ROUT Output Circuit
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3) SPEAKER Output Circuit
VC L P
VC_L_P
VC_L_N
6
J5
SPP L
4
VC_L_N
3
VC R P
VC_R_P
VC_R_N
VC_R_N
6
J6
SPP R
4
3
Figure 9. SPK-Amp Output Circuit
∗ AKM assumes no responsibility for the trouble when using the above circuit examples.
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Control Software Manual
Set-up of evaluation board and control software
1. Set up the AKD4368 according to previous term.
2. Connect IBM-AT compatible PC with AKD4368 by 10-line type flat cable (packed with AKD4368). Take care of
the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3. Insert the CD-ROM labeled “AK4368 Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive and double-click the icon of “akd4368.exe” to set up the control program.
5. Then please evaluate according to the follows.
Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Port Reset” button.
3. Click “Write default” button
Explanation of each buttons
1. [Port Reset] :
2. [Write default] :
3. [All Write] :
4. [Function1] :
5. [Function2] :
6. [Function3] :
7. [Function4] :
8. [Function5]:
9. [SAVE] :
10. [OPEN] :
11. [Write] :
Set up the USB interface board (AKDUSBIF-A) when using the board.
Initialize the register of AK4368.
Write all registers that is currently displayed.
Dialog to write data by keyboard operation.
Dialog to write data by keyboard operation.
The sequence of register setting can be set and executed.
The sequence that is created on [Function3] can be assigned to buttons and executed.
The register setting that is created by [SAVE] function on main window can be assigned to
buttons and executed.
Save the current register setting.
Write the saved values to all register.
Dialog to write data by mouse operation.
Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
Explanation of each dialog
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1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data
becomes “H” or “1”. If not, “L” or “0”.
If you want to write the input data to AK4368, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog] : Dialog to write data by keyboard operation
Address Box:
Data Box:
Input registers address in 2 figures of hexadecimal.
Input registers data in 2 figures of hexadecimal.
If you want to write the input data to AK4368, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog] : Dialog to evaluate DATT
There are dialogs corresponding to register of 05h,06h and 09h.
Address Box:
Input registers address in 2 figures of hexadecimal.
Start Data Box:
Input starts data in 2 figures of hexadecimal.
End Data Box:
Input end data in 2 figures of hexadecimal.
Interval Box:
Data is written to AK4368 by this interval.
Step Box:
Data changes by this step.
Mode Select Box:
If you check this check box, data reaches end data, and returns to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
If you do not check this check box, data reaches end data, but does not return to start data.
[Example] Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
If you want to write the input data to AK4368, click [OK] button. If not, click [Cancel] button.
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4. [SAVE] and [OPEN]
4-1. [SAVE]
All of current register setting values displayed on the main window are saved to the file. The extension of file name is
“akr”.
<Operation flow>
(1) Click [SAVE] Button.
(2) Set the file name and click [SAVE] Button. The extension of file name is “akr”.
4-2. [OPEN]
The register setting values saved by [SAVE] are written to the AK4368. The file type is the same as [SAVE].
<Operation flow>
(1) Click [OPEN] Button.
(2) Select the file (*.akr) and Click [OPEN] Button.
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[AKD4368-B]
5. [Function3 Dialog]
The sequence of register setting can be set and executed.
(1) Click [F3] Button. The default setting sequence DAC->HP(3D=OFF) is displayed. Jump to (3) below if the default
setting sequence is used. Go to (2) if the other setting sequence is required.
(2) Set the control sequence.
Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused.
(3) Click [START] button. Then this sequence is executed.
The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step.
This sequence can be saved and opened by [SAVE] and [OPEN] button on the Function3 window. The extension of file
name is “aks”.
Figure 10. Window of [F3]
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[AKD4368-B]
6. [Function4 Dialog]
The sequence file (*.aks) saved by [Function3] can be listed up to 10 files, assigned to buttons and then executed.
When [F4] button is clicked, the window as shown in Figure 10 opens.
Figure 11. [F4] window
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[AKD4368-B]
6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks) saved by [Function3].
The sequence file name is displayed as shown in Figure 11. ( In case that the selected sequence file name is
“DAC_Stereo_ON.aks”)
Figure 12. [F4] window(2)
(2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The name assign of sequence file displayed on [Function4] window can be saved to the file. The file name
is “*.ak4”.
[OPEN] : The name assign of sequence file(*.ak4) saved by [SAVE] is loaded.
6-3. Note
(1) This function doesn't support the pause function of sequence function.
(2) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder.
(3) When the sequence is changed in [Function3], the sequence file (*.aks) should be loaded again in order to reflect the
change.
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[AKD4368-B]
7. [Function5 Dialog]
The register setting file(*.akr) saved by [SAVE] function on main window can be listed up to 10 files, assigned to
buttons and then executed. When [F5] button is clicked, the window as shown in Figure 12 opens.
Figure 13. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
The register setting file name is displayed as shown in Figure 14. (In case that the selected file name is
“DAC_Output.akr”)
(2) Click [WRITE] button, then the register setting is executed.
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[AKD4368-B]
Figure 14. [F5] windows(2)
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The name assign of register setting file displayed on [Function5] window can be saved to the file. The file
name is “*.ak5”.
[OPEN] : The name assign of register setting file(*.ak5) saved by [SAVE] is loaded.
7-3. Note
(1) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder.
(2) When the register setting is changed by [SAVE] Button on the main window, the register setting file (*.akr) should be
loaded again in order to reflect the change.
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[AKD4368-B]
MEASUREMENT RESULTS
[Measurement condition]
• Measurement unit : Audio Precession System Two Cascade
• MCLK
: 11.2896MHz
• BICK
: 64fs
• fs
: 44.1kHz
• Bit
: 24bit
• Measurement mode : EXT Slave mode
• Power Supply
: VDD = 5.0V(AVDD = HVDD = DVDD = PVDD = 3.3V)
• Measurement Filter : 22Hz ∼ 20kHz
• Temperature
: Room
Parameter DAC Analog Output Characteristics
DAC -> HPAMP
THD+N
(-3dBFS Output)
D-Range
(-60dB Output, A-weighted)
S/N
(A-weighted)
DAC -> LOUT
THD+N
(0dBFS Output)
D-Range
(-60dB Output, A-weighted)
S/N
(A-weighted)
<KM081301>
Result (Lch / Rch)
Unit
-57.6 / -57.7
92.6 / 92.7
92.9 / 93.1
dB
dB
dB
-62.4 / -61.6
90.5 / 90.0
90.7 / 90.3
dB
dB
dB
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[AKD4368-B]
[Plot of Headphone Amp]
AKM
AK4368 HP-AMP THD+N vs. Input Level (fs=44.1kHz, fin=1kHz)
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 15. THD+N vs. Input Level
AKM
AK4368 HP-AMP THD+N vs. Input Frequency (fs=44.1kHz, fin=-3dB)
-20
-25
-30
-35
-40
-45
-50
d
B
r
-55
A
-65
-60
-70
-75
-80
-85
-90
-95
-100
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 16. THD+N vs. Input Frequency
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[AKD4368-B]
AKM
AK4368 HP-AMP Linearity (fs=44.1kHz, fin=1kHz)
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 17. Linearity
AKM
AK4368 HP-AMP Freq Response (fs=44.1kHz, fin=-3dB)
-0
-2
-4
-6
-8
d
B
r
A
-10
-12
-14
-16
-18
-20
-22
-24
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 18. Frequency Response (Boost off)
(including external HPF)
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[AKD4368-B]
AKM
AK4368 HP-AMP FFT (fs=44.1kHz, fin=-3dB)
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Figure 19. FFT Plot(1kHz,-3dB)
AKM
AK4368 HP-AMP FFT (fs=44.1kHz, fin=-60dB)
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
A
-90
-80
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
Hz
Figure 20. FFT Plot(1kHz,-3dB)
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[AKD4368-B]
AKM
AK4368 HP-AMP FFT (Noise Floor)
+0
-10
-20
-30
-40
-50
-60
d
B
r
A
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 21. FFT Plot(Noise Floor)
AKM
AK4368 HP-AMP FFT Out-band Noise
+0
-10
-20
-30
-40
-50
-60
d
B
r
-70
A
-90
-80
-100
-110
-120
-130
-140
-150
-160
20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
Figure 22. Out-band Noise
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[AKD4368-B]
AKM
AK4368 HP-AMP Crosstalk (fs=44.1kHz, fin=-3dB)
+0
-10
-20
-30
-40
-50
d
B
-60
-70
-80
-90
-100
-110
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 23. Crosstalk
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[AKD4368-B]
REVISION HISTORY
Date
(yy/mm/dd)
Manual
Revision
Board
Revision
Reason
05/10/31
KM081300
0
06/02/10
KM081301
1
07/08/01
KM081302
2
First Edition
Change
Circuit
Change
Page
Contents
24
The connection between GND and the pin3 of Mini-jack
J5 and J6 were cut.
C12 4.7nF 47nF
IMPORTANT NOTICE
These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei
EMD Corporation (AKEMD) or authorized distributors as to current status of the products.
AKEMD assumes no liability for infringement of any patent, intellectual property, or other rights in the application or
use of any information contained herein.
Any export of these products, or devices or systems containing them, may require an export license or other official
approval under the law and regulations of the country of export pertaining to customs and tariffs, currency
exchange, or strategic materials.
AKEMD products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or
other hazard related device or systemNote2), and AKEMD assumes no responsibility for such use, except for the use
approved with the express written consent by Representative Director of AKEMD. As used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and
which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or
for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform
may reasonably be expected to result in loss of life or in significant injury or damage to person or property.
It is the responsibility of the buyer or distributor of AKEMD products, who distributes, disposes of, or otherwise
places the product with a third party, to notify such third party in advance of the above content and conditions, and
the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKEMD harmless
from any and all claims arising from the use of said product in the absence of such notification.
<KM081302>
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R6
+
RIN
C14
10u
10k
DGND
C6
DVDD
HVDD
C7
NC
MIN
NC
AVSS
HPL
DVSS
NC
B6
RIN
HVSS
C2
JP1
GND
E
AGND
A7
B5
A6
A5
B4
A4
A3
MCKO
B1
VCOC
B7
NC
LIN
HPR
A1
PVSS
C3
PVDD
NC
D
E
C12
47n
B3
C13
0.1u
B2
U1
A2
E
D
HPL
C
MIN
B
LIN
A
D
HPR
C1
AVDD_REG
51
MCKI
D1
MCKI
D2
I2C
C
F1
SDA/CDTI
F2
SDATA
D6
AVDD
D7
VCOM
E7
NC
G7
ROUT
E6
ROUT
LOUT
F7
LOUT
C7
0.1u
B
AVDD_REG
C
3DCAP3
+ C6
2.2u
C4
B
470n
PDN
CSN
CCLK
4.7n
C8
10u
G6
3DCAP2
C3
F6
3DCAP1
NC
G5
G1
NC
SDATA
F5
CDTI
NC
51
LRCK
G4
R5
E2
PDN
51
BICK
HVDD_REG
C9
1u
C5
0.1u
LRCK
R4
E1
NC
51
F3
R3
BICK
SCL/CCLK
51
G2
R2
C11
10u
MUTET
AK4368
R8 47k
F4
R1
CAD0/CSN
10
G3
JP2
I2C_SEL
C10
0.1u
C2
0.1u
+
C1
10u
+
+
R7
+
1
TP1
MCKO
A
A
Title
Size
A3
Date:
A
B
C
D
AKD4368-B Rev.1
Document Number
Rev
AK4368
Wednesday, August 01, 2007
Sheet
E
A
1
of
6
A
B
C
D
E
E
E
RIN
6
C16
1u
C18
100u
R9 (short)
HPR
J3
6
+
LIN
+
4
3
+
J1
LIN/RIN
+
C15
1u
C19
100u
4
3
R10(short)
HPL
6
+
4
3
C17
1u
+
J2
MIN
HP
C20
1u
R12
220
ROUT
MIN
R11
47k
J4
D
D
+
6
C21
1u
R14
220
4
3
LOUT
LROUT
R13
47k
TP5
VC_L_P
J5
6
1
VC_L_P
TP6
VC_L_N
VC_L_N
C
1
C
4
3
SPP_L
TP3
VC_R_P
J6
6
1
VC_R_P
TP4
VC_R_N
1
VC_R_N
4
3
SPP_R
B
B
A
A
Title
Size
A3
Date:
A
B
C
D
AKD4368-B Rev.1
Document Number
Rev
Input/Output
Friday, February 10, 2006
Sheet
E
A
2
of
6
A
B
D_REG
D_REG
C
D
E
D_REG
2
U4
D1
1S1588
1
E
R19
10k
U3C
74HC14
5
U3D
74HC14
14
6
7
9
E
A8
9
PDN1
12
Y7
A7
8
SDTO1
13
Y6
A6
7
LRCK1
BICK
14
Y5
A5
6
BICK1
MCKI
15
Y4
A4
5
MCLK1
CSN
16
Y3
A3
4
CSN1
CCLK
17
Y2
A2
3
CCLK1
18
Y1
A1
2
CDTI1
10
GND
G2
19
20
VCC
G1
1
SDATA
JP8
LRCK2
1
3
Y8
PDN1
H
L
11
PDN
14
8
7
C35
0.1u
LRCK
JP9
BICK2
2
SW1
DAC/DIR_PDN
D_REG
D_REG
D_REG
D
1
2
D
R20
10k
D2
1S1588
U3E
74HC14
11
14
10
7
13
JP10
SDA
14
12
7
SPK_PDN
CDTI
3-wire
I2C
1
H
3
L
U3F
74HC14
SW2
SPK_PDN
C37
0.1u
C36
0.1u
2
D_REG
74LVC541
C
C
JP3
DIR_MCLK
MCLK1
D_REG
MCLK
JP4
R22
10k
R23
470
R24
10k
R25
470
R26
10k
R27
470
CSN1
CCLK1
CDTI1
BICK1
DIR_BICK
BICK
JP5
B
LRCK
1
2
3
4
5
JP6
DIR_SDTO
B
PORT3
LRCK1
DIR_LRCK
SDTO1
10
9
8
7
6
CSN
SCL/CCLK
SDA/CDTI
CDTO
CDTO
SDTO
uP-I/F
PORT2
MCLK
BICK
LRCK
SDTI
D_REG
1
2
3
4
5
10
9
8
7
6
JP7
CAD0
GND
GND
DSP
A
U3B
74HC14
3
D_REG
A
R21
10k
14
4
7
Title
Size
A3
Date:
A
B
C
D
AKD4368-B Rev.1
Document Number
Rev
CLOCK
Friday, February 10, 2006
Sheet
E
A
3
of
6
A
B
C
D
E
D_REG
L4 10u
VCC +5V
1
C27
0.1u
1
L5
47u
PDN
VCC
3
GND
OUT
2
1
D_REG
C28
0.1u
SPK_REG
IN
R15
470
TORX141
+ C22
47u
C34
10u
2
E
DIR_REG
L2 (short)
T1
TA48M33F
1
2
HVDD_REG
L1 (short)
1
GND
PORT1
2
L3 (short)
1
2
C26
0.1u
E
OUT
C23
0.1u
C24
0.1u
2
AVDD_REG
+ C25
47u
+
DIR_REG
C33
0.1u
D
D_REG
U3A
74HC14
R18
12k
1
16
D_REG
INT0
17
PDN
18
AVSS
19
2
1
RX0
INT1
15
2
DVDD
CSN
14
CSN
3
DVSS
CCLK
13
CCLK
1 1
R
14
2
7
LED1
ERF
4
XTI
CDTI
12
CDTI
2
AVDD
U2
20
1
D
R17
1k
5
XTO
CDTO
11
CDTO
R16
5.1
DIR_REG
AK4116
C
MCKO
DAUX
10
9
6
SDTO
X1
11.2896MHz
LRCK
C32
10p
TP2
XTI
8
C31
10p
C
C29
0.1u
BICK
10u
C30
7
+
DIR_MCLK
DIR_SDTO
DIR_BICK
B
DIR_LRCK
B
A
A
Title
Size
A3
Date:
A
B
C
D
AKD4368-B Rev.1
Document Number
Rev
DIR
Friday, February 10, 2006
A
Sheet
E
4
of
6
A
B
C
D
E
E
SPK_REG
E
D
D
C43
10u
C42
0.1u
VC_R_P
VSS3
VSS1
VSS2
VDD1
VDD2
VC_R_P
U5
VC_R_N
VC_R_N
VCOIL
VC_L_P
VC_L_P
TEST
VC_L_N
VC_L_N
C
BST_PD_N
AK7830
VSS4
VFB
VBAT
DVDDI
C
D_REG
SPK_PDN
SDA
SCL
PD_N
VC
IN_R_N
IN_R_P
IN_L_P
IN_L_N
C41
0.1u
SPK_REG
AK7830
C38
0.1u
C40
0.01u
LOUT
C39
0.1u
ROUT
B
B
A
A
Title
Size
A3
Date:
A
B
C
D
AKD4638-B Rev.1
Document Number
Rev
A
SPK AMP
Friday, February 10, 2006
Sheet
E
6
of
6