ATMEL AT90SC25672RCT

Features
General
• High-performance, Low-power secureAVR® RISC Architecture
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– 135 Powerful Instructions (Most Executed in a Single Clock Cycle)
Low Power Idle and Power-down Modes
Bond Pad Locations Conforming to ISO 7816-2
ESD Protection to ± 6000V
Operating Ranges: 1.62 to 5.5V
Compliant with GSM, 3GPP and EMV 2000 Specifications; PC Industry Compatible
Available in Wafers, Modules, QFN44 and SOIC8 packages
Memory
• 256K Bytes of ROM Program Memory
• 72K Bytes of EEPROM, Including 128 OTP Bytes and 384-byte Bit-addressable Area
– 1 to 128-byte Program / Erase
– 1.25 ms Program / 1.25 ms Erase
– Typically More than 500,000 Write/Erase Cycles at a Temperature of 25oC
– 10 Years Data Retention
– EEPROM Erase Only Mode
– Write EEPROM With or Without Autoerase
• 8K Bytes of RAM
• 32K Bytes of ROM Dedicated to Atmel’s Crypto-library
Secure
Microcontroller
for Smart Cards
AT90SC25672RCT
-USB
Summary
Peripherals
• ISO 7816 Controller
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– Up to 625 kbps at 5 MHz
– Compliant with T = 0 and T = 1 Protocols
One I/O Port
USB 2.0 Full Speed interface with 5 endpoints and DMA controller
Programmable Internal Oscillator (Up to 40 MHz for CPU and Crypto Accelerator)
Two 16-bit Timers
Random Number Generator (RNG)
2-level, 9-vector Interrupt Controller
Hardware DES and Triple DES DPA/DEMA Resistant
Checksum Accelerator
CRC 16 & 32 Engine (Compliant with ISO/IEC 3309)
32-bit AdvX™ Cryptographic Accelerator for Public Key Operations with GF(2n)
Multiplier and Firmware (RSA, ECC, Key Generation)
Security
•
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Dedicated Hardware for Protection Against SPA/DPA Attacks
Advanced Protection Against Physical Attack, Including Active Shield
Environmental Protection Systems
Voltage Monitor
Frequency Monitor
Light Protection
Temperature Monitor
Secure Memory Management/Access Protection (Supervisor Mode)
Certification
•
•
•
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CC EAL4+
VISA
CAST
USB 2.0
6522DS–SPD–07Sep07
Note: This is a summary document. A complete document will be
available under NDA. For more information, please contact your
local Atmel sales office.
Development Tools
• Voyager Emulation Platform (ATV4 Standard) to Support Software Development
• IAR Systems EWAVR® V4.21A Debugger or Above
• Software Libraries and Application Notes
Description
The AT90SC25672RCT-USB is a low-power, high-performance, 8/16-bit microcontroller with ROM program memory,
EEPROM data memory, cryptographic accelerator based on the secureAVR enhanced RISC architecture. By executing
powerful instructions in a single clock cycle, the AT90SC25672RCT-USB achieves throughputs close to 1 MIPS per MHz.
Its Harvard architecture includes 32 general purpose working registers directly connected to the ALU, allowing two independent registers to be accessed in one single instruction executed in one clock cycle.
The AT90SC25672RCT-USB uses a new AVR® architecture, the secureAVR that allows the linear addressing of up to 8M
bytes of code and up to 16M bytes of data as well as a number of new functional and security features.
The cryptographic accelerator featured in this product is the AdvX, a 32-bit accelerator dedicated to performing fast encryption and authentication functions. It is combined with a 32K byte-ROM for a high-performance and secure crypto firmware.
The ability to map the EEPROM in the code space allows parts of the program memory to be reprogrammed in-system.
This technology combined with the versatile 8/16-bit CPU on a monolithic chip provides a highly flexible and cost-effective
solution to many smart card applications.
Additional security features include power and frequency protection logic, logical scrambling on program data and
addresses, Power Analysis countermeasures and memory accesses controlled by a supervisor mode. A block diagram of
the AT90SC25672RCT-USB is shown in Figure 1 hereafter.
USB Controller Description
The AT90SC25672RCT-USB features an USB V2.0 Full Speed controller which requires a 48 MHz external crystal for the
data transfer. The USB interface consists of a Serial Interface Engine (SIE) and a Universal Function Interface (UFI). The
SIE performs clock/data separation, NRZI encoding and decoding, bit stuffing, CRC generation and checking and serialparallel data conversion.
The UFI connects the USB interface to the AVR. It consists of a protocol engine and provides five configurable data transfer
endpoints, each with its own DPRAM in the memory area. The data transfer type for each endpoint is configured by software. The table below indicates the characteristics of each endpoint:
Table 1: Characteristics of each endpoint.
Endpoint
number
Size (bytes)
Available data transfer modes
EP0
64
BULK, ISOCHRONOUS, INTERRUPT, CONTROL
EP1
2 * 64
BULK, ISOCHRONOUS, INTERRUPT
EP2
2 * 64
BULK, ISOCHRONOUS, INTERRUPT
EP3
64
BULK, ISOCHRONOUS, INTERRUPT, CONTROL
EP4
64
BULK, ISOCHRONOUS, INTERRUPT, CONTROL
A DMA controller allows a fast communication rate between the RAM of the CPU and the DPRAM.
The USB controller provides a dynamic pull-up attachment and detachment and a host detection mechanism. In addition, it
offers an automatic interface detection between the USB 2.0 and the ISO7816 port.
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AT90SC25672RCT-USB
6522DS–SPD–07Sep07
AT90SC25672RCT-USB
Figure 1. AT90SC25672RCT -USB secureAVR RISC Architecture
Data Bus
8-bit
OTP
Access
Control
USBDM
USBDP
XIN
XOUT
USB Module
EEPROM
User Memory
PC
CRYPTO
ROM
General
Purpose
Registers
Program
Memory
X
16
Instruction
Register
8
ALU
16
8
Instruction
Decoder
16
Control
Lines
Access
Control
Y
Z
8
Status
Register
RNG
Secure
Control
CLK
GND
VCC / VBus
AdvX
CryptoCoprocessor
RAM
Data Memory
Interrupt
Unit
ISO 7816
Controller
ISO 7816
I/O Port 0
IN/OUT0
Timer 0
Timer 1
Reset
Circuit
RST
DES
DPA Counter
measures
CRC and
Checksum
Accelerator
A DMA controller allows a fast communication rate between the RAM of the CPU and the DPRAM.
3
6522DS–SPD–07Sep07
NC
4
NC
USB_DP
NC
NC
NC
NC
NC
NC
NC
USB_DM
NC
44
43
42
41
40
39
38
37
36
35
34
Figure 2. Pinout AT90SC25672RCT-USB - Package QFN44
1
33
NC
ISO_CLK
2
32
NC
USB_XOUT
3
31
ISO_IO0 / GPIO
NC
4
30
NC
USB_XIN
5
29
NC
ISO_RST
6
28
NC
NC
7
27
NC
NC
8
26
NC
NC
9
25
NC
VCC / VBUS
10
24
GND
NC
11
23
NC
INDEX CORNER
AT90SC25672RCT-USB
20
21
22
NC
NC
17
NC
NC
16
NC
18
15
NC
19
14
NC
NC
13
NC
NC
12
NC
(44-lead QFN top view)
AT90SC25672RCT-USB
6522DS–SPD–07Sep07
AT90SC25672RCT-USB
Figure 3. Pinout AT90SC25672RCT-USB - Package SOIC8 - ISO Mode
GND
1
8
VCC
7
ISO_RST
6
NC
5
ISO_CLK
INDEX CORNER
NC
2
AT90SC25672RCT-USB
ISO_IO0
3
NC
4
SOIC8
Figure 4. Pinout AT90SC25672RCT-USB - Package SOIC8 - USB Mode
GND
1
8
VBUS
7
USB_XIN
6
USB_XOUT
5
USB_DP
INDEX CORNER
NC
2
AT90SC25672RCT-USB
GPIO
3
USB_DM
4
SOIC8
5
6522DS–SPD–07Sep07
Figure 5. Quad Flat No Lead Package, 44 Leads
6
AT90SC25672RCT-USB
6522DS–SPD–07Sep07
AT90SC25672RCT-USB
Figure 6. Plastic Small Outline Package - 8-lead - 0.209” Body
C
1
E
E1
L
N
Top View
?
End View
e
b
A
COMMON DIMENSIONS
(Unit of Measure = mm)
A1
SYMBOL
D
Side View
NOM
MAX
NOTE
A
1.70
2.16
A1
0.05
0.25
b
0.35
0.48
5
C
0.15
0.35
5
D
5.13
5.35
E1
5.18
5.40
E
7.70
8.26
L
0.51
0.85
?
0˚
8˚
e
Notes: 1.
2.
3.
4.
5.
MIN
1.27 BSC
2, 3
4
This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information.
Mismatch of the upper and lower dies and resin burrs are not included.
It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded.
Determines the true geometric position.
Values b and C apply to pb/Sn solder plated terminal.
The standard thickness of the solder layer shall be 0.010 +0.010/-0.005 mm.
7
6522DS–SPD–07Sep07
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AT90SC25672RCT-USB
6522DS–SPD–07Sep07
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6522DS–SPD–07Sep07